xml version 1.0 encoding UTF-8 standalone no
record xmlns http:www.loc.govMARC21slim xmlns:xsi http:www.w3.org2001XMLSchema-instance xsi:schemaLocation http:www.loc.govstandardsmarcxmlschemaMARC21slim.xsd
leader nam Ka
controlfield tag 001 001469347
007 cr mnu|||uuuuu
008 040524s2004 flua sbm s000|0 eng d
datafield ind1 8 ind2 024
subfield code a E14-SFE0000249
Baylis, Charles Passant,
Improved current-voltage methods for RF transistor characterization
h [electronic resource] /
by Charles Passant Baylis II.
[Tampa, Fla.] :
University of South Florida,
Thesis (M.S.E.E.)--University of South Florida, 2004.
Includes bibliographical references.
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ABSTRACT: In the development of a nonlinear transistor model, several measurements are used to extract equivalent circuit parameters. The current-voltage (IV) characteristic of a transistor is one of the measurement data sets that allows the nonlinear model parameters to be extracted. The accuracy of the IV measurement greatly influences the accuracy of the large-signal model. Numerous works have reported the inadequacy of traditional static DC IV measurements to accurately predict radio-frequency (RF) behavior for many devices. This inaccuracy results from slow processes in the device that do not have time to completely respond to the quick changes in terminal conditions when the device is operating at high frequencies; however, these slow processes respond fully to reach a new steady-state condition in the DC sweep measurement. The two dominant processes are self-heating of the device and changes in trap occupancy. One method of allowing the thermal and trap conditions to remain in a state comparable to that of RF operation is to perform pulsed IV measurements to obtain the IV curves. In addition, thermal correction can be used to adjust the IV curves to compensate for self-heating in the case that the predominant effect in the device is thermal. To gain a better understanding of pulsed IV measurement techniques, measurement waveforms of a commercially available pulsed IV analyzer are examined in the time domain. In addition, the use of bias tees with pulsed IV measurement is explored; such a setup may be desired to maintain stability or to enable simultaneous pulsed S-parameter and pulsed IV measurement. In measurements with bias tees, the pulse length setting must be long enough to allow the voltage across the inductor to change before the measurement is made. In many circumstances, it is beneficial to compare different sets of IV curves for a device. The comparison of pulsed and static IV measurements, measured and modeled IV measurements, as well as two measurements with identical settings on the same instrument (to ascertain instrument repeatability) can be performed using the proposed normalized difference unit (NDU). This unit provides a comparison that equally weights the two sets of data to be compared. Due to the normalization factor used, the value of the NDU is independent of the size of the device for which the IV curves are compared. The variety of comparisons for which this unit can be used and its ability to present differences quantitatively allow it to be used as a robust metric for comparing IV curves. Examples of the use of the NDU shown include determination of measurement repeatability, comparison of pulsed and static IV data, and a comparison of model fits. The NDU can also be used to isolate thermal and trapping processes and to give the maximum pulse length that can be used for pulsed IV measurement without contamination by each of these processes. Plotting the NDU comparing static and pulsed IV data versus pulse length shows this maximum pulse length that can be used for each effect, while a plot of the NDU comparing pulsed IV data for two quiescent bias points of equal power dissipation reveals only differences due to trapping effects. In this way, trapping effects can be distinguished from thermal effects. Electrothermal modeling has arisen as a method of correcting for self-heating processes in a device with predominantly thermal effects. A parallel RC circuit is used to model channel temperature as a function of ambient temperature and power dissipated in the channel or junction. A technique is proposed for thermal resistance measurement and compared with a technique found in the literature. It is demonstrated that the thermal time constant can be measured from a plot of the NDU versus pulse length, and the thermal capacitance is then obtained using the thermal resistance and time constant. Finally, the results obtained through the thermal resistance measurement procedures are used to thermally correct static IV curves. Because trapping effects are negligible, it is shown that IV curves corresponding to different quiescent bias points for a Si LDMOSFET can be synthesized from three sets of static IV data taken at different ambient temperatures. The results obtained from this correction process for two quiescent bias points are compared to the pulsed IV results for these quiescent bias points and found to be quite accurate. Use of the methods presented in this work for obtaining more accurate transistor IV data data should assist in allowing more accurate nonlinear models to be obtained.
Adviser: Dunleavy, Lawrence P.
x Electrical Engineering
t USF Electronic Theses and Dissertations.
Improved Current-Voltage Methods fo r RF Transistor Characterization by Charles Passant Baylis II A thesis submitted in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering Department of Electrical Engineering College of Engineering University of South Florida Major Professor: Lawrence P. Dunleavy, Ph.D. Arthur David Snider, Ph.D. Thomas M. Weller, Ph.D. Date of Approval: February 27, 2004 Keywords: microwave, modeling, nonlinear, large-signal, temperature, electrothermal, thermal, trapping, pulsed, static, correction, de-embedding Copyright 2004, Charles P. Baylis II
DEDICATION To my Lord and Savior, Jesus Christ, who h as provided purpose and meaning in my life.
ACKNOWLEDGMENTS I would like to gratefully thank my major professor, Dr. Lawrence Dunleavy, who has tirelessly worked to provide helpful comments, suggestions, and insights and has assisted in securing funding for this work. Dr. Arthur D. Snid er has assisted me far beyond the call of duty of a committee member and has provided a unique vantage point in his analysis of the topics presented. The derivation of the normalized difference unit as a measure of temperature in Chapter 6 is largely due to his ingenuity. Dr Thomas Weller has also read and commented on much of the work which is enclosed within pr ior to its incorporation into a Thesis, and I appreciate his ability to provide assistance on cl ear communication of technical materials and provide ideas for further experimentation. Many of my fellow graduate students have been very helpful as well, including John Daniel, who has assist ed in the setup and performance of many of the experiments, particularly the thermal e xperiments. His knowledge of the Cascade probe station operation has allowed much more effici ent conduction of these investigations. Alberto Rodriguez has always been available to lend word s of wisdom when asked and his expertise has proved invaluable. Finally, I would like to thank William Clausen of Modelithics, Inc., Dr. Walter Curtice of Curtice Consulting, Ray Penge lly of Cree Microwave, Dr. Peter Winson and Dr. Steven Lardizabal of Raytheon, Inc., a nd Dr. Peter Ladbrooke and Dr. James Bridge of Accent Optical Technologies for their collaboration and review of various aspects of my work. Mr. Ray Pengelly of Cree Microwave and Dr. Mark Leibovich of Gal-El have graciously provided devices for use in the experiments. Fi nally, gratitude is expressed to Raytheon, Inc., Accent Optical Technologies and Modelithics, Inc. fo r their financial and in-kind support of this work. The authorÂ’s research also was supported by fellowship grants from Mini-Circuits and the Automatic RF Techniques Group (ARFTG). Finally, I would like to thank my family for their love and support throughout the completion of this work. My parents, Dr. Char les and Sharon Baylis, have given wise counsel that has continued to prove correct. My brothe r, Sam and sister, Leanna, have encouraged and assisted me in my pursuits and I am grateful for them.
i TABLE OF CONTENTS LIST OF TABLES iii LIST OF FIGURES iv ABSTRACT vii CHAPTER 1: INTRODUCTION 1 CHAPTER 2: PULSED IV THEORY 5 2.1. The Problem with Static IV Measurements 5 2.2. Thermal Processes 6 2.3. Trapping Processes 8 2.4. Transistor Modeling Implications 12 2.5. Chapter Summary 17 CHAPTER 3: TIME-DOMAIN ANALYSIS OF PULSED IV WAVEFORMS 18 3.1. Experimental Setup 19 3.2. Static IV Measurement Waveform Analysis 20 3.3. Pulsed IV Measurement Waveform Analysis 21 3.4. Use of Bias Tees in Pulsed IV Measurements 28 3.5. Chapter Summary 37 CHAPTER 4: THE NORMALIZED DIFFERENCE UNIT 39 4.1. Formulation 39 4.2. Measurement Repeatability as an Uncertainty Level 42 4.3. Comparing Pulsed and Static IV Results 43 4.4. Determination of a Best-Fit Model to IV Data 45 4.5. Chapter Summary 48 CHAPTER 5: ISOLATION OF PROCESSES 49 5.1. Strategy for Effect Isolation 49 5.2. Experimental Results 51 5.3. Chapter Summary 60 CHAPTER 6: THERMAL RESISTANCE AND CAPACITANCE MEASUREMENT 61 6.1. Situations for Wh ich Pulsed IV Measurements Alone are Inadequate 61 6.2. Thermal Resistance Measurement Using Proposed Method 63 6.3. Thermal Resistance Measurement Using Jenkins Method 68 6.4. Thermal Capacitance Measurement 69 6.5. Chapter Summary 79
ii CHAPTER 7: THERMAL CORRECTION OF IV CURVES 80 7.1. Temperature Dependence of IV Results 80 7.2. Thermal Correction of Static IV Curves 81 7.3. Chapter Summary 87 CHAPTER 8: CONCLUSIONS AND RECOMMENDATIONS 88 REFERENCES 92 APPENDICES 95 Appendix A: The Frequency Dependence of Transistor Channel Temperature 96 Appendix B: Accent Dynamic i(V) Analyzer Specifications 101
iii LIST OF TABLES Table 5.1. Summary of Minimum Effect Time Constants 60 Table B.1. Accent DiVA D210 Specifications 101 Table B.2. Current-Dependent Speci fications for Accent DiVA D210 101 Table B.3. Accent DiVA D225 Specifications 101 Table B.4. Current-Dependent Speci fications for Accent DiVA D225 101 Table B.5. Accent DiVA D265 Specifications 101 Table B.6. Current-Dependent Speci fications for Accent DiVA D225 102
iv LIST OF FIGURES Figure 2.1. Energy Band Structure of a Semiconductor with the Corresponding Fermi-Dirac Function 8 Figure 2.2. Energy Band Structures and Fermi-Dirac Functions for (a) an n-Type Semiconductor and (b) a p-Type Semiconductor 10 Figure 2.3. A Typical Intrinsic FET Model 13 Figure 2.4. A Typical Intrinsic BJT Model 14 Figure 3.1. Experimental Setup 19 Figure 3.2. Static Measurement Results for Drain and Gate Voltages 21 Figure 3.3. Measured Drain and Gate Voltages Versus Time (Zoomed Out) 22 Figure 3.4. Measured DiVA D265 Drain and Gate Voltages Versus Time (Zoomed In) 23 Figure 3.5. First Two Series of DiVA D265 Drain Voltage 24 Figure 3.6. Final Measurement Pulses of DiVA D265 Drain Voltage 24 Figure 3.7. Gate and Drain Voltage Output for DiVA D265 Measurement with Quiescent VGS = -1.6 V, VDS = 4 V 25 Figure 3.8. DiVA D265 Measured Drain and Gate Voltages with VDS Step = 0.5 V, Quiescent Bias Point: VGS = -1.6 V, VDS = 3 V 26 Figure 3.9. Gate and Drain Volta ge Waveforms for Settings of VDS Bias = 1.5 V, VDS Step = 1 V, VDS Maximum = 4 V 27 Figure 3.10. Drain and Gate Voltage Vers us Time for Zoomed-In View of DiVA D265 Pulse with Rise, Hold, and Fall Times 28 Figure 3.11. Bias Tee Circuit 29 Figure 3.12. Setup for Oscilloscope Portion of Experiment 31 Figure 3.13. Setup for GaAs FET Measurement 31
v Figure 3.14. Pulsed IV Waveforms Without Bias Tees and With Bias Tees for Decreasing Pulse Length 33 Figure 3.15. DiVA Pulsed IV Results With and Without Bias Tees 36 Figure 4.1. Static and Pul sed (Quiescent Bias Point: IB = 1.5 mA, VCE = 3.0 V; Pulse Length = 0.2 s) IV Curves for a SGA-9289 HBT 44 Figure 4.2. Static and Pul sed (Quiescent Bias Point: VGS = -0.9 V, VDS = 4.0 V; Pulse Length = 0.2 s) IV Curves for a TriQuint CLY-5 GaAs MESFET 44 Figure 4.3. Angelov, TOM1, and Statz Fits to Pulsed IV Data for the Agilent ATF35143 PHEMT (Measured IV Curves = Solid Lines, Modeled IV Curves = Dashed Lines) 45 Figure 4.4. Plots of D(VGS) (Left) and D(VDS) (Right) for Three Model Fits to the ATF-35143 PHEMT 47 Figure 5.1. Static IV Results and Pulsed IV Results for Quiescent Bias Points VGS = -0.9 V, VDS = 4.0 V and VGS = -1.2 V, VDS = 5.5 V 52 Figure 5.2. NDU Versus Pulse Length Comparing Static and Pulsed (Quiescent Bias Point: VGS = -0.9 V, VDS = 4.0 V) IV Measurements for the Tri-Quint CLY-5 GaAs FET and Comparing Pulsed IV Results for Quiescent Bias Points of Identical Power Dissipation, Plotted With Instrument Repeatability (NDU = 0.01) 54 Figure 5.3. Static IV and Pulsed IV (Quiescent Bias Point: IB = 1.5 mA, VCE = 3.0 V, Pulse Length = 0.2 s) for SGA-9289 HBT 56 Figure 5.4. Plots of Normalized Difference Unit (NDU) for the Sirenza Microdevices SGA-9289 SiGe HBT Comparing Static and Pulsed (Quiescent Bias Point: IB = 1.5 mA, VCE = 3.0 V) IV Measurements and Pulsed IV Measurements from Quiescent Bias Points of Equal Power Dissipation, Shown with the Estimated Instrument Repeatability (NDU = 0.01) 56 Figure 5.5. Static and Pulsed (Quiescent Bias Point: VGS = -4.5 V, VDS = 0 V) IV Results for the GaN HEMT 57 Figure 5.6. NDU Versus Pulse Length Comparing Static and Pulsed IV Measurements for the GaN HEMT Versus Pulse Length and Comparing Pulsed IV Results for Quiescent Bias Points of Identical Power Dissipation, Shown with Instrument Repeatability (NDU = 0.01) 58 Figure 5.7. Static and Pulsed (Quiescent Bias Point:VGS = 3.5 V, VDS = 0 V) IV Results for the Si LDMOSFET (VGS = 4, 5, 6, 7, 8 V) 59
vi Figure 5.8. NDU Versus Pulse Length Comparing Static and Pulsed IV Measurements for the Si LDMOSFET Versus Pulse Length and Comparing Pulsed IV Results for Quiescent Bias Points of Identical Power Dissipation, Shown with Estimated Instrument Repeatability (NDU = 0.01) 59 Figure 6.1. Thermal Subcir cuit Used In Electrothermal Models 62 Figure 6.2. Static and Pulsed IV Results for the LDMOSFET (VGS = 4, 5, 6, 7, 8 V) 64 Figure 6.3. VGS = 8 V curves for Settings A, B, and C 65 Figure 6.4. Comparison of Pulsed IV (Pulse Length = 0.2, VGS = 8 V) Curves for Quiescent Bias/Ambient Temperature Combinations 66 Figure 6.5. Comparison of Pulsed IV (Pulse Length = 0.2, VGS = 8 V) Curves for Quiescent Bias/Ambient Temperature Combinations 67 Figure 6.6. LDMOS Pulsed (85, 105, 125, 145, 165 C, Quiescent Bias Point: VGS = 3.5 V, VDS = 0 V) and Static (25 C) IV Curves for VGS = 8 V 69 Figure 6.7 Channel Temperature Versus Power Dissipation Fit to Measured Points 69 Figure 6.8. NDU Versus Pulse Length for the LDMOSFET, with the Estimated Thermal Effect Time Constant Indicated by an Arrow 70 Figure 7.1. LDMOSFET Static IV Curves (VGS = 4, 5, 6, 7, 8 V) at TA1 = 25 C and TA2 = 85 C 82 Figure 7.2. Uncorrected Static IV Curv es and Corrected IV Curves for Zero Power Dissipation Quiescent Bias Point 83 Figure 7.3. LDMOS Thermally Corrected and Pulsed IV Results for Quiescent Bias Point of Zero Power Dissipation 84 Figure 7.4. Corrected Static IV and Pu lsed IV Results for Quiescent Bias Point VGS = 5 V, VDS = 5 V at TA = 75 C 85 Figure 7.5. Corrected Static IV and Pu lsed IV Results for Quiescent Bias Point VGS = 6 V, VDS = 10 V at TA = 45 C 86 Figure A.1. System Overview 96
vii IMPROVED CURRENT-VOLTAGE METHODS FOR RF TRANSISTOR CHARACTERIZATION Charles Passant Baylis II ABSTRACT In the development of a nonlinear transistor model, several measurements are used to extract equivalent circuit parameters. The current-v oltage (IV) characteristic of a transistor is one of the measurement data sets that allows the nonlinear model parameters to be extracted. The accuracy of the IV measurement greatly influen ces the accuracy of the large-signal model. Numerous works have reported the inadequacy of traditional static DC IV measurements to accurately predict radio-frequency (RF) behavi or for many devices. This inaccuracy results from slow processes in the device that do not ha ve time to completely respond to the quick changes in terminal conditions when the device is operating at high frequencies; however, these slow processes respond fully to reach a new steady-state condition in the DC sweep measurement. The two dominant processes are self-heating of the device and changes in trap occupancy. One method of allowing the thermal and trap conditions to remain in a state comparable to that of RF operation is to perform pulsed IV measurements to obtain the IV curves. In addition, thermal correction can be used to adjust the IV curves to compensate for self-heating in the case that the predominant eff ect in the device is thermal. To gain a better understanding of pulsed IV measurement techniques, measurement waveforms of a commercially available pulsed IV an alyzer are examined in the time domain. In addition, the use of bias tees with pulsed IV m easurement is explored; such a setup may be desired to maintain stability or to enable simultaneous pulsed S-parameter and pulsed IV measurement. In measurements with bias tees the pulse length setting must be long enough to allow the voltage across the inductor to cha nge before the measurement is made. In many circumstances, it is beneficial to compare different sets of IV curves for a device. The comparison of pulsed and static IV measurements, me asured and modeled IV measurements, as well as two measurements with identical settings on the same instrument (to ascertain instrument repeatability) can be perfo rmed using the proposed normalized difference unit (NDU). This unit provides a comparison that equally weights the two sets of data to be compared. Due to the normalization factor used the value of the NDU is independent of the size of the device for which the IV curves are compared The variety of comparisons for which this unit can be used and its ability to present differe nces quantitatively allow it to be used as a robust
viii metric for comparing IV curves. Examples of the use of the NDU shown include determination of measurement repeatability, comparison of pulsed and static IV data, and a comparison of model fits. The NDU can also be used to isolate thermal and trapping processes and to give the maximum pulse length that can be used for pul sed IV measurement without contamination by each of these processes. Plotting the NDU comparing static and pulsed IV data versus pulse length shows this maximum pulse length that can be used for each effect, while a plot of the NDU comparing pulsed IV data for two quiescent bias points of equal power dissipation reveals only differences due to trapping effects. In this way, trapping effects can be distinguished from thermal effects. Electrothermal modeling has arisen as a me thod of correcting for self-heating processes in a device with predominantly thermal effects. A parallel RC circuit is used to model channel temperature as a function of ambient temperature a nd power dissipated in the channel or junction. A technique is proposed for thermal resistance measurement and compared with a technique found in the literature. It is demonstrated that the thermal time constant can be measured from a plot of the NDU versus pulse length, and the thermal capacitance is then obtained using the thermal resistance and time constant. Finally, the results obtained through the th ermal resistance measurement procedures are used to thermally correct static IV curves. B ecause trapping effects are negligible, it is shown that IV curves corresponding to different quiescent bias points for a Si LDMOSFET can be synthesized from three sets of static IV data take n at different ambient temperatures. The results obtained from this correction process for two quiescen t bias points are compared to the pulsed IV results for these quiescent bias points and found to be quite accurate. Use of the methods presented in this work for obtaining more accurate transistor IV data data should assist in allowing more accura te nonlinear models to be obtained.
1 CHAPTER 1: INTRODUCTION Nonlinear models are important tools used by engineers to predict the operation of transistors in wireless and microwave system app lications. A nonlinear equivalent circuit model is a circuit containing lumped and/or distribut ed circuit parameters and appropriate currentvoltage (IV) and capacitance-voltage (CV) equations that has appr oximately the same behavior as the device or circuit to be predicted over the fre quency and voltage-current range of operation. Models obtained for circuit components are used in electronic design automation (EDA) software, also known as computer aided engineering (CAE) software, to allow simulation of circuit designs and accurate prediction of circuit r esults. In principle, a model can be created for any device, whether active or passive. A model may be as simple as a couple of lumped components or as complex as thirty to forty elements, some of which may be voltageor currentdependent. The purpose of this thesis is to deve lop and demonstrate various methods of obtaining more accurate current-voltage da ta to be used in nonlinear transistor modeling procedures. At high frequencies, obtaining accurate models for active and passive components becomes very critical to the ability to accurately si mulate circuit operation. Even lumped passive components require models as the frequency exte nds into the gigahertz (GHz) range. For example, many inductors, instead of acting as an open circuit at high frequencies, actually return to short-circuit behavior when the frequency is raised sufficiently high, due to parasitic capacitances which exist in the physical part. Thus, the inductor model must include a shunt parasitic capacitance if it is to accurately describe the inductorÂ’s behavior at gigahertz frequencies. Similar parasitic capacitance and inductance can heavily influence transistor and diode behavior at high frequencies and mu st be modeled carefully along w ith the IV behavior. While both bipolar junction transistors (BJTs) and field-effect transistors (FETs) have fairly simple DC IV models, the complexity increases when attempting to predict AC operation. As the frequency increases into the RF range, more components are a dded to the models in an attempt to account for some of the complexities in the response of the transistor at the high frequencies. As frequency increases the IV characteristics, in general, differ from those measured at DC.
2 Depending on the size and type of a signal, the transistor model used can be a smallsignal model or a large-signal model. A small-si gnal model can be used if the variation around the transistor quiescent bias point is small enough that the behavior of the signal (AC) characteristic appears linear. If the signal varia tion about the quiescent bias point is larger, a nonlinear (large-signal) model must be used to accurately characterize the device. When in nonlinear behavior, the slope of the input/outpu t power characteristic of the transistor, for example, is not constant. This is an example of many parameters in a nonlinear model. A linear model can often be changed into a nonlinear model by adding an input-dependence to some of the parameters. In the creation of a model, the behavior of the circuit comprising the model is matched as closely as possible to some measured characteristic through optimization and tuning of the element values in the model circuit. Techniques of model optimization are important in obtaining accurate models and have been carefully studied. In transistor modeling, many of the parameters are dependent upon optimization of the model ci rcuit to the measured DC current-voltage (IV) characteristic . Following the extraction of the DC model parameters, the capacitive circuit parameters, which describe changes in the transi stor behavior with frequency, are extracted through the measurement of large-signal S-parame ters (for a nonlinear model) and small-signal Sparameters (for a linear model). It has been widely reported in the literature that the use of static DC IV curves in the radio-frequency (RF) characterization of the de vices is insufficient to accurately predict RF behavior , . This is because of therma l and trapping processes that are allowed to reach steady state in the device when it is in static conditions . Trapping processes (discussed in more detail in Chapter 2) affect the availability of charge carriers for current flow and are voltage and frequency dependent. Howe ver, in radio-frequency and microwave operation, these slow processes do not have time to occur. Thus the IV characteristic is different for RF operation than for DC operation. Because many of the model parameters are extracted from the DC IV curves and are then used to predict RF IV behavior, th e predicted results are often inaccurate. This is especially true for larger devices where I2R heating within the device is significant, and for devices where trapping effects are significant. Ideally, it is desired to obtain a transistor m odel that accurately predicts both RF and DC behavior. Many models are not equipped to acc ount for the thermal and trapping effects, and it may be the engineerÂ’s desire to be able to use these models to predict RF performance without having to include provision for these. A partial (and often adequate) solution to this problem is
3 pulsed IV measurement. In pulsed IV meas urement, pulses are taken from the quiescent bias point to different (VGS, VDS) values (for a FET) or (IB, VCE) values (for a BJT), allowing the processes to reach steady state only at the quiescent bias point. As long as the DC variation of the quiescent bias point is minimal, the pulsed IV r esults can be used to accurately predict RF operation. Chapter 2 presents much of the theory behind the pulsed IV measurement technique and its implications on the accurate prediction of device nonlinear characteristics. Chapter 3 presents an analysis of pulsed IV measurement procedures and examines some practical considerations to be used in pulsed IV analysis. The use of pulsed IV to help improve a m odelÂ’s prediction of RF performance suggests that a standardized numerical method of compar ing IV curves may be helpful in measuring the benefit of using pulsed IV measurements over st atic IV measurements. A numerical metric to perform this comparison is presented in Chapter 4. This metric has been used to compare two sets of IV curves in a variety of applicati ons, including finding the minimum effect time constants, the determination of a best-fit model, and the comparison of thermally corrected IV curves to pulsed IV results. Chapter 5 shows how this metric can also be used as a guide to isolate certain time-constant-governed processes within the device. While pulsed IV measurements provide a more accurate characteristic for RF prediction, their accuracy in describing the DC and low -frequency IV characteristics of the device may suffer. For devices with effects that are predom inantly thermal in nature, the IV characteristics and transconductance can be corrected by devel opment of a model in which thermal effects are taken into consideration. Such a model is calle d an electrothermal model. This model includes a subcircuit that allows the temperature to be determined as a function of frequency through a knowledge of the thermal resistance and capacita nce values. Chapter 6 presents a method which uses pulsed IV measurements to perform direct ex traction of the thermal resistance and explains how such methods can be used with a time cons tant measurement method to extract the thermal capacitance. This procedure allows the thermal ci rcuit parameters of the model to be found by direct extraction (no thermal measurement is necessary). In many cases, it is desired to have isothermal IV curves for a large transistor which has an operating IV range that is beyond the capabilities of available pulsed IV measurement systems. In Chapter 7, it is explained how a knowledge of the thermal resistance of a device can be used to generate a set of pulsed IV curves corresponding to a desired quiescent bias point using only static IV curves.
4 The goal of this work is to present and dem onstrate methods that can be used for more accurate RF IV transistor characterization. In addition to the use of more accurate IV data, measurement methods for S-parameters such as pul sed S-parameter measurement can be used to improve modeling and are justified based upon many of the same principles . While these methods are beyond the focus of this work, it should be kept in mind that many of the principles that can be used to improve IV measurement results can be applied to improving the accuracy of large-signal S-parameter measurements for device characterization.
5 CHAPTER 2: PULSED IV THEORY In years past, it has been co mmon to characterize transistors for RF operation by using static IV curves, such as produced by legacy curv e tracers. Static IV measurement consists of setting each gate voltage or base current and sweep ing or stepping the collector-emitter or drainsource voltage from its minimum to maximum value and measuring the current output at the drain or collector. This method, however, is not accurate for high-frequency characterization due to slow processes that affect the static IV results but do not actually play a part in RF operation. Two types of slow processes which affect static DC IV measurements are discussed, and the importance of obtaining accurate IV characteristics to the accuracy of nonlinear model development is explored by mathematical analys is. The chapter includes an introduction of the increasingly popular pulsed IV measurement solution, which is more rigorously explored in the next chapter. 2.1. The Problem with Static IV Measurements Static IV measurements performed on a transistor by a curve tracer or typical DC IV analyzer are flawed in the characterization of RF device operation. In high-frequency operation of the device, the voltage and current levels ar e altered so fast that slow processes which take place in the semiconductor material are dependent only upon the steady-state voltage and current of the waveform; they are not able to respond quickly enough to the fluctuating RF signal. The quiescent bias voltage and current define the steadystate conditions in RF operation. Thus, the slow processes are not dependent on the RF signal voltage but on the quiescent conditions. Thermal and trapping processes are the most well-known and cited sources of discrepancy in IV curves . IV characterization that allows thermal and trapping conditions to occur in the same manner in which they occur at RF and microw ave frequencies should be used. Pulsed IV measurements have become an acceptable method of obtaining accurate RF IV curves. In pulsed IV measurements, a quiescent bias condition is set by the instrument for a time long enough for steady-state conditions to be reached. Followi ng this, pulsing is performed from this quiescent
6 point to all (VGS, VDS) or (IB, VCE) points to be measured. If the pulse length is sufficiently short, thermal and trapping processes will not have time to occur at the target settings and thus a measurement is made which is dependent only upon the thermal and trapping that result from the quiescent bias . From this discussion, it can be seen that a different set of IV characteristics is obtained for pulsed IV characterization from different quiescent bias points, as demonstrated in . The fact that thermal and trapping characteristics depend on the quiescent bias point leads to the conclusion that the differences between pulsed IV resu lts biased at different locations is larger for devices with large amounts of thermal and trapping effects. Analyzers which can perform pulsed (Â“dynamicÂ”) IV analysis are commercially available. A popular series, available to the aut hor and used in this work, is the Dynamic i(V) Analyzer (DiVA) series, manufactured by Accent Optical Technologies. Several models are available for characterization of different devices. DiVA allows static IV measurements and pulsed IV measurements from a user-selected qui escent bias point for FETs, HEMTs, and bipolar devices. The range of pulse lengths available for static measurements are 0.1 s to 1000 s. Files output from the DiVA software can be converted for use with software pack ages used to create large-signal models. An analysis of the physical nature of the thermal and trapping processes allows a better understanding of how potential discrepancies in IV measurements can be overcome. 2.2 Thermal Processes The behavior of semiconductor devices is temp erature dependent. The three-dimensional heat equation can be used to describe the behavior in a transistor : t T z T y T x T 12 2 2 2 2 2, (2.1) where is a semiconductor property known as the thermal diffusivity, given by v THH K (2.2) KTH is the thermal conductivity of the semiconductor, is the density, and H is the specific heat. A thermal time constant is defined to give the time required for the device temperature to change in accordance with a change in heat: 2) 2 ( hth, (2.3)
7 where h is the thickness of the semiconductor mate rial. Abernathy gives a typical thermal time constant for GaAs monolithic microwave inte grated circuit (MMIC) devices as 156 s for a thickness of h = 100 m . Basically, this mean s that the device takes approximately 156 s to reach a steady-state temperature after application of a heat source. Abernathy states that in static IV measurements, the approximate time at which the device voltage and current remains at each point on the curve that is traced is substantially greater than the thermal time constant ; thus the te mperature of the device is dependent on the location in the trace. The cutoff frequency of the thermal e ffect can be found from its time constant using the well-known equation th cthf2 1 (2.4) If the frequency is lower than fcth, the device channel temperature is dependent on the AC signal voltage and current, but at frequencies greater than fcth, the device channel temperature is dependent on the quiescent current and voltage. The temperature dependence can be found for a signal with multiple frequency components based on an exponential modeling of the effect (see Appendix A). The temperature in the channel of a device TC at a bias point with a power dissipation of PD is given by the equation A D th CT P R T (2.5) where TA is the temperature of the deviceÂ’s surroundings, or Â“ambientÂ” temperature, and Rth is the thermal resistance of the device . The pow er dissipated in the junction is given by D DS DI V P (2.6) for a FET and by C CE DI V P (2.7) for a bipolar device. The first term on the right -hand side of (2.5) represents the self-heating of the device. Thus both ambient temperature and device self-heating contribute to the overall device temperature. Since the IV curves are dependent on channel temperature, the self-heating of the device that occurs due to the long dwell time of the static IV measurement sweep can cause errors in using this type of measurement to predict RF IV ope ration, in which the signal level changes so quickly that self-heating can only o ccur at the signal average (DC component), the quiescent bias point.
8 It follows from the above discussion that accurate RF IV characterization requires that the self-heating occurring in the IV measuremen t is dependent only upon the quiescent bias point to be used in RF operation. Such an RF IV characteristic can be developed through the use of pulsed IV measurements or a thermal correction procedure known as thermal de-embedding . Elaboration on both of these methods follo ws in subsequent chapters. 2.3. Trapping Processes In semiconductor devices, conduction is based largely on the amount of available carriers in the conduction and valence bands. The energy band structure of a semiconductor is given in Figure 2.1 , . Current in a semiconductor is composed of the movement of electrons in the conduction band and holes (vacated electron positi ons) in the valence band. An intrinsic semiconductor does not contain impurities. The Fermi-Dirac distribution function, given by kT E EFe E f/ ) (1 1 ) ( (2.5) gives the probability that an energy state of energy E is occupied by an electron, where T is the Kelvin temperature. EF is the Fermi level, defined as the energy at which the Fermi-Dirac function takes a value of 0.5. Figure 2.1. Energy Band Structure of a Se miconductor with the Corresponding FermiDirac Function ,  In order to increase the conductivity of a semiconductor, impurities are added which can supply electrons or holes to serve as carriers. In an n-type device, dopants are added which result Ec Ev EF
9 in the creation of new energy levels within th e semiconductor band gap. These energy levels are relatively close to the conduction band and contribute electrons to the conduction band upon ionization. Such Â“shallow levelsÂ” are usually ionized at room temperature . Figure 2.2(a) shows the energy band structure and Fermi-Dirac function of a typical n-type semiconductor. As shown in the plot of f(E) and the energy-band di agram, the Fermi level is higher for a n-type semiconductor due to the increased number of el ectrons near and in the conduction band resulting from the addition of the donors. In a p-type device, the added dopants cause acceptor energy levels to be added within the band gap that are cl ose in energy to the valence band and contribute holes to (receive electrons from) the valence band. Figure 2.2(b) shows that the Fermi level is lower for a p-type device than for an in trinsic device due to the added acceptors. In addition to shallow levels, other impuriti es can be found in semiconductors which also affect conductivity and hence current-voltage beha vior. Energy levels farther away from the conduction and valence bands (nearer to the center of the band gap) can also become ionized if the device is given enough heat energy. While shallow levels are typically ionized at room temperature, deep levels are not ionized at r oom temperature . However, if the channel temperature of the device increases, enough energy is imparted to some electrons in deep levels to jump into the conduction band; likewise, electrons in the valence band can jump to the deep levels. Both of these processes increase the conductivity of the semiconductor. Deep levels often serve as recombination cen ters. A recombination center allows the extinguishing of an electron-hole pair, thereby decreasing the number of conductors available. For example, a hole may jump from the valence band to a deep level (this is actually an electron falling from the deep level to the valence band), wh ich sits in the center of the band gap. If an electron then falls from the conduction band, electron-hole recombination occurs and both carriers are extinguished. In this case, the d eep-level impurity is labeled a Â“recombination center.Â” However, the time scale at which the electr on and hole arrive at the deep level is critical. If the hole arrives at the recombination center a nd becomes energized enough to return to the valence band before an electron arrives, the effect is only a temporary loss of the hole as a valence-band carrier; hence, recombination does not occur. In this case, the deep level is known as a Â“trapping centerÂ” . Both recombination and trapping centers affect current in transistors.
10 (a) (b) Figure 2.2. Energy Band Structures and Fermi-Dirac Functions for (a) an n-Type Semiconductor, and (b) a p-Type Semiconductor ,  There are basically four operations that can occur at a deep level. These are (1) electron capture, (2) electron emission, (3) hole capture, and (4) hole emission. A typical definition for the time constant (as given in the literature) of an emission process is the time required for the number of empty deep levels to decrease to 1/e times the initial number of empty deep levels. Likewise, the time constant for a capture process is usually defined as the time required for the number of filled deep levels to decrease to 1/e times the initial number of filled deep levels  and is here denoted by Trapping,. This time constant can be thought of as the time necessary for Ec Ev Ei EF Ec Ev Ei EF
11 trapping processes to respond to a change in voltage across the junction. As in the analysis of thermal effects, the trapping effect cutoff frequency, fcTrapping, is defined by Trapping cTrappingf2 1 (2.6) Winson describes three types of trap operation as trapping relates to measurement conditions . The first case of trap operation occurs when the cutoff frequency of the trapping effect is higher than both the signal and bias fre quencies. The bias frequency is the frequency of change of the quiescent bias point, and this frequenc y is zero in sinusoidal operation about a fixed quiescent bias point. However, in some large signal applications, the quiescent bias point can actually move during operation. The first case of trap operation occurs in typical DC or lowfrequency conditions and in static DC IV measure ments. In this situation, trapping processes have time to respond both to changes in signal and bias level. In the second case, the trap frequency is greater than the bias frequency but lowe r than the signal frequency. This represents typical RF conditions, where the bias point is fixe d and the signal has a high frequency. In this case, trapping effects are totally dependent on the quiescent bias point. In the third case, the trap frequency is below both the signal and bias frequenc ies. Because the signal and bias points are moving so quickly that the traps do not have time to respond to either, the third case is a case in which trapping processes have no effect on the signal . However, such a situation could only realistically occur in large-signal operation wh ere the quiescent bias point was moving due to a quick rotation of clipping/non-clipping signal le vel. In Class E and F amplifier applications, where a clipped signal causes the quiescent bias point changes with time, the situation can either fall into the second case (if the movement of the quiescent bias point is slow) or the third case (if the quiescent bias point movement is faster than the cutoff frequency of the trapping effects. Trapping can change the current output for a given input voltage. Barton and Ladbrooke have documented incidents in which trapping has caused a change in the breakdown voltage of a device . When the electric field is raised due to a higher applied voltage, trap states can gain enough energy to donate carriers to the conduction and valence bands. Thus a higher current can be obtained for lower voltages in devices where trapping occurs. This causes the breakdown voltage to be lower. Experiments have been pe rformed to show that Â“identicalÂ” devices with and without surface passivation produce differing IV curves. The above discussion reveals that trapping is an important consideration in determining how accurate IV characterization can be performed for radio frequencies.
12 2.4. Transistor Modeling Implications Transistors are complicated devices that in anything but simple small-signal, or low power, amplifier operation exhibit nonlinear beha vior. Increasingly it has become popular for engineers to use non-linear equivalent circuit mode ls in an attempt to explain and predict the behavior of these devices. Such models contain passive elements representing loss and reactive parasitic effects along with controlled voltage a nd current sources that ideally reproduce the same behavior in the desired region of operation as th e actual device under computer simulation. A definition of linearity aids in an understanding of the difficulty in predicting nonlinear operation. If, for a circuit or system, an excitation x1 produces an output y1 and an excitation x2 produces an output y2, the circuit or system is linear if an excitation 2 1bx ax produces an output 2 1by ay where a and b are constants . Two basic types of models exist: small-si gnal and large-signal mo dels. Small-signal models predict operation for a small variation around a quiescent bias point. For a small-signal model, the signal amplitude must be sma ll enough for the device characteristics to be approximated as linear. The parameters in a sma ll-signal model are considered to be voltageindependent. Large-signal models, often called Â“nonlinear Â” models, predict operation for larger amplitude variations about the quiescent point. As the signal varies a larger distance from the quiescent bias point, the device characteristic b ecomes distinctly nonlinear and the linear approximation can no longer be used. Several of the large-signal model pa rameters change with signal amplitude and must be expressed as functions of instantaneous voltage. In a nonlinear situation, a second or higher order polynomial must be used to accurately describe the device characteristic. The polynomia l can be developed using a two-dimensional nth order Taylor series centered at the quiescent bi as point if the value of the output current characteristic and the values of the first n de rivatives of the characteristic are known at the quiescent point . The Taylor series for a polyno mial describing the drain-source current of a FET as a function of the two variables (VGS, VDS), where X1 centered at a point (VGS0, VDS0) is given by the equation
13 ) ( ) ( ) ( ) ( ) ( ) (0 0 0 0 0 0 0 0DS DS DS DS GS DS GS GS GS DS GS DS DS GS DS DS GS DSV V V V V I V V V V V I V V I V V I ) )( ( ) ( ) ( ) ( 2 10 0 0 0 2 2 0 2 0 0 2 DS DS GS GS DS GS DS GS DS GS GS GS DS GS DSV V V V V V V V I V V V V V I 2 0 2 0 0 2) ( ) (DS DS DS DS GS DSV V V V V IÂ… (2.7) The first partial derivatives for a FET IDS characteristic are given by GS DS mV I g (2.8) and DS DS dsV I g (2.9) Vds Cds Cgd Rds Ci Ri Vgs + Ids + Figure 2.3. A Typical Intrinsic FET Model  A typical FET small-signal model is shown in Fi gure 2.3 . This model can easily be converted to a large-signal model by introducin g a voltage-dependence in the parameters Rds, Cgs, and Cgd, and the equation for the current source IDS. The drainsource resistance Rds is defined in terms of the output conductance gds as follows: ds dsg R 1 (2.10)
14 Equations (2.8) and (2.9) describe how these model parameters are related to the IV characteristics. In a large signal (nonlinear) model, gm, gds and capacitance values are dependent on the instantaneous voltage. Similarly, a small-signal model for bipolar tran sistors that is widely used is shown in Figure 2.4 . This model can also be convert ed to a large-signal model by introducing a bias dependence in Rce, the equation for ICE, and some of the capacitive parameters. For a bipolar transistor, the collector current is a function of the base current and the collector-emitter voltage: ) ( ) ( ) ( ) ( ) ( ) (0 0 0 0 0 0 0 0CE CE CE CE B DS B B B CE B CE B C CE B CV V V V I I I I I V I IC V I I V I I ) )( ( ) ( ) ( ) ( 2 10 0 0 0 2 2 0 2 0 0 2CE CE B B CE B CE B C B B B CE B CV V I I V I V I I I I I V I I 2 0 2 0 0 2) ( ) (CE CE CE CE B CV V V V I IÂ… (2.11) with the first partial derivatives given by B CEI I (2.12) and CE CE ceV I g (2.13) Cb'e Vce Cbc Rce Rb'c Rb'e Vbe Rb'b + Ice + Figure 2.4. A Typical Intrinsic BJT Model 
15 In a nonlinear situation higher order derivativ es exist; that is, the first partial derivatives are not constant over all inputs but change with IB and/or VCE (at least one of the second partial derivatives is nonzero). Analogous to the FET, the BJT model parameter Rce, which is the BJT output resistance is given by ce ceg R 1 (2.14) Bias-dependent S-parameter me asurements and static DC IV measurements traditionally have been used to find the values of the mode l parameters for different quiescent bias conditions and signal levels. For many devices, a significant amount of inaccuracy is introduced by the use of static DC IV measurements to predict RF be havior . For bias-dependent S-parameter and static IV measurements to accurately predic t large-signal behavior thermal and trapping conditions would either have to be nonexistent or identical for all bias points. This is far from a reasonable approximation for many devices. To obtain model parameters consistent with RF operation, ideally both pulsed S-parameter and pul sed IV measurements should be used. Such measurements have been performed on transi stors and diodes using commercially available systems from Texas Instruments , Agilent Technologies , and Accent Optical Technologies . In addition, many custom set ups have been constructed for pulsed IV , and pulsed S-parameter measurements . In pulsed S-parameter measurements, pulses are made to different voltages from a quiescent bias point, with S-parameter measurements being taken during the pulses. This allows the S-parameters to be given as a more a ccurate function of instantaneous voltage (vGS, vDS) for a specific quiescent bias point. Contrary to the assumption of traditional bias-dependent smallsignal S-parameter characterization, the large signal model cannot be assumed to be simply a combination of several small signal models taken at different quiescent bias points because thermal and trapping effects in the large-signal operation are dependent on the quiescent bias point. The second type of measurement, which is further explored in this thesis, is pulsed IV measurement, for which some of the motivations have already been discussed Pulsed IV allows the characterization to be accurate for RF operation. Because proper nonlinear device characterization is dependent on the accuracy of IV and S-parameter measurements, the accuracy of such results has a profound impact on the ab ility of the model to correctly predict nonlinear characteristics such as third-order intermodul ation terms and power-added efficiency.
16 To examine the effect of accurate de rivative prediction on nonlinear device characteristics, a simplification is used. Suppose that the current I flowing through a nonlinear device is a function of only one voltage V and is accurately described by a Taylor polynomial centered at V = 0: 2) ( cV bV a V I (2.15) If a two tone signal t V t V V2 2 1 1cos cos (2.16) is input to the device, the output current is given by ) cos cos ( ) cos cos (2 2 1 1 2 2 1 1 1t V t V b a t V t V I +2 2 2 1 1) cos cos ( t V t V c (2.17) This can be expanded to show the frequency content of the output current: (2.18) The derivatives of the characteristic are (2.19) (2.20) (2.21) From (2.18) it can be seen that the accuracy of DC prediction depends on a and c, the accuracy of first order term prediction depe nds on b, and the accuracy of sec ond order prediction depends on c. In general, to accurately determine the gene ration of nth order terms, the nth derivative must be properly evaluated at the center of the Tayl or polynomial. This result can be expanded to show that accuracy of the IV curves is critical for a model to correctly predict the non-linear behavior of the transistor. ) 2 cos( 2 2 ) cos( ) cos( ) 2 cos( 2 2 cos cos ) cos cos (2 2 2 2 2 2 1 2 1 2 1 2 1 1 2 1 2 1 2 2 1 1 2 2 1 1t V V t V V t V V t V V c t V t V b a t V t V I cV b V I 2 c V I 22 2 03 3 V I
17 2.5. Chapter Summary Characterization with traditional DC IV static IV measurements can cause errors in nonlinear model prediction accuracy due to therma l and trapping processes. Each effect is associated with a time constant, which allows th e approximate frequency-domain behavior of the trap and thermal processes to be ascertained. The use of pulsed IV and pulsed S-parameter measurement can enhance the ability of a mode l to accurately predict RF behavior.
18 CHAPTER 3: TIME-DOMAIN ANALYSIS OF PULSED IV WAVEFORMS As discussed in the previous chapter, pulsed IV measurements allow more accurate RF IV characteristics to be obtained. A time-domai n exploration of the waveforms used for these measurements and their properties provides a useful insight into this IV characterization method. Following the exploration of the waveforms, a method is given by which bias tees can be used with pulsed IV measurements. This method has the potential to allow measurement of devices that can become unstable during pulsed IV me asurements by presenting a frequency-dependent impedance to the gate and drain (or base and coll ector) of the transistor and could provide for pulsed IV measurement in a system configured for S-parameter measurements. In this chapter, the waveforms of the Ac cent Optoelectronics Dynamic i(V) Analyzer (DiVA), which allows pulsed IV measurement with pulse lengths as low as 0.1 microseconds (s), are examined . To allow users to better understand the method of pulsed IV measurement, a study of the voltage waveforms at the gate and drain ports of a model D265 DiVA has been performed. The analysis is easily performed for any pulsed IV system by using an oscilloscope with its two channels connected to the gate and drain channels of the pulsed IV system. The static measurement procedure on this instrume nt is similar to that of a traditional IV analyzer. For each value of gate voltage, the drai n voltage is swept linearly from its minimum to maximum value. In pulsed measurements, the quiescent bias point is set for a long period of time, and then pulses occur to each drain voltage at the drain and to the smallest gate voltage at the gate. After the voltage at both ports is return ed to zero, the process is repeated for each gate voltage until the maximum gate voltage is r eached. The pulse length and separation between pulses are chosen by the user. By zooming in with the oscilloscope, a single 1 s pulse was also analyzed. The pulse rise, fall, and hold times were measured. After adding half of the rise time and half of the fall time to the hold time, it was found that the measured pulse length was approximately 1 s, the pulse length setting. IV analyzers that are equipped with averag ing capabilities can provide more accurate and repeatable measurement results. The number of pulses taken for each point is equal to a number
19 entered by the user for averaging. The repeated pulses are clearly visible in time domain analysis. The average is taken of the currents resulting from each measurement to yield the result that is plotted. In addition to examining volta ge waveforms under pulsed and static instrument settings, the sequence of measurements and the relationshi p between entered parameters and measurement waveforms used by DiVA were examined. An op erator with similar knowledge of the methods of the measurement instrument is likely to be more successful at using the pulsed measurements to properly predict large-signal IV characteristics e xhibited by the transistor to be analyzed at RF and microwave frequencies. 3.1. Experimental Setup The setup used for the experiment is shown in Figure 3.1. The following is a list of equipment used for the experimental setup: Accent DiVA 265 Tektronix TDS 430A Two Cha nnel Digitizing Oscilloscope 2 Short 50-Ohm SMA Cables 1 M-M SMA Adapter 2 SMA-BNC Adapters Computer Running DiVA Software RS232 Cable for Connection Between DiVA and Computer Figure 3.1. Experimental Setup The manufacturer specifications for the DiVA 265 are shown in Appendix B. A short SMA cable was connected between the gate port of the DiVA and Channel 1 of the oscilloscope, G D DIVA 265 TDS 430A Oscilloscope
20 while another short SMA cable was connected betw een the drain port of the DiVA and Channel 2 of the oscilloscope. This allowed simultaneous me asurement of the gate and drain pulses. As a result, the relative timing of the pulsing between ports could be measured in addition to the voltage levels, pulse lengths, and pulse separation times. To capture the quickly-occurring waveform, it wa s helpful to use the triggering feature of the oscilloscope. The trigger settings used depe nded on the measurement being taken. With the Tektronix TDS 430A Oscilloscope, e dge triggering can be set to occur on a rising or falling edge when the waveform crosses a certain voltage leve l. This trigger was set based on knowledge of the resultant waveform. Following the time of tr iggering, data is retrieved for several screen widths of the oscilloscope. The time for which data is taken is adjusted by changing the horizontal (time axis) scale. However, for a lo wer seconds-per-division setting, the resolution is smaller. It was necessary to make several di fferent measurements with the scale and trigger settings based on known waveform characteristics and the desired form of the output graph. If it was desired to have a graph that zoomed in on the waveform, the seconds-per-division setting was raised; however, to view the time-domain re presentation of an entire pulsed measurement, it was necessary to drastically lower the time scale. 3.2. Static IV Measurement Waveform Analysis In a traditional IV analyzer, an IV measurem ent is performed by setting the lowest value of gate voltage and sweeping the drain voltage from the minimum to maximum value. The process is then repeated for the next lowest va lue of gate voltage. This is also the process determined to be used by the DiVA for static measurement. A static IV measurement was taken with settings as follows: VDS from 0 to 6 V VGS from -1.5 V to -1 V in steps of 0.5 V VDS maximum = 6 V ID maximum = 500 mA Instantaneous Power Limit = 1.4 W Average over: 16 samples Sweep Rate = 1 V/s The drain and gate voltage waveforms are shown in Figure 3.2. A VDS sweep is performed for the lowest VGS value (VGS = -1.5 V), followed by a VDS sweep for the second
21 lowest value of VGS (VGS = -1.0 V). Since this is the ma ximum gate voltage for measurement specified by the user, the data run ends following this measurement. The desired sweep rate of 1 V/s appears to be in effect, as VDS goes from 0 V to 6 V in 6 seconds, a rate of 1 V/s. A pause of about 2 seconds occurs between the sweeps. Drain and Gate Voltage Versus Time-2 0 2 4 6 8 -505101520 Time (s)Voltage (V) Gate Drain Figure 3.2. Static Measurement Results for Drain and Gate Voltages 3.3. Pulsed IV Measurement Waveform Analysis Analysis of the pulsed IV waveforms is best performed by limiting the number of (VDS, VGS) points for which measurements are performed. This allows the order of operations to be easily examined. The settings for an initial set of pulsed IV measurements performed with a quiescent bias point of VGS = -1.6 V, VDS = 3 V were as follows: VGS from -1 V to -1 V in steps of 0.1 V VDS maximum: 6 V ID maximum: 500 mA Instantaneous Power Limit: 1.4 W Bias Point VDS = 3 V Bias Point VGS = -1.6 V Average over: 16 samples VDS step size = 1 V Pulse Length (s) = 1000 Pulse Separation (ms) = 1 Drain and Gate Voltage Versus Time Time ( s ) Voltage (V)
22 Note that the duty cycle is 50 percent for the settings given above. The pulse length of 1000 s used is the largest available pulse lengt h for pulsed measurement, but was used because it allows the waveforms to be more easily viewed. It was assumed that the first voltage cha nge would be the change from 0 V to the quiescent bias point. Therefore, a falling-edge tr igger was applied to the oscilloscope channel used to measure gate voltage, with the triggeri ng level set to -1.20 V. A horizontal scale of 200 milliseconds per division (ms/div) was used. Figure 3.3 shows the gate and drain voltages versus time for the pulsed measurement. The gate and drain voltages begin at 0 V. Upon activation of the measurement run, these voltages are set to create the quiescent bias point of VGS = -1.6 V, VDS = 3 V. The bias point is maintained for a long time before pulsed measurements are pe rformed. In this case, the bias point was held for approximately 4.2 seconds before the onset of pulsing. This time, according to a typical thermal time constant (given by Abernathy) of 156 s  should be sufficient for the device thermal and trapping conditions to reach steady-state at the quiescent bias point. All pulsed measurements occurred within about 0.5 second at the end of the cycle. Following the pulsed measurements, the gate and drain voltages were immediately returned to 0 V. Drain and Gate Voltage Versus Time-4 -2 0 2 4 6 8 -10123456 Time (s)Voltage (V) Gate Drain Figure 3.3. Measured Drain and Gate Voltages Versus Time (Zoomed Out) To get a closer view of the portion of the waveform containing the actual pulsed measurements, a rising trigger was applied to the drain, with a triggering level of 880 mV. The horizontal scale was set to 10.0 ms/div. The resulta nt plot, shown in Figure 3.4, reveals that the DIVA 265 pulses from a bias point of VGS = -1.6 V, VDS = 3 V as desired. A series of drain Drain and Gate Voltage Versus Time Time ( s ) Voltage (V)
23 voltage measurements are taken at the lowest d esired measurement voltage level (0 V in this case) followed by a series of drain voltage measurem ents at a voltage increased by the step size (0 V + 1 V = 1 V). After each series, the voltage is increased by the step size until the maximum voltage to be measured is reached. Only one value of gate voltage was used for this measurement: VGS = -1.0 V. The gate voltage is pulsed from the quiescent gate voltage to this level for each value of drain volta ge. It is interesting to note that when the quiescent bias point VDS (3 V) is the VDS value to be measured, the graph appear s flat. This is because a pulse occurs from the quiescent bias point to itself, which is ideally the same as if no pulse were occurring. Because of the flatness, the temperature and trapping effects should be similar to those of a static measurement at the quiescent bias point. From th is vantage point, it is obvious that the pulsed and static IV curves should intersect at th e quiescent bias point of the pulsed measurement. Drain and Gate Voltage Versus Time-4 -2 0 2 4 6 8 -0.0500.050.10.150.184.108.40.206 Time (s)Voltage (V) Gate Drain Figure 3.4. Measured DiVA D265 Drain and Gate Voltages Versus Time (Zoomed In) The Â“Average OverÂ” setting, determined by the user before the measurement run, determines the number of pulsed measurements to be taken at each point. The measurements at each point are then averaged to prov ide the current value at that point to be used in the plot. In the present example, an Â“Average OverÂ” setting of 16 samples was used. Figure 3.5 displays the first two series of drain voltage measured for the D265. Since an averaging of 16 samples was set, 16 pulses are taken for each drain voltage to be measured. The plot shows that 16 measurements for the lowest value of VDS are taken as the first series with the given separation (1 ms), followed by a break. After the break, an additional measurement at the first voltage is Drain and Gate Voltage Versus Time Time ( s ) Voltage (V)
24 followed by fifteen measurements at the next vo ltage. Another break ensues, with the sixteenth measurement of the voltage determining the pr evious series being the voltage for the first measurement of the next series. This pattern is continued throughout the remainder of the measurement run. Thus seventeen measurements are made of the first drain voltage and sixteen measurements are made at all other drain voltag es. The measurement run concludes with a series of 1 pulse (Figure 3.6), which must be taken to complete the 16 pulses at the final voltage. DIVA Drain Output -0.5 0 0.5 1 1.5 2 2.5 3 3.5 -0.0200.020.040.060.08 Time (s)Voltage (V) Figure 3.5. First Two Series of DiVA D265 Drain Voltage Drain Voltage -1 0 1 2 3 4 5 6 7 80.22 0.23 0.23 0.23 0.24 0.24 0.25 0.25 0.25 0.26 0.26 0.26 0.27 0.27 0.28 0.28 0.28 0.29 0.29Time (s)Voltage (V) Figure 3.6. Final Measurement Pulses of DiVA D265 Drain Voltage DiVA Drain Output Voltage Time ( s ) Voltage (V) Drain Voltage Versus Time Time ( s ) Voltage (V)
25 In Figures 3.4 and 3.6, it can be seen that th e final voltage, 7 V, is measured twice (32 samples). For some voltages, the DiVA repeats the measurement (an additional 16 samples). This may be due to a failure of the first set of pulses to meet a specified tolerance. The double series has been observed for all models of DiVA. For the next measurement run, most of the settings were held constant. However, the quiescent value of drain voltage was set to 4 V. The resultant gate and drain pulses are shown in Figure 3.7. The difference between th ese results and those for a quiescent VDS of 3 V is that pulsing is taken from VDS = 4 V instead of 3 V. The trends mentioned above all hold for the new quiescent bias point. Drain and Gate Voltage Versus Time-4 -2 0 2 4 6 8 -0.0500.050.10.150.20.250.3 Time (s)Voltage (V) Gate Drain Figure 3.7. Gate and Drain Voltage Output for DiVA D265 Measurement with Quiescent VGS = -1.6 V, VDS = 4 V A measurement run was performed with the step in drain voltage changed to 0.5 V. The settings used are given as follows: VGS from -1 V to -0.5 V in steps of 0.5 V VDS maximum = 4 V IDS maximum = 500 mA Instantaneous Power Limit = 1.4 W Bias Point VDS = 3 V Bias Point VGS = -1.5 V Average over: 16 samples Drain and Gate Voltage Versus Time Time ( s ) Voltage (V)
26 VDS step size = 0.5 V Pulse Length = 1000 s Pulse Separation = 1 ms The resultant waveforms measured at the DIVA drain and gate channels are shown in Figure 3.8. The measurements still proceed in order from the lowest to highest drain voltage values, but it can be seen that the step size is 0.5 V. Drain and Gate Voltage Versus Time-2 -1 0 1 2 3 4 5 6 -0.100.10.20.30.40.5 Time (s)Voltage (V) Gate Drain Figure 3.8. DiVA D265 Measured Drain and Gate Voltages with VDS Step = 0.5 V, Quiescent Bias Point: VGS = -1.6 V, VDS = 3 V A measurement with two gate voltages was then taken. VGS was set to go from -1.5 V to -1 V in steps of 0.5 V, with VDS maximum = 2 V, VDS step = 1 V, and a quiescent bias point with VGS = -1.6 V, VDS = 1 V. It was observed that the first measurement was performed with VGS = 1.5 V, followed by the measurement for VGS = -1 V. From this it can be concluded that the sequences of gate voltages for a measureme nt run is from lowest to highest. A pulsed IV measurement using a quiescent VDS value that is not one of the VDS values to be measured was also examined. Settings used were VDS step = 1 V and Bias Point VDS = 1.5 V. The resultant gate and drain voltages are shown in Figu re 3.9. In this plot, there is no flat region in the center of the pulses because a pulse is neve r taken from the quiescent bias point to itself. Drain and Gate Voltage Versus Time Time ( s ) Voltage (V)
27 Drain and Gate Voltage Versus Time-2 -1 0 1 2 3 4 5 6 -0.1-0.0500.050.10.150.20.25 Time (s)Voltage (V) Gate Drain Figure 3.9. Gate and Drain Voltage Waveforms for Settings of VDS Bias = 1.5 V, VDS Step = 1 V, VDS Maximum = 4 V A close-up view of a pulse on the DiVA D265 was taken to examine the waveform properties. A pulse length of 1 s was used for this measurement. The pul se is shown in Figure 3.10. The drain voltage is pulsed from a quiescent point of 3 V to 0 V and the gate voltage is pulsed from quiescent point of -1.6 V to 1 V. Th e drain voltage rise time (it is actually falling) was measured from the oscilloscope as 70 ns (23.33 ns/V). The gate voltage rise time was also 70 ns (116 ns/V). The time for which the pulse ma intained its value was 930 ns for the drain and 945 ns for the gate. If half of the rise and fall times are added to the hold times, the pulse length is 1.0125 s for the drain and 1.000 s for the ga te. These are both very close to the desired pulse length of 1 s. The drain voltage appeared to be removed shortly before the gate voltage. The fall time of the drain voltage was measured as 95 ns (31.667 ns/V), while the gate fall time was 40 ns (66.67 ns/V). Drain and Gate Voltage Versus Time Time ( s ) Voltage (V)
28 Figure 3.10. Drain and Gate Voltage Versus Time for Zoomed-In View of DIVA D265 Pulse with Rise, Hold, and Fall Times 3.4. Use of Bias Tees in Pulsed IV Measurements There are several situations where it may be desired to use bias tees in a pulsed IV measurement. Devices can become unstable during IV measurement, causing the measured characteristic to change . It may be po ssible to avert such problems by changing the impedance presented to the frequency of devel oping oscillation from an impedance in the unstable region of the device to an impedance in the stable region. This may be attempted by using bias tees (Figure 3.11) in conjunction with a pulsed IV analysis system; however, the time constants of the inductor and capacitor in the bias t ee must be such that th e capacitor is seen as a short circuit and the inductor as an open circuit at the frequency of oscillation, while the opposite is true for the pulsed IV measurement waveform Another situation arises when the device is embedded in a test fixture with built-in bias tee ne tworks and dc blocks on the input and output of the fixture (potentially preventing pulsed IV measu rement through RF ports). In this section, pulsed IV waveforms taken through bias tees are ex amined. Finally, if pulsing through bias tees can be achieved, it could be possible to perform both S-parameter and pulsed IV measurements without changing the measurement setup. Drain and Gate Voltage Versus Time Time ( s ) Voltage (V)
29 A time-constant analysis can be used on the bias tee circuit of Figure 3.11 to provide insight to the situation. With each reactive elemen t, there is a time constant that determines the largest or smallest (depending on the configuratio n and element) rate of change in voltage level that can occur. For a capacitor, this time constant is given by RCC (3.1) where R is the resistance seen by the capacitor te rminals and C is the value of the capacitor. Similarly, the equation for the time constant of an inductor is R LL (3.2) with R being the resistance seen by the inductor termin als and L being the value of the inductor. L L1 Port RF Port DC Port DC+RF C C1 Figure 3.11. Bias Tee Circuit One possible motivation for bias tee use in the present case is to attempt to place the load impedance seen by the device-under-test (DUT) at the frequency of oscillation in a stable region of the Smith Chart when the DiVA input impedanc e is in an unstable region at the frequency of oscillation; without the bias tees, the load r esistance is dependent upon the resistance presented by the DiVA. The manufacturer specifications for the Accent DiVA 210 are given in Appendix B . As mentioned previously, another motivati on behind the use of bias tees may be the desire to perform pulsed IV and S-parameter measurements with the same system setup. In such a measurement setup, the vector network analyzer would be connected to the RF port and the IV analyzer and/or bias source would be connected to the DC port.
30 Table B.2 in Appendix B shows that the impedance presented by the drain port of the DiVA is 100 if the drain current is less than 50 mA and is 10 if the drain current is greater than 50 mA . If the bias tee is placed in th e circuit, the resultant impedance will be frequency dependent; that is, the AC impedance will be th e impedance when the capacitor is seen as a short circuit and the inductor is seen as an open circu it, while the DC impedance will be the impedance when the capacitor is seen as an open circuit a nd the inductor is seen as a short circuit. Referring to Figure 3.11, the DC + RF port is connected to the DUT, the RF port is terminated in a 50 ohm load, and the DC port is connected to the pulsed IV analyzer. For operation with this IV analyzer (no bias t ees), the impedance seen by the device for AC and DC is the 100 or 10 ohms presented by the instrument (potentially modified by the attenuation of the cables and the electrical length of the cables). If bias tees are included with a 50 termination placed on the RF port, then the DC impedan ce remains as the 100 or 10 ohms, while the AC impedance is 50 with the effects of cable length being added as necessary in the AC case. For oscillations occurring at low frequencies, a lump ed-circuit approximation can often be used to calculate the impedances. In DiVA pulsed IV measurements, pulses are simultaneously applied at the drain and gate ports to the points of measurement from a use r-defined quiescent bias point. The pulse length can be chosen from a list of values ranging from 1000 s to 0.1 s. According to DiVA literature, the sampling of the drain current takes place just before the end of the pulse. From this information and the theory of reactive time constants, it can be concluded that the reactive discharge from the inductor must be concluded before the drain cu rrent sampling occurs or the measurement could be affected. The length of time needed for this reactive discharge to take place is determined from (3.2). Thus, the usability of bias tees in pulsed IV measurement should be dependent on the inductor value and on the pulse length. An experiment using bias tees in conjun ction with pulsed IV measurements was performed in two parts. In the first part, the drain and gate wave forms were observed and recorded for available pulse lengths. The main f eature of these waveforms to be observed is the relative length of time for the discharge as compared with the length of the pulse, a feature which can be clearly seen. The second part of the experiment consisted of performing pulsed IV measurements on a GaAs MESFET with bias tees included and comparing the results with measurements performed for the same device wit hout bias tees. The configuration for the first part of the experiment is shown in Figure 3.12, while the configuration for the second part of the experiment is shown in Figure 3.13.
31 Figure 3.12. Setup for Oscilloscope Portion of Experiment Figure 3.13. Setup for GaAs FET Measurement The equipment used for the experiment is given as follows: Accent Optical Technologies DiVA 210 Tektronix TDS 430A Two Cha nnel Digitizing Oscilloscope 50-Ohm SMA Cables Bias Tee, Inmet Model Number 8800SFF2-06 (2.5 A Maximum) for use at Gate Bias Tee, Inmet Model Number 8820SFF2-02 (7.0 A Maximum) for use at Drain 1 M-M SMA Adapter DIVA 210 Data Bus Personal Computer Running Windows with DIVA Software CLY-5 GaAs FET in Coaxial Fixture Surrounded by Bias Tees G D DIVA 210 TDS 430A Oscilloscope Bias Tees
32 2 Female SMA 50 Ohm Terminations 1 Male SMA 50 Ohm Termination 2 SMA-BNC Adapters Computer Running DIVA Software RS232 Cable for Connection Between DIVA and Computer It should be noted that the bias tees placed at the gate and drain terminals are different model numbers, with different rated DC maximu m currents. This indicates that the inductance values (and hence the time constants of discharge ) are likely different for the two models. The DiVA settings used for the oscilloscope portion of the experiment are as follows: VGS from -1 V to 1 V in steps of 0.1 V VDS maximum: 6 V ID maximum: 500 mA Instantaneous Power Limit: 1.4 W Bias Point VDS = 3 V Bias Point V = -1.6 V Average over: 16 samples VDS step size = 1 V Pulse Length (s) = 1000 Pulse Separation (ms) = 1 Figure 3.14 shows the first part of the experiment in graphical form. A progression of plots of drain and gate pulses is shown as the pulse length is decreased. An examination of the plots in Figure 3.14 shows that the waveforms for the measurement with and without bias tees are similar when the pulse length is 1000 s, with the bias tee measurement showing only slight rounding. The measurement is made before any rounding at the end of the pulse occurs because the pulse length is defined as distance from when the voltage begins to change from quiescent to m easurement level to the time at which the voltage begins to return to quiescent level. Thus the e ffect that would destroy the measurement is the LR effect in the change from the quiescent bias point to the voltage to be measured (the first LR effect). The integrity of both drain and gate measurements appears to be preserved for a 1000 s pulse length.
33 Without Bias Tees With Bias Tees Without Bias Tees, Pulse Length = 1000 us-2 -1 0 1 2 3 4 -0.001-0.000500.00050.0010.00150.002 Time (s)Voltage (V) With Bias Tees, Pulse Length = 1000 us-2 -1 0 1 2 3 4 -0.000200.00020.00040.00060.00080.0010.0012 Time (s)Voltage (V) Without Bias Tees, Pulse Length = 50 us-2 -1 0 1 2 3 4 -2.00E05 0.00E+ 00 2.00E05 4.00E05 6.00E05 8.00E05 1.00E04 Time (s)Voltage (V) Series1 Series2 With Bias Tees, Pulse Length = 50 us-2 -1 0 1 2 3 4 -2.00E-050.00E+002.00E-054.00E-056.00E-058.00E-051.00E-04 Time (s)Voltage (V) Without Bias Tees, Pulse Length = 20 us-2 -1 0 1 2 3 4 -1.00E05 -5.00E06 0.00E+ 00 5.00E06 1.00E05 1.50E05 2.00E05 2.50E05 3.00E05 Time (s)Voltage (V) With Bias Tees, Pulse Length = 20 us-2 -1 0 1 2 3 4 -2.00E-05-1.00E-050.00E+001.00E-052.00E-053.00E-054.00E-05 Time (s)Voltage (V) Without Bias Tees, Pulse Length = 10 us-2 -1 0 1 2 3 4 -4.00E06 -2.00E06 0.00E+ 00 2.00E06 4.00E06 6.00E06 8.00E06 1.00E05 1.20E05 Time (s)Voltage (V) With Bias Tees, Pulse Length = 10 us-2 -1 0 1 2 3 4 -1.00E05 -5.00E06 0.00E+0 0 5.00E06 1.00E05 1.50E05 2.00E05 2.50E05 Time (s)Voltage (V) Figure 3.14. Pulsed IV Waveforms Without Bias Tees (Left Side) and With Bias Tees (Right Side) for Decreasing Pulse Length (Top Curves = Drain Voltage, Lower Curves = Gate Voltage)
34 The curves with bias tees appear more rounded for a pulse length of 50 s. The LR discharge time is the same for all pulse lengths but takes up a greater percentage of the pulse length as the pulse length is decreased. Despite this rounding, it appears that the gate and drain measurements should be accurate. For 50 s, the drain voltage appears to be acceptable, but the gate voltage may take too long to reach its desi red value of -1 V and thus the curve entitled Â“-1 VÂ” would actually have a lower voltage. The 20 s curve shows substantial corruption in both the gate and drain voltage waveforms, and for the 10 s waveform neither the gate nor drain voltage reaches its desired value. When measur ement was attempted for pulse lengths below 5 s, the time required to complete the measureme nt was substantially greater, likely because the IV analyzer had a difficult time obtaining measure ments at many of the voltages. The pulses are not shown; the time constant of the LR effect was so long that not enough drop in the drain voltage was accomplished to trigger the oscillo scope, meaning that the voltage was essentially held at the quiescent bias point for both VGS and VDS. From the RL discharge data obtained from the oscilloscope, the approximate values of the inductors in the gate and drain bi as tees can be calculated. Because a 50 system was used in conjunction with 50 terminations at the AC ports of the bias tee, the resistance seen at the inductor terminals in the gate bias tee is 50 + 50 = 100 while the resistance seen by the inductor in the drain bias tee is 50 (the oscilloscope path) + 10 (the DiVA path) = 60 For the gate, the time constant was measured by the oscilloscope as 12.2 s. This leads to an inductor value for the gate bias tee inductance, LG: R LG G 510 22 1 610 ) 100 )( 10 22 1 (5 GLH. Using the same approach for the drain bias tee with the resistance of 60 where the RL discharge time constant is estimated to be 14.2 s, gives an inductance value of 852 DLH. The magnitude of the measured inductor va lues were verified through an independent experiment. In this experiment, the cutoff freque ncy of the path between the DC+RF port and RF port of each bias tee was measured. A waveform generator was used to generate a sinusoidal signal with 3 V peak-to-peak and an oscilloscope wa s used to measure the amplitude of the output signal. The frequency was varied from 10 Hz until the peak-to-peak voltage lowered to reach the value of 1/ 2 times the 10 Hz voltage (this is the 3 dB cutoff frequency). For the bias tee used on the drain, the cutoff frequency was measured as 18. 5 kHz, while for the bias tee used on the gate,
35 a cutoff frequency of 17.1 kHz was observed. The formula relating cutoff frequency to the inductance is L R fc2 (3.3) Use of this equation with the measured cutoff frequencies gives LD = 931 H for the inductor of the drain bias tee and LG = 860 H for the inductor in the gate bias tee. These values possess the same order of magnitude as the inductance valu es found from the oscilloscope experiment. The difference observed between the gate values may be due to the fact that precise measurement of the time constant for the gate was difficult in the DiVA experiment due to the small amplitude excursion of the DiVA pulses. In the second part of the experiment, pul sed IV measurements were performed on a TriQuint CLY-5 GaAs MESFET for different pulse lengths with bias tees included in the experiment, according to the diagram of Fi gure 3.13. The results were compared to measurements taken for the same device taken without bias tees. Figure 3.15 shows the pulsed IV measurement results taken with and without bias tees for the CLY-5 device. The IV curves appear approximate ly the same for a pulse length of 50 s. The results for a 20 s pulse length appear slightly aff ected, as the slope is greater for the curves with bias tees for large VDS and low VGS. The difference in the IV characteristics is clear for the pulse length of 10 s, as the bias-tee curves resemble a set of straight lines with positive slope for large VDS. For a pulse length of 5 s, the plot is totall y corrupted. The results are consistent with the time constants estimated through the DiVA/oscillosc ope experiment, which are on the order of 10 to 15 s, and also match the time constants of 9. 31 s (drain bias tee) and 8.6 s (gate bias tee) calculated from the measured cutoff frequency of th e bias tee inductive paths. Thus, a pulse of longer than this time is necessary so that the m easurement can be taken for an accurate setting of gate voltage. The drain voltage is not as cr itical, because DiVA measures the drain voltage actually present. However, the effect on IDS of the bias tee RL discharge could pose a problem if a pulse of length lower than the time constant is applied at the drain. It can be concluded from this experiment th at performing pulsed IV measurements is acceptable as long as the pulse length is significantly gr eater than the time constant produced by the bias tee inductor. In the case of the Inmet bias te es used, a pulse length of 50 s is the lowest pulse length that can be used to provide unaffect ed results, while the results for 20 s are only slightly affected and could be used as long as the results for large values of Vds are not too critical. However, the results for 10 s pul se length and below were greatly corrupted.
36 Without Bias Tees With Bias Tees Pulse Length = 50 us Pulse Length = 20 us Pulse Length = 10 us Pulse Length = 5 s Figure 3.15. DiVA Pulsed IV Results With and Without Bias Tees
37 While the full benefits of pulsed IV meas urement cannot be obtained for pulse lengths below 50 s pulse length, this is likely to be short enough to avoid the full occurrence of thermal processes for many devices , allowing the results to much more accurately predict RF behavior than the alternative: static IV. Longer pulsed IV measurements may be sufficient in some cases to eliminate thermal effects or determine a therma l resistance value to allow thermal correction of the results. The best solution to the problem may be to use bias tees with lower inductor time constants (on the order of 50 ns) if the frequenc y at which instability occurs is higher than the cutoff frequency. Oscillations in transistors are of ten on the order of 1 to 5 MHz; therefore, the cutoff frequencies of the inductor paths are sufficien tly lower than this frequency range. Thus the use of these bias tees may help to eliminate o scillation in many devices. For lower frequency oscillations, it is possible that bias tees can be custom designed for an inductor-path cutoff frequency that is below this frequency of oscillati on to prevent instability, or a tunable bias tee can be used. If this frequency is too low, however, the bias tees may affect the pulsed measurement waveforms and a longer pulse length ma y be required for pul sed IV measurements. However, long-pulse measurements may still pr ovide better RF prediction than static measurements. 3.5. Chapter Summary Measurement waveforms at the drain and gate channels of a pulsed IV analyzer were measured using an oscilloscope. The measureme nts indicate that the static measurement is performed by ramping the VDS for each value of VGS. VGS values are applied in order from lowest to highest. For pulsed IV measurement, the ga te-source voltage is pulsed to its lowest value while the drain-source voltage is pulsed to all its values in the order of minimum to maximum. For each setting of VGS and VDS, the number of pulses taken is equal to the number entered by the user in the Â“Average OverÂ” category presented by the software. After the current has been measured at all VDS values for the first value of VGS, the process is repeated for the next lowest value of VGS. After all values of VDS have been measured for all values of VGS (or a power compliance has been reached), the measurement is complete. The pulse rise time, fall time, and hold time were measured for a pulse length of 1 s. Both the gate and drain waveforms seemed to approximately possess the pulse length entered by the user. Bias tees may be able to be used to allo w pulsed IV measurements to be performed on transistors in potentially unstable cases. To pr event oscillation, the cutoff frequency of the bias
38 tee DC path must be below the frequency of osc illation. However, this puts a lower limit on the pulse length that can be used without measurement corruption. In some cases, the necessary pulse length for uncorrupted pulsed IV measurement may be longer than desired, but may still allow improved results over static IV measurement s. In addition to possibly solving instability problems, the ability to pulse through bias tees coul d allow S-parameters and pulsed IV curves to be measured with the same setup.
39 CHAPTER 4: THE NORMALIZED DIFFERENCE UNIT For many years, sets of transistor currentvoltage (IV) curve data have been compared qualitatively. The degree to which the sets of IV curves are correlated is often determined by an Â“eyeballÂ” inspection in which the engineer determines that the curves either match well or deviate unacceptably. While comparisons have long been made between measured and modeled IV data, the advent of pulsed IV measurements has intens ified the need for a standardized metric for transistor IV comparisons. It is desired that such a metric be applicable to devices of all sizes and technologies and to IV comparisons of various ty pes (pulsed versus static, measured versus modeled, pulsed versus pulsed with different quiesce nt bias points, etc.). Such a metric would allow numerous additional comparisons. Various error functions have been used to optimize model fits to measured data. Several examples are given in the literature of such functions and their uses , . Some error functions have included weighted terms to allow a compromise between different parameters, wh ile others have focused on optimization of the output current alone. The proposed new metric, however, can be utilized in a variety of ways and may possibly be extended to diode IV analysis, a prospect which is beyond the scope of this work. In this chapter, several examples are give n of the use of the proposed normalized difference unit (NDU), including the use of the unit to compare pulsed and static IV curves, isolate effects in devices, determine a best-f it model, and compare repeatability between IV analyzers. From these examples, it can be seen how the NDU can be of benefit in analyzing and comparing IV curves. 4.1. Formulation In searching for a metric to compare IV da ta, several sources were consulted. Error functions have long been used within software programs to extract model parameters which provide an optimal fit to measured data. St audinger describes the error magnitude unit (EMU) used to choose the best-fit model fo r a FET in  as the following: N i gds dsmeasi i ds dsmeasi N i gm mmeasi i m mmeasi N i Ids DSmeasi i DS DSmeasiW g g g W g g g W I I I N EMU1 mod 1 mod 1 mod3 1, (4.1)
40 where IDSmeasi, gmmeasi, and gdsmeasi are the measured values of IDS, gm, and gds, respectively, and IDSmodi, gmmodi, and gdsmodi are the modeled values of these parameters at the ith (VGS, VDS) point. The EMU is a fractional discrepancy on a 0-to -1 scale with the weight coefficients WIds, Wgm, and Wgds summing to 3. These weight coefficients ar e assigned values which are dependent upon the level of compromise needed between DC IV characteristics and the value of gds at high frequencies. N is the total number of points used to obtain the large signal model, typically about 30. Due to dispersion in gds, the DC IV data measured does not produce a value of gds that is accurate for RF operation, so a compromise is obtained between values of IDS taken in DC IV data and values of gds extracted from large signal S-parameter measurements. Miller states that the compromise in the EMU is necessary because large signal models cannot accurately predict the gds dispersion . In a discussion concerning the fitting of a function to the IDS characteristic of a FET, Kacprzak and Materka give a minimization function describing the error in the fit as N i ci mi mi iI I I N F1 2) ( ) (max 1 (4.2) where N is the number of points used, the Imi are the measured points, and the Ici are the calculated values using a set of parameters [1 7]. In the Kacprzak-Materka algorithm, the parameters are adjusted until a minimum value of F is obtained. Notice that the square of the difference is used and that a normalization is performed by the largest measured value. A prominent feature of this number is that it is not unitless but is actually a current and has a unit of amperes. Because no square root is used in the numerator, a comparison resulting in similar percent differences for devices of different size may result in significantly different values of F. Thus this unit lacks the ability to be co mpared for devices of different size. In its model-fitting algorithm, software for the Accent DiVA minimizes the square of the difference between the measured and modeled curre nt value at each measured point, in a method similar to the Kacprzak-Materka method. For IV fitting, gm and gds are not needed in the minimization unit because no compromise between S-parameter and IV results is desired in this case. The measured values of gm and gds, though perhaps accurate for RF IV characteristics, would have to be obtained through estimation of the IV curve derivatives based upon measured values for IDS, causing a redundancy in the unit. A beneficial facet of the Kacprzak-Materka unit is that it only compares current values at the points used in the evaluation and also becau se it includes a normalization that is dependent upon device size. However, F values between different devices may not necessarily be
41 comparable. Also, the sum-of-squares approach causes small differences (less than 1) to be minimized (i.e. knee region misfits), whereas larger differences are Â“blown upÂ”. The fact that the result is not unitless leads to the conclusion that a different value of F is obtained for a device if milliamps are used to evaluate the result than ampe res; hence a unit of measure must be attached to the result to avoid ambiguity. A modification of the EMU for IV curve comparison could be obtained by setting WIds = 3 and Wgds = Wgm = 0 in equation (4.1) and changing the denominator to the average value between the two results compared, resulting in an equation that could be coined the Â“fractional difference unitÂ” or Â“FDUÂ”: N i DSmeani i DS i DSI I I N FDU1 2 11, (4.3) where IDSmeani, is the arithmetic mean of the current values IDS1i and IDS2i: 22 1 i DS i DS DSmeaniI I I (4.4) By substituting (4.4) in (4.3 ), the FDU expression becomes N i i DS i DS i DS i DSI I I I N FDU1 2 1 2 12 1 (4.5) This expression shows that if all drain current values are greater than or equal to zero (IDS1i 0 and IDS2i 0 for all i), then the value of the FDU is a number between 0 (in the case IDS1i = IDS2i) and 2 (in the case IDS1i = 0 or IDS2i = 0). When this formulation is used, however, reasonably small differences in regions where small values of curre nt exist, such as in the knee region and for VGS values near pinch-off can contribute significantly to the sum, while larger differences in regions of high drain source current contribute smaller numb ers to the sum. With this formulation, small differences in regions of small drain-source current can cause the suppression of information about differences in more critical areas of the IV plane that arise from critical temperature or trapping processes. While the fractional-difference approach is beneficial because it gives a result on a 0-to-1 scale and can be interpreted as an overall fractional difference, the development of undesired dominating regions is unavoidable in many cases. However, a good feature of this unit (and the EMU) is the use of absolute values of difference as opposed to taking the square of the difference. In addition, the FDU is unitless. While the FDU is not the unit that is sou ght, it does possess the desirable quality of being independent of device size, due to the normalizati on current factor in its denominator. However,
42 it is this normalization that causes the domination of the unit by regions where IDS is small. Instead of this approach, however, an approach similar to that of Kacprzak and Materka can be used (normalization by a size-dependent paramete r). Normalization by a current allows the metric to be unitless. The final desirable criterion, allowing the unit to be measurable on a 0-to-1 scale representing an overall fractional difference, can be preserved if the sum of the differences is normalized by the overall average value of cu rrent (from both sets of data). The normalized difference unit (NDU) is given by the following equation: DSmean N i DS DSI I I N NDU1 2 11, (4.6) where in this case N i i DS i DS DSmeanI I N I1 2 12 1. (4.7) The important difference between the NDU and th e FDU is that each difference is equally weighted in the NDU because it is divided by the same normalizing factor. This unit retains many of the good features of the Staudinger and Kacprzak-Materka units. The NDU for a bipolar device is obtained by substituting ICE for IDS in equations (4.6) and (4.7). Of potential mathematical interest is that in the case that th e average magnitude of difference is equal to the mean current value, NDU = 1. Among the applications of the NDU are providing a numerical comparison of pulsed and static IV results, isolating effects in a device and their cutoff frequencies, determining a best-fit model, and comparing the repeatability of IV anal ysis instruments. An example of each of these applications follows. 4.2. Measurement Repeatab ility as an Uncertainty Level For the NDU to be useful, it would be helpful to find an uncertainty level for its use. This would determine a Â“noise floorÂ”; that is, it would answer the question, Â“How large does the NDU have to be to indicate a notable or significant di fference in IV results?Â” In this example, the repeatability for two different measurements of the IV curves for a TriQuint CLY-5 GaAs MESFET was estimated using the NDU. The first m easurement of the IV curves was a static IV measurement on Instrument A with no averaging used and the second was a pulsed IV measurement on Instrument B with an averaging se tting of 64 samples. The measurements were
43 performed over approximately the same ranges on both instruments for the FET. A Â“standardÂ” set of IV curves was first taken for each instrument and then twenty subsequent sets of IV curves were measured, with the NDU being taken betw een each of the twenty measurements and the standard. For static IV measurement on Instrume nt A, the mean NDU was 0.028 with a standard deviation of 0.0060. For pulsed IV measurem ent on Instrument B, the mean NDU was 0.0038, with a standard deviation of 0.00059. This suggests that an y NDU measured over 0.01 may not be due to measurement repeatability, but could indi cate a bona fide difference in the IV curves. 4.3. Comparing Pulsed and Static IV Results The NDU can effectively be used to give a representation of the magnitude of overall differences between static and pulsed IV curves. In this example, the NDU comparing static and pulsed IV curves is given for two devices. Th e static and pulsed IV curves for a Sirenza Microdevices SGA-9289 heterojunction bipolar transistor (HBT) are shown in Figure 4.1, while the static and pulsed IV curves for a CLY-5 GaAs FET are given in Figure 4.2. The quiescent bias point used for each measurement is shown as an Â“XÂ” in the figures. The comparison for the GaAs FET was performed between the static IV and the pulsed IV with a pulse length of 0.2 s. An analysis of the HBT gives an NDU of 0.136 between static and pulsed IV results, while analysis of the CLY-5 GaAs MESFET gives an NDU of 0.222 between the static and pulsed IV data. Both results are well above th e measurement repeatability Â“noise floorÂ”of 0.01, so a definite difference is obtained by using pul sed IV measurement for each device. The fact that the NDU value for the HBT is much lower than that for the FET indicates that there is less difference between pulsed and static IV results for the HBT than for the MESFET. Because there is a higher NDU value comparing pulsed and static IV measurements for the GaAs FET than for the HBT, it could be concluded that a higher percenta ge of error would be incurred in using static IV measurements to characteri ze the GaAs MESFET for RF large-signal operation than the HBT in this case.
44 Figure 4.1. Static IV (Solid Lines) and Pulsed (Quiescent Bias Point: IB = 1.5 mA, VCE = 3.0 V; Pulse Length = 0.2 s) (Dashed Lines) IV for a SGA-9289 HBT Figure 4.2. Static (Solid Lines) and Pulsed (Quiescent Bias Point: VGS = -0.9 V, VDS = 4.0 V; Pulse Length = 0.2 s) (Dashed Lines) IV Curves for a TriQuint CLY-5 GaAs MESFET X X
45 4.4. Determination of a Best-Fit Model to IV Data Another useful application of the NDU is the numerical determination of the best-fit model from several candidate models to a set of IV data. The NDU is used to compare the measured and modeled IV data for each model, and the model corresponding to the lowest value of NDU may be said to provide the best overall fit in the (VGS, VDS) region of evaluation. In this experiment, the model fitting capabilities of the DIVA software were used to perform a TOM1 fit , an Angelov fit , and a Statz fit  for a selected PHEMT device from Agilent. Full Angelov Fit (NDU = 0.018) TOM1 Fit (NDU = 0.032) Statz Fit (NDU = 0.062) Figure 4.3. Angelov, TOM1, and Statz Fits to Pulsed IV Data for the Agilent ATF-35143 PHEMT (Measured IV Curves = Solid Lines, Modeled IV Curves = Dashed Lines) The model fitting was performed for pulsed IV data measured on a DiVA 225 for a ATF35143 400 m pseudomorphic high electron mobility transistor (PHEMT), manufactured by
46 Agilent Technologies. The model fitting was carried out within the DiVA software, which uses a routine to minimize the sum of the squares of the differences between the measured and modeled IV results . Figure 4.3 displays the measured and modeled data for the three fits used in the experiment and the NDU values obtained for the fits. A qualitative examination of the plots seems to show that, for the chosen device, the Statz model does a very poor job of modeling the curves in the breakdown effect and also provid es some discrepancies in the knee region. The TOM1 model results seem to match the measured data better at breakdown and in the knee region better than the Statz model, but not nearly as we ll as the Angelov model, which does an excellent job of modeling in the knee region and provides significantly better results in the breakdown region. Indeed, the NDU analysis confirms th is qualitative examination, as the NDU value for the Angelov fit (0.018) is significantly lower than that of the TOM1 (0.032) and Statz (0.062) model fits. To give information about the regions of fit of the different models, a set of normalized difference functions with a structure similar to the NDU can be constructed. These functions give the normalized difference as a function of one or both of the variables VGS and VDS. The normalized difference function D(VGS, VDS) is defined as follows: DSmean DS GS DS DS GS DS DS GSI V V I V V I V V D ) ( ) ( ) (2 1 (4.5) producing a three-dimensional surface plot of the no rmalized difference as a function of the value in the (VGS, VDS) plane. Two-dimensional plots often provide a less complicated graphical analysis, and the functions D(VGS) and D(VDS) are often sufficient to show regional trends in the curve differences. In this manner, the normalized difference is given as a function of one of the variables while averaged over all values of the other variable. That is, D(VGS) is the normalized difference averaged over all values of VDS and given as a function of VGS, while D(VDS) is the normalized difference averaged over all values of VGS and given as a function of VDS. These functions are formally defined as follows: L i DSmean DSi GS DS DSi GS DS GSI V V I V V I L V D1 2 1) ( ) ( 1 ) ( (4.6) M i DSmean DS GSi DS DS GSi DS DSI V V I V V I M V D1 2 1) ( ) ( 1 ) ( (4.7) Figure 4.4 gives plots of D(VGS) and D(VDS) for the Angelov, TOM1, and Statz fits.
47 D(VGS) D(VDS) Angelov TOM1 Statz Figure 4.4. Plots of D(VGS) (left) and D(VDS) (right) for Three Model Fits to the ATF-35143 PHEMT In the Figure 7 plots, it can be observed, because all plots are shown on the same scale, that the normalized difference is greatest, in general, for the Statz fit (as given by the NDU
48 values). The plots of D(VDS) all reach their maximum values for high values of VDS, indicating that the poorest region of fit for all three models is the breakdown region. The D(VGS) function for the Statz model shows that the Statz model fit is relatively poor for a gate voltage of -0.4 V. An observation of the IV curves in Figure 6 verifies this (the VGS = -0.4 curve is the third from the bottom), as the measured and modeled curves ar e greatly different in both the knee region and the breakdown region. The poor Statz f it in the breakdown region causes the D(VDS) plot to exceed 0.1 for VDS > 5.5 V. It is proposed that the NDU is an excellent decision-making metric for model-fitting applications. Provided the range of desired fit h as been properly measured, the fits of the models can be evaluated quantitatively instead of qualitativ ely. This example also shows how a graphical analysis with the normalized difference functions D(VGS) and D(VDS) can be used to enhance the NDU analysis of IV curve differences with the NDU by giving a numerical measure of the IV curve correspondences in different regions. 4.5. Chapter Summary The normalized difference unit is proposed as a metric for IV curve comparison. The quantification of IV curve comparisons opens the door to numerous opportunities for analysis. The repeatability of the measurement instrument being used for an IV experiment can be quantified to set a Â“noise floorÂ” for a comparison of curve sets. A comparison of pulsed and static IV can be performed, with the difference between the sets of curves given by the NDU. As the NDU becomes more widely used, the size of the NDU comparing pulsed and static IV curves should provide a feel for the relative amount of e rror attained when using static IV results in device modeling. Model fits can be quantitatively compared using the NDU, and the fit of models in different regions can be successfu lly analyzed using the normalized difference functions D(VGS) and D(VDS). The ability of the NDU to be used in a variety of applications, its ability to compare any two sets of IV data pertaining to a device, and the fact that it is not dependent upon device size should allow it to qua lify as a robust figure of merit for IV curve comparisons. Additional applications of the NDU us ed along with pulsed IV data are explored in the following chapters.
49 CHAPTER 5: ISOLATION OF PROCESSES As previously mentioned, the inaccuracy of st atic DC IV measurements can be attributed to trapping and thermal processes that occur at lo w frequencies , . It is shown in this chapter that the normalized difference unit (NDU) in troduced in Chapter 4 can be used to isolate processes in a device and the maximum pulse length allowed for avoidance of contamination (the Â“minimum time constantÂ”) by the thermal and trapping effects. Data is compared between static IV measurements and pulsed IV measurements a nd then between pulsed IV measurements taken from quiescent bias points of equal power dissipation using the NDU to discern the type of process and its minimum time constant. 5.1. Strategy for Effect Isolation In previous chapters, reasons for differences between pulsed and static IV results have been explored. As discussed in Chapter 2, a differe nt set of RF IV characteristics exists for each quiescent bias point. Because the NDU allows the e xpression of IV differences by a number, the difference between two sets of IV data can essentially be plotted against a desired parameter. The NDU describing the difference between the static a nd pulsed IV curves can be plotted against the pulse length used for the pulsed IV measurement. This plot provides information about consequences of decreasing the pulse length on the IV curves. If the time constant of an effect can be identified, then the effect cutoff freque ncy can be obtained. By definition, the time constant of an effect is the time required for 63 .2 percent of the change to occur (See Appendix A). This time constant may not be easily identifia ble for devices with multiple effects. However, the maximum pulse length for which the effect will not have time to occur can be identified with a NDU-versus-pulse-length plot. This pulse length is referred to within this work as the Â“minimum time constant.Â” A sharp decrease in the NDU when plotted against pulse length indicates that a significant difference in the IV results occurs from changing the pulse length only slightly. An identification of the approximate pulse lengths of sharp change in the NDU yields information about how short of a pulse must be used to avoid contamination of the results by thermal and trapping effects
50 Trap and thermal effects, discussed earlier, are present in most devices. Trapping is due primarily to surface and deep level states in th e semiconductor material. The temperature of a BJT junction or FET channel, which has an associat ed thermal resistance, is given by equation (2.5), restated here for convenience: A D Th CT P R T (5.1) where RTh is the thermal resistance, PD is the power dissipated in the junction, and TA is the ambient temperature. The power dissipated in a junction is given for a FET or HEMT in (2.6) and for bipolar devices in (2.7). These equations are restated here: DS DS DI V P (5.2) C CE DI V P (5.3) (5.1) allows the conclusion that if two m easurements are made under constant ambient temperature and with identical power dissipation, the temperature at the junction of the device (and hence the temperature effects) will be the same for both measurements. If the minimum time constants of trapping effects can be isolated, the remaining minimum time constants can be attributed to n on-trapping effects. The isolation of trapping effects is explained by Scott . First, two bias points are selected such that PD is the same for both points. Scott states that if two sets of IV data are obtained by pulsed measurement from two bias points of equal power dissipation, then the thermal conditions and processes for these measurements are the same, regardless of whether the pulse length is greater than or less than the minimum thermal time constant. In addition, he proposes that thermal and trapping time constants can be found through examination of a transient response to a step in gate and drain voltage. Trapping time constants can be isolated by jumping from one bias point to a bias point of identical power dissipation. Because power di ssipation is constant across the step and the thermal effects have reached steady state, the only r esponses to this step are due to trapping . A similar analysis can be performed using the NDU. The NDU can be taken to compare pulsed IV results from some quiescent bias point to static IV at different pulse lengths. Theoretically, all thermal and trapping time c onstants can be observed from this plot of NDU versus pulse length. In the second step, the NDU ca n be calculated to compare two sets of pulsed IV curves taken from quiescent bias points of equal power dissipation. The NDU can be plotted against pulse length or frequency and the time constants can be isolated from the NDU plot.
51 5.2. Experimental Results The NDU was used in an experiment in an attempt to estimate the minimum time constants of major thermal and trapping effects present in the measurement of the CLY-5 GaAs MESFET utilized in Chapter 4, manufactured by TriQuint Semiconductor. The effect isolation was also performed for a Sirenza Microdevices S GA-9289 SiGe heterojunction bipolar transistor (HBT). The isolated effects and associated time c onstants for the devices were then compared. Current-voltage data was obtained fo r the CLY-5 GaAs FET using the DiVA D265 model for the purpose of exploring the full IV range of the FET. First, a static IV measurement was performed for the device. Second, pulsed IV measurements were performed from a Class A quiescent bias point of VGS = -0.9 V, VDS = 4.0 V for all pulse lengths available on the D265. Third, pulsed IV measurements were performed for another bias point of power dissipation equal to that of the point VGS = -0.9 V, VDS = 4.0 V. At this point on the static IV curves, the Ids value is approximately 400 mA. T hus the dissipated power is 6 1 ) 400 0 )( 0 4 ( DS DS DI V PW If a drain voltage of 5.5 V is selected for th e second quiescent point, the current can be found from the dissipated power: 291 0 5 5 6 1 DS D DSV P IA A gate voltage of -1.2 V gives a drain current of 288 mA at VDS = 5.5 V, which is approximately the desired 291 mA. Thus the point VGS = -1.2 V, VDS = 5.5 V was selected as the second quiescent bias point for the thermally independent comparison. Plots of static IV and pulsed IV results are shown in Figure 5.1. The two bias points used for the pulsed IV results shown have identical di ssipated power levels at the quiescent bias points. A thermal droop is visible in the static and some of the pulsed IV results at high values of VDS and Ids (high dissipated power). The curves have a negative slope in these regions. As in static data shown in , the reduction in drain current in these areas is likely due to thermal effects. As the pulse length is reduced from 100 s to 10 s this effect disappears and the curves are no longer negatively sloped. This is observed for both quiescent bias points.
52 Static VGS = -0.9 V, VDS = 4.0 V VGS = -1.2 V, VDS = 5.5 V Pulse Length = 100 s Pulse Length = 10 s Figure 5.1. Static IV and Pulsed IV Results for Quiescent Bias Points VGS = -0.9 V, VDS = 4.0 V (Left Column) and VGS = -1.2 V, VDS = 5.5 V (Right Column). In each plot VGS ranges from -2.4 V to 0.3 V in steps of 0.3 V. Quie scent bias points are identified by circles.
53 A qualitative examination of the pulsed IV cu rve results pertaining to the two quiescent bias points of identical power dissipation reveals th at the sets of curves are more similar to each other for longer pulse lengths (as pulse length is reduced, they become more different). These sets of IV data become noticeably different at and below a pulse length of about 10 s. Intuitive reasoning explains this nicely: for longer pulse lengt hs, trap effects have time to occur at each location on the IV curves, and the trap effects are not dependent on the quiescent point. Hence the curves are very similar, because temperature e ffects are the same at each point as well (and at the quiescent point). As the pulse length is decreased, trapping effects are expected to depend only upon the quiescent bias point ; hence, a diffe rence in the two sets of curve results due to their different bias points. The normalized difference unit was used to compare the pulsed IV results with the quiescent bias point at VGS = -0.9 V, VDS = 4.0 V with the static results for each pulse length available from the DiVA 265: 1000, 500, 200, 100, 50, 20, 10, 5, 2, 1, 0.5, and 0.2 s. A plot of NDU versus pulse length for the CLY-5 GaAs FET is displayed in Figure 5.2 along with the estimated instrument repeatability Â“noise floorÂ” of NDU = 0.01. As long as the NDU plot is above this level, a bona fide difference is indicated. The goal of this set of measurements is to find the minimum time constant of each effect present in a device. Each minimum time constant appears as the pulse-length value immediately before a significant reduction in the slope of th e NDU curve. This means that by pulsing with slightly shorter pulse length, a negligible difference with the static curves is seen. Three distinct minimum time constants are observed in the solid lin e in Figure 5.2: 0.5 s, 50 s, and 500 s. It cannot be determined from the top line in Figu re 5.2 which type of effect is related to each of these minimum time constants. The co mparison of two sets of pulsed IV data with quiescent bias points at (VDS, IDS) locations of identical power dissipation can give this information. From this plot, the trapping mini mum time constants can be estimated and it is likely that these time constants correspond to t hose identified on the pulsed-versus-static NDU. A plot of the NDU comparing the pulsed IV r esults corresponding to a quiescent bias point of VGS = -0.9 V, VDS = 4.0 V to the pulsed IV results corresponding to a quiescent bias point of VGS = -1.2 V VDS = 5.5 V is shown as the dashed curve in Figur e 5.2. In this line, jumps are seen to level off at the two minimum time constants prev iously determined at 0.5 s and 500 s, but no jump appears at 50 s. Because thermal effects are excluded from the latter NDU, it is concluded that the minimum time constant at 50 s corresponds to a thermal effect. Thus 50min Th s
54 This means that if a pulse length shorter than 50 s is used for a pulsed IV measurement, then variable self-heating of the device should not be a factor in the results, and the temperature of the device should be set at the quiescent bias point chosen for the measurements. Figure 5.2. NDU Versus Pulse Length Comparing Static and Pulsed (Quiescent Bias Point: VGS = -0.9 V, VDS = 4.0 V) IV Measurements for the TriQuint CLY-5 GaAs FET Versus Pulse Length (Solid Line) and Comparing Pulsed IV Results for Quiescent Bias Points of Identical Power Dissipation (Dotted Line) Plotted With Instrument Repeatability (NDU = 0.01, Dashed Line) The two minimum time constants seen in the temperature-independent NDU seem to indicate that two major trapping effects occur, which will here be labeled as Â“fast trapsÂ” and Â“slow traps.Â” The idea of two trapping effects w ith vastly differing time c onstants is consistent with the findings of Khorasani et. al., who stat e in the development of a dynamic model for silicon wafers that two trapping processes exist, one on the order of microseconds and the other on the order of milliseconds . In this experiment, the slow traps have a minimum time constant of 500 s : 500min SlowTraps s and the fast traps have a minimum time constant of 5 0min FastTraps s
55 This indicates that to perform IV measurements containing no effects from slow trapping, a pulse length less than or equal to 500 s should be used, while to eliminate the effects of fast traps, a pulse length less than or equal to 0.5 s should be used. These results are summarized in Table 3. The minimum time constants of the effects we re consistent with information obtained in the literature. It has been stated that trap tim e constants have a magnitude of about 1 ms , backing up the statement that the effect with a mi nimum time constant of 500 s effect is due to trapping. In addition, the minimum time constant of the fast traps (0.5 s) is consistent with the findings of Ladbrooke and Bridge . The existence of multiple trapping processes with different time constants has been documented in the literature . The estimated minimum thermal time constant of 50 s is consistent with a qualitative analysis of the plots shown in Figure 5.1. It should be noted that a negative slope of the IV curves can be viewed for large IDS values for the static IV measurement and for pulse lengths of 1000 s and 100 s, but that no droop in the curves is observed for a slope of 10 s. This would lead one to conclude that the minimum time c onstant for thermal effects causing this sag lies between 100 s and 10 s, corresponding nicely with the estimate of 50 s reached by NDU analysis. The minimum thermal time constant of 50 s seems to be consistent with a FET example presented in , where it is conclude d that time constants lie in the Â“tens of microsecondÂ” range. A similar analysis was performed for th e SGA-9289 SiGe HBT using the DiVA model D210. Because effects in a silicon bipolar device are predominantly thermal , it is expected that the only effects isolated by the NDU analys is on the HBT will be thermal, with the NDU comparing pulsed IV results taken from quiescent points of equal power dissipation being flat versus pulse frequency. Figure 5.3 shows the static IV and pulsed IV curves (1 s) for the HBT, while Figure 5.4 gives the NDU-versus-pulse-length plots with the estimated instrument repeatability included. The NDU comparing pu lsed IV results for the quiescent points of identical power dissipation shows no cutoff frequency (it is basically flat, as expected) and lies along the measurement repeatability line, indicati ng only minimal differences between the results. One time constant is isolated from the static-ver sus-pulsed comparison, so it is attributed to a thermal process with a minimum time constant of 100 s. The results are summarized in Table 5.1.
56 Figure 5.3. Static IV and Pulsed IV (Quiescent Bias Point: IB = 1.5 mA, VCE = 3.0 V, Pulse Length = 0.2 s) for SGA-9289 HBT Figure 5.4. Plots of Normalized Difference Unit (NDU) Versus Pulse Length for the Sirenza Microdevices SGA-9289 SiGe HBT Comparing Stat ic and Pulsed (Quiescent Bias Point: IB = 1.5 mA, VCE = 3.0 V, Solid Lines) IV Measurem ents and Pulsed Measurements from Quiescent Bias Points of Equal Power Dissipation (Above Bias Point and IB = 2.1 mA, VCE = 2.0 V, Dotted Lines) Shown with the Estimated Instrument Repeatability (NDU = 0.01, Dashed Line) An NDU-versus-pulse length plot was also ex tracted for a GaN HEMT provided by GalEl, which has pulsed and static IV characteris tics as shown in Figure 5.5 and a NDU-versus-pulse
57 length characteristic as shown in Figure 5.6. The GaN HEMT, being a wide bandgap semiconductor device, is expected to have a si gnificant trapping process . Indeed, this is what is observed in Figure 5.6. A possible therma l effect has also been isolated, but this effect appears to be minimal, as the comparison of pulsed IV results for quiescent bias points of identical power dissipation yields NDU values that ar e very high, even higher than for the pulsedversus-static comparison. This tends to indicat e that there is a strong bias dependence of the trapping effects and that the NDU is extremely la rge even for points with identical temperature characteristics. Table 5.1 includes the GaN results. Finally, the experiment was performed for a Si LDMOSFET 1 Watt Cell provided by Cree Microwave. Figure 5.7 shows the pulsed and static IV curves for the device, while Figure 5.8 shows the NDU-versus-pulse-length comparison. As in the case of the SiGe HBT measured in this experiment, the Si LDMOSFET is expected to have very little trapping and a dominant thermal effect. This is evidenced by the plot of Figure 5.8, which indicates that the minimum thermal time constant for the LDMOS device is 0.2 s. The NDU comparing pulsed IV results at two quiescent points of identical power dissipati on reveals that a trapping effect may be occurring, but has nearly reached steady state at a time of 0.5 s. Due to the small magnitude of the pulsed-versus-pulsed NDU (it is near the measure ment repeatability line), the trapping effect for this device is assumed to play a very small role in the curve differences and is ignored. The time constant of the trapping effect cannot be po sitively identified from this experiment; the only conclusion that can be drawn is that it is less than 0.1 s. This is because the curve enters the plot on the left side with a downward slope; no flat region is observed for pulse lengths below the sloped region.
58 Figure 5.5. Static (Solid Lines) and Pulsed (Dashed Lines, Quiescent Bias Point: VGS = -4.5 V, VDS = 0 V) IV Results for the GaN HEMT Figure 5.6. NDU Versus Pulse Length Comparing Static and Pulsed IV Measurements for the GaN HEMT Versus Pulse Length (Solid Line) and Comparing Pulsed IV Results for Quiescent Bias Points of Identical Power Diss ipation (Dotted Line), Shown With Instrument Repeatability (NDU = 0.01, Dashed Line)
59 Figure 5.7. Static (Solid Lines) and Pulsed (Dashed Lines; Quiescent Bias Point: VGS = 3.5 V, VDS = 0 V) IV Results for the Si LDMOSFET (VGS = 4, 5, 6, 7, 8 V) Figure 5.8. NDU Versus Pulse Length Comparing Static and Pulsed IV Measurements for the Si LDMOSFET Versus Pulse Length (Solid Line) and Comparing Pulsed IV Results for Quiescent Bias Points of Identical Power Diss ipation (Dotted Line), Shown With Estimated Instrument Repeatability (NDU = 0.01, Dashed Line)
60 While the minimum thermal time constant is a useful number in determining the shortness of the pulse length necessary to avoid co ntamination of the measurements, the actual process time constant of an effect is also helpful. In Chapter 6, it is shown that the actual thermal time constant of the LDMOS device is 0.789 ms, a s ubstantially different number. It is this time constant which is used to describe the expone ntial approximation of NDU versus pulse length. These two values of time are both important, but have different meanings and should not be confused. Furthermore, the process time consta nt may not be easily obtainable from the NDU plot for devices with multiple effects. This example shows how the NDU can be used to isolate the time constants of processes for a FET and a BJT. This analysis can be u sed on practically any device to isolate (1) the number of major effects causing static IV results to be inaccurate, and (2) the type of effect. The use of NDU-versus-pulse-length plots to determine effects and necessary pulse lengths for accurate RF IV measurements is an excellent exam ple of how the NDU can be used to assist in obtaining more accurate IV characterization for RF nonlinear models. Table 5.1. Summary of Minimum Effect Time Constants Effect GaAs MESFET SiGe HBT GaN HEMT Si LDMOSFET Fast Trapping 0.5 s 0.2 s < 0.1 s Thermal 50 s 100 s 50 s 0.2 s Slow Trapping 500 s 5.3. Chapter Summary Isolation of effect time constants was performed using the NDU. A comparison of pulsed IV results of different pulse lengths with the sta tic IV results, expressed by a plot of NDU versus pulse length, was used to isolate process minimum time constants. A process minimum time constant is a pulse length immediately before a significant reduction in the slope of the NDU curve. A second NDU-versus-pulse-frequency co mparison was used to compare pulsed IV results from quiescent bias points of equal power dissipation at each pulse frequency. By (5.1), this plot reveals only the minimum time constants of non-thermal effects, which are assumed to be due to trap effects. Processes which have visible minimum time constants in the first NDU plot that were not seen in the second plot were identified as thermal processes.
61 CHAPTER 6: THERMAL RESISTANCE AND CAPACITANCE MEASUREMENT Pulsed IV measurements have already been explored as an improved solution to the inadequacy of static DC IV measurements to pr edict RF behavior in many cases. However, in some cases, even the pulsed IV measurements ma y not be sufficient to describe the complete nonlinear behavior of a device. In this ch apter, electrothermal modeling is addressed as an important part of the solution for predicting IV results for devices which contain predominantly thermal effects. It is shown that the electroth ermal model parameters can be extracted through direct measurement methods which make use of pul sed IV, allowing prediction of the IV results for situations where the quiescent bias point is not fixed or the signal has multiple varied frequency components. 6.1. Situations for Which Pulsed IV Measurements Alone Are Inadequate While it has been shown in this work that static DC IV measurements are often insufficient for use in the development of large-signal models at radio and microwave frequencies, it is here explained why the use of pulsed IV results alone may not completely explain the IV behavior of a transistor. In pulsed IV measurements, the thermal and trapping characteristics are wholly dependent on the qui escent bias point from which pulsing is performed , as well as the ambient or heat sink temperatur e. Pulsed IV measurements give an excellent indication of the proper IV characteristics in applications for which the quiescent bias point is known and constant throughout, and for which th ere is very little low-frequency content. However, models utilizing pulsed IV measu rements may not simultaneously provide a satisfactory prediction of DC and low frequency IV characteristics. The ability to predict low frequency characteristics may be critical in appli cations where the quiescent bias point changes in large signal operation, such as in Class B amplifiers or when a signal is composed of both high and low frequency components. In these situations both DC and RF IV characteristics must be simultaneously predicted with accuracy. An effective solution to this problem has been to introduce a dependence on channel temperature into some of the model parameters [2 6], while using a thermal Â“circuitÂ” to calculate
62 the channel temperature from the power dissipated in the FET (the following development can also be performed for bipolar devices with appr opriate changes in terminology). Figure 6.1 displays the thermal circuit that is used to calculate the channel temperature as a function of frequency. In this circuit, Rth is the thermal resistance, Cth is the thermal capacitance, TA is the ambient temperature (the temperature of the back side of the device), PD is the power dissipated in the channel of the FET, and TC is the channel temperature. In the thermal circuit analogy, temperature is analyzed as voltage and power as curre nt. The thermal subcircuit is very effective because it allows thermal calculations to be perform ed by a circuit analysis software tool. As given by (2.7), D DS DI V P (6.1) where VDS is the drain-source voltage and ID is the drain current. Pd + Cth Rth Ta Tc Figure 6.1. Thermal Subcircuit Used In Electrothermal Models It is to be shown in this chapter that the electrothermal model parameters can be measured directly with the aid of pulsed IV me asurements and the use of the NDU. First, the thermal resistance is dete rmined using pulsed IV techniques. Second, the thermal time constant th is found using the NDU with the method pro posed in Chapter 5. Finally the thermal capacitance is calculated from these values : th th thR C (6.2)
63 6.2. Thermal Resistance Measurement Using Proposed Method From the circuit of Figure 1, the channel temperature at DC and low frequencies is related to the power dissipated in the channel by A D th CT P R T (6.3) which is the result given by (2.5) the RthPD term accounts for the self-heating of the device. PD is calculated using (6.1) with the signal drain voltage and current at DC and low frequencies, but the quiescent bias point voltage and current are used for the calculation for operation at frequencies significantly higher than the inverse of the therma l time constant . For high frequencies where the quiescent bias point has zero power dissipation, (3) reduces to A CT T (6.4) Based on (4), for short-pulse IV measurements from a quiescent bias point where no power is dissipated, the channel temperature is equal to the temperature of the thermal chuck on which the device is placed . In a short-pulse IV measurement from a quiescent bias point of nonzero power dissipation, PD in (6.3) is calculated as the quiescent-point VDID product. Using this theory, it was possible to measure the thermal resistance of a 1 Watt LDMOSFET cell supplied by Cree Microwave, Inc., fo r which the static and pulsed IV results are shown in Figure 2. The quiescent bias point for the pulsed IV curves is VGS = 3.5 V, VDS = 0 V, a point of approximately zero power dissipation. The droop seen in the static IV results in the region of high power dissipation is an indicator that this device exhibits significant thermal effects . The curves were measured using a Accent Dynamic i(V) Analyzer (DiVA) model D225 . A Cascade Summit 12000 Probe Station equipped with a temperature controller was used to perform measurements for di fferent ambient temperatures. First, pulsed IV results were measured with a quiescent bias point of zero power dissipation: VGS = 3.5 V, VDS = 0 V, for an ambient temperature TA1 = 75 C. In this case, the channel temperature is equal to the ambient te mperature, as described by (6.4). Another measurement was made with a quiescent point of nonzero power dissipation: VGS = 5 V, VDS = 5 V. For this measurement, the value of PD in (6.3) is determined by the power dissipated at the quiescent bias point, calculated to be 0.3454 W. This measurement was repeated at different ambient temperatures until an optimal match was eventually achieved between the curves at TA2 = 47 C. Figure 3 shows the VGS = 8 V pulsed IV curve taken under three quiescent conditions: (A) VGS = 3.5 V, VDS = 0 V; TA = 75 C, (B) VGS = 5 V, VDS = 5 V, TA = 75 C, and (C) VGS = 5 V, VDS = 5 V, TA = 47 C. For setting (B), the curve is lo wer than the curve for setting (A), demonstrating that device self-heating is occurri ng due to the quiescent power dissipated in the
64 device channel that causes the channel temperature to rise above the ambient level. In setting (C), the ambient temperature has been lowered to exactly compensate for the self-heating, and the curve is indistinguishable from the curve obtained for setting (A). Figure 6.2. Static (Solid Lines) and Pulsed (Dashed Lines) IV Results for the LDMOSFET (VGS = 4, 5, 6, 7, 8 V) As pointed out by Jenkins, in the case of identical (VGS, VDS) points where IDS values are identical for two separate datasets (i.e. the IV curves cross), the device has roughly the same channel temperature , . Thus, the cha nnel temperatures for measurements of the curves with settings (A) and (C) are identical. The therma l resistance is obtained through use of (3) and (4) and the power dissipated in the channel: 47 3454 0 75 thR 06 81 thR C/W The match was checked at 45 degrees Celsius for three other bias points with a power dissipation value of 0.345 W and found to be excelle nt, with the match within about +/5 mA at all points.
65 Figure 6.3. VGS = 8 V curves for (A) TA = 75 C, Quiescent Point: VGS = 3.5 V, VDS = 0 V (zero power dissipation) (solid line); (B) TA = 75 C, Quiescent Point: VGS = 5 V, VDS = 5 V (dotted line); and (C) TA = 47 C, Quiescent Point: VGS = 5 V, VDS = 5 V (dashed lines, indistinguishable from curve pertaining to setting (A)) Instead of adjusting the ambient temperature to provide a match between the curves, the channel temperature can be changed by moving th e quiescent bias point (and hence adjusting the dissipated power). This second option to providing a match can also be used to extract a thermal resistance value. The curve with the quiescent bias point of nonzero power dissipation is measured at a fixed ambient temperature that is lower than the ambient temperature for the measurement of the curve corresponding to the qu iescent point of zero power dissipation. The measurement used in the first part (from VGS = 3.5 V, VDS = 0 V) taken at 75 C was again used as the standard. The ambient temperature for m easurement of the curve to be matched to the standard was selected as 55 C. A quiescent bias point of (VGS = 5 V, VDS = 5 V) was initially used. The comparison of the VGS = 8 V curve resulting from this quiescent point to the standard is shown in Figure 4. It can be seen that the c hosen quiescent bias point resu lts in a curve that is too low, indicating that the channel temperature fo r this measurement is higher than the channel temperature for the measurement chosen as the sta ndard. To lower the channel temperature in an effort to match the standard, a quiescent point of lower power dissipation was chosen. Comparisons were performed until a match was obtained for the quiescent bias point (VGS = 5 V, VDS = 4 V), as shown in Figure 5. The curves ar e nearly indistinguishable and appear as one curve. A,C B
66 Using measured current and voltage at the bias point as reported by the measurement data file (VDS = 4.01563 V, IDS = 69.706 mA), the power dissipated was calculated using (3): 279914 0 ) 069706 0 )( 01563 4 ( DS DS DI V PW. Thermal resistance was then calculated: W C P T T RD A A th 87 75 279914 0 55 752 1. Another similar experiment was performed : the ambient temperature was fixed at 55 C, while a matching curve was obtained by setting the quiescent bias point to VGS = 4 V, VDS = 11.5 V. The thermal resistance calculated from this experiment was W C Rth 45 71 The average measured thermal resistance for a channel temperature of 75 C is found to be 76.12 C/W. Figure 6.4. Comparison of Pulsed IV (Pulse Length = 0.2, VGS = 8 V) Curves for Quiescent Bias/Ambient Temperature Combinations (1)Top Curve: (VGS = 3.5 V, VDS = 0 V), 75 C, (2) Lower Curve: (VGS = 5 V, VDS = 5 V), 55 C
67 To examine the sensitivity of thermal re sistance to temperature, two similar measurements were performed for a channel temperature at 65 C. A pulsed IV curve for VGS = 8 V was taken from a quiescent bias point of (VGS = 3.5 V, VDS = 0 V) with an ambient temperature of 65 C and used as the standard. A match was obt ained for pulsed results from two different quiescent bias points at an ambient temperature of 55 C. For the quiescent point (VGS = 4 V, VDS = 11 V), a thermal resistance of 81.079 C/W was obtained, while for a quiescent bias point of (VGS = 4.7 V, VDS = 3 V), a thermal resistance of 73.033 C/W was measured. The results show approximately the same level of variance as the results for the 75 C channel temperature. The average thermal resistance for a channel temperature of 65 C is determined to be 77.056 C/W. This is less than 1 C/W different from the average thermal resistance corresponding to a channel temperature of 75 C. Figure 6.5. Comparison of Pulsed IV (Pulse Length = 0.2, VGS = 8 V) Curves for Quiescent Bias/Ambient Temperature Combinations (1) Solid Curve: (VGS = 3.5 V, VDS = 0 V), 75 C, (2) Dashed Curve: (VGS = 5 V, VDS = 4 V), 55 C. The overall average measured thermal resistance is 75.69 C/W. Because significant variations are seen between thermal resistance measurements performed at identical channel
68 temperatures, it is wise to take a large number of measurements and then average the results. It will be shown in Chapter 7 that using the average result of 75.69 C/W to thermally correct and synthesize IV curves for the LDMOS device provides excellent results. 6.3. Thermal Resistance Measurement Using Jenkins Method The thermal resistance value measured in th e previous section was verified through use of a method developed by Jenkins . In this method, static and pulsed IV curve crossings are examined for different temperatures. Using the estimation that the curves have identical channel temperatures at crossing points, a plot comparing the power dissipated in the static IV curves at the curve crossings and the channel temperature (d etermined by the temperature of the pulsed IV curves at the crossing point) can be constructed. A line is fit to the points with the intercept forced to be at 25 C. The slope of this line is the ther mal resistance, which describes the change in channel temperature for a change in power di ssipation. In this experiment, a static IV measurement was performed at TA = 25 C, along with pulsed IV measurements at 85 C, 105 C, 125 C, 145 C, and 165 C, with the results for VGS = 8 V shown in Figure 6.6. The plot of channel temperature versus power dissipation generated from the VGS = 7 V and VGS = 8 V crossing points is displayed in Figure 6.7, with each measured point shown as an X. The line which best fits this data is concluded to be the line D D CP P T 5 71 25 ) ( (6.5) The slope of this characteristic is the thermal resistance: 71.5 C/W. This is close to the 75.7 C/W obtained from the method developed in this work.
69 Figure 6.6. LDMOS Pulsed (85, 105, 125, 145, 165 C, Quiescent Bias Point: VGS = 3.5 V, VDS = 0 V, Dashed Lines) and Static (25 C, Solid Line) IV Curves for VGS = 8 V Figure 6.7. Channel Temperature Versus Po wer Dissipation Fit to Measured Points 6.4. Thermal Capacitance Measurement In electrical circuits, capacitors are elements which store charge. In the thermal subcircuit, however, the thermal capacitance Cth represents heat storage . To calculate thermal 85 C 165 C
70 capacitance, the thermal time constant must be obt ained . In Chapter 5, the minimum thermal time constant Thermal,min was found using the normalized difference unit. Thermal,min is the time constant related to the cutoff frequency of the th ermal effect and is thus the longest pulse length for which no change due to thermal effects is seen. The time constant related to the capacitor is defined by elementary circuit theory as the time required for 63.2 percent of the change due to thermal effects to occur. This time constant is here denoted as th and is defined in terms of the thermal resistance and capacitance by (6.2). Because the method of plotting the NDU versus pulse frequency or length shown in Chapter 4 essen tially shows the change in the IV curves versus time, the plot can be used to isolate th. As in Chapter 5, a static IV measurement and pulsed IV measurements (for all possible pulse lengths available on the D225) were perform ed, with the quiescent bias point being the zero power dissipation setting of VGS = 3.5 V, VDS = 0 V. The NDU was taken between pulsed IV results of different pulse length and the static IV results and is shown as the solid line in Figure 6.8 (This is the same plot as shown in Figure 5. 8). The dashed line is the NDU comparing pulsed IV measurements for quiescent bias points of equal po wer dissipation, as in Chapter 5. The fact that this line is very low indicates that the appr oximation that trapping effects are negligible is a reasonable judgment. Figure 6.8. NDU (Static Versus Pulsed: Solid Line, Equal Power Pulsed: Dotted Line, Instrument Repeatability: Dashed Line) Versus Pulse Length for the LDMOSFET, with the Estimated Thermal Effect Time Co nstant Indicated by an Arrow
71 By definition, the thermal capacitance in th e thermal circuit is the time for which the temperature reaches 63.2 percent of its final valu e. If the NDU could be used to measure this time constant, then a standard measurement met hod could be established for thermal capacitance. If the change in NDU after a power dissipation st ep (the situation occurring in pulsed IV measurement) can be related to the change in the channel temperature, then a formula can be derived to find the time constant from the NDU-ve rsus-pulse length plot. This, in fact, can be performed by using a Taylor series approximation to derive current as a function of channel temperature and then writing the NDU at the time cons tant in terms of the initial and final current values at all (VGS, VDS) points of measurement. In Appendix A, the differential equation govern ing the thermal circuit operation is solved to give the following solution for the channel te mperature as a function of time after the step in PD (where the value of PD before the step is zero): ) 1 ( ) (/th thC R t D th A Ce P R T t T (6.6) The equation can be restructured as follows: th thC R t A D th A A D th Ce T P R T T P R t T/) ( ) ( (6.7) Let A D thT P R T (6.8) be the steady state temperature, and AT T 0, (6.9) the temperature at t = 0. Then (6.7) can be rewritten as tht Ce T T T t T/ 0) ( ) ( (6.10) where the definition of th is given in (6.2). At t = th, the channel temperature is given by 1 0) ( ) ( e T T T Tth C. (6.11) Rearranging gives 1 0) ( ) ( e T T T Tth C (6.12) But (T0 T) is the complete change in temperature from the time the pulse is applied until steady state is reached. The left hand side of the e quation represents the change from in temperature from the time constant to steady state. Thus the change from the time constant to steady state is e-1, or 0.368, of the complete temperature change, implying that the change in temperature from t = 0 to the time constant is (1-e-1), or 0.632 of the complete temperature change.
72 Since information has been obtained about the time variation of temperature in response to a step in power dissipation, the next step is to relate the time variation of the current to the time variation of the temperature. Generalizing the results presented by Abernathy, Neidert, and Scott for a MESFET and by Sunde et. al for a MOSFET provides the relationship between drain currents at two different Kelvin channel temperatures: a C C C DS C DST T T I T I 1 2 2 1) ( ) (, (6.13) where a is a constant that is dependent upon th e doping concentration and the intrinsic material , , . From Figure 6.3, it is evident that IDS is a decreasing function of temperature. Therefore, a must be positive in (6.13). Streetman states that mobility is typically proportional to T-3/2 , while Abernathy gives values ranging from 2.02 to 0.47 for n-type GaAs. The average value of a listed by Abernathy for eleven doping conc entrations of GaAs is 1.17 . Thus a is likely a fairly small negative number in th e case of a GaAs MESFET. For MOSFET devices, Sedra and Smith indicate that increasing the temperature results in a decrease in IDS . Here it is assumed that (6.13) can be reasonably app lied to the LDMOSFET device with some unknown a. From (6.13), it is possible to give IDS as a function of channel temperature: a C C DST K T I ) (, (6.14) where K is a constant. Approximating the IDS(TC) function as a Taylor series centered at TC = T (the steady-state temperature) results in the following: ... ) ( 2 1 ) ( ) ( ) (2 2 C DS C DS DS C DSdT T I d dT T dI T I T I (6.15) Computing the value of the function and the derivatives at TC = T from (6.14) gives a DST K T I ) ( (6.16) 1) ( a C DST aK T T I (6.17) 2 2 2) 1 ( ) ( a C DST K a a T T I (6.18)
73 Inserting these results into (6.15) provides ... ) ( ) ( 2 ) 1 ( ) ( ) (2 2 1 T T T K a a T T T aK T K T IC a C a a C DS (6.19) Because the temperature values are in Kelvins, the denominator of the second term will be very large (near 300a+2 for most measurements of interest). a is a small positive integer value for FET devices, so the exponent in the denominator is likely to cause the value of T a+2 to be much larger than the difference (TC T)2. In addition, the difference in TC and T is expected to be no greater than 100 K for most of the problems encountered, so the denominator will massively outweight the numerator. This scenario becomes more exaggerated as the order of the terms increases, so it is concluded that the second a nd higher order terms can be ignored in the approximation, giving ) ( ) (1 T T T aK T K T IC a a C DS (6.20) Substituting the value of TC(t) from (6.10) into (6.20) gives tht a DSe T T T aK T K t I/ 0 1) ( ) ( (6.21) Define the constants T K A, (6.22) ) (0 1 T T T aK Ba, (6.23) and (6.21) becomes tht DSBe A t I/) ( (6.24) which has the same form as (6.10) and relates curre nt to the thermal time constant. In this case, A is the steady-state value of IDS and A + B is the value of IDS at t = 0. Define B A t I IDS DS ) 0 (1, (6.25) 1 2) ( Be A t I Ith DS DS, (6.26) A t I IDS DS ) (3. (6.27) Then (6.24) becomes tht DS DS DS DSe I I I t I/ 3 1 3) ( ) ( (6.28)
74 IDS2 is then defined in terms of IDS1 and IDS3 as 1 3 1 3 2) ( e I I I IDS DS DS DS. (6.29) Rearranging gives 1 3 1 3 2) ( e I I I IDS DS DS DS, (6.30) which indicates that the change in current between t = th and t = is e-1 (or 0.368) times the overall change that occurs between t = 0 and t = and that the change occurring between t = 0 and t = th is 0.632 times the overall change. This is exactly the result achieved for temperature. Thus the change in the current can be used to exactly measure the change in temperature (the thermal time constant th also serves as the current time constant). It still remains to be shown that the NDU can be used to measure the current time constant (which is the thermal time constant th). While the discussion up to this point has assumed all values of IDS pertain to one setting of (VGS, VDS), the NDU calculation involves IDS values at multiple (VGS, VDS) points. Thus, a subscript i can be added to the equations (6.28) through (6.30) to indicate the value of IDS at the ith (VGS, VDS) point. (6.29) is restated in this form as follows: 1 3 1 3 2) ( e I I I Ii DS i DS i DS i DS (6.31) IDS3i represents the IDS value at the ith (VGS, VDS) point at the shortest pulse length available and is used to estimate the current value immediately after the PD step is applied. IDS1i is the current value as time approaches infinity; in this case it simply is the IDS value measured by static IV at the ith data point. It is assumed that as time go es to infinity (steady-state conditions), the pulsed IV results approach the static IV results. IDS2i represents the drain-source current for a pulse length equal to the thermal time constant th. Three NDU values can be computed to allow the necessary derivation. The NDU between the data sets IDS1 and IDS3 (the NDU comparing the pulsed IV data for the shortest pulse length availabl e and the static IV data) is here denoted by NDU1,3 and found by use of (4.6) and (4.7) to be N i N j j DS j DS i DS i DSI I N I I N NDU1 1 3 1 3 1 3 1) ( 2 1 1, (6.32) which can be rearranged to the following:
75 N j j DS j DS N i i DS i DSI I I I NDU1 3 1 1 3 1 3 12. (6.33) The NDU comparing the datasets IDS2 (the IV data at a time t = th after application of the step) and IDS3 (the static IV data or data as t approaches infinity after the step) is here denoted by NDU2,3 and given as follows: N i N j j DS j DS i DS i DSI I N I I N NDU1 1 3 2 3 2 3 2) ( 2 1 1, (6.34) or N j j DS j DS N i i DS i DSI I I I NDU1 3 2 1 3 2 3 22. (6.35) If NDU2,3 can be found, the pulse length for which the NDU plot takes this value can be identified as the time constant. The goal is to write NDU2,3 in terms of the data values from IDS1 and IDS3 so that it can be computed from the short-pulsed IV (IDS1) and static IV (IDS2) data. Furthermore, it would be optimal if NDU2,3 could be expressed in terms of NDU1,3, as it would allow NDU2,3 to be more easily calculated. Proceeding in this di rection, (6.29) is used to give the following: N j j DS j DS j DS j DS N i i DS i DS i DS i DSI e I I I I e I I I NDU1 3 1 3 1 3 1 3 1 3 1 3 3 2) ( ) ( 2, (6.36) which simplifies to N j j DS j DS N i i DS i DSI e I e I I e NDU1 3 1 1 1 1 3 1 1 3 2) 2 ( ) ( 2. (6.37) (6.37) is a formula allowing computation of the NDU at the thermal time constant from the static
76 IV data and pulsed IV data for the shortest pulse length available. This can be computed by a computer package using the data from the IV measurements. For the LDMOSFET analyzed in the experiment, the value of NDU2,3 was found to be 0.0848 using this method. In continuing the attempt to find NDU2,3 in terms of NDU1,3, it is possible to express NDU2,3 as N j N j j DS j DS j DS j DS N i i DS i DSI I e I I I I e NDU11 3 1 1 3 1 1 3 1 1 3 2) ( ) 1 ( ) ( ) ( 2. (6.38) Dividing the top and bottom by N m m DS m DSI I1 3 1) ( gives N m m DS m DS N j j DS j DS N m m DS m DS N j j DS j DS N m m DS m DS N i i DS i DSI I I I e I I I I I I I I e NDU1 3 1 1 3 1 1 1 3 1 1 3 1 1 3 1 1 3 1 1 3 2) ( ) ( ) 1 ( ) ( ) ( ) ( ) ( 2 (6.39) To proceed, it is helpful to make the reasonable assumption that N j j DS j DSI I1 3 10 ) (. (6.40) Using this assumption allows the first term in th e denominator to become 1. Furthermore, the term in the numerator is equal to e-1 NDU1, 3. The result is N m m DS m DS N j j DS j DSI I I I e NDU e NDU1 3 1 1 3 1 1 3 1 1 3 2) ( ) ( ) 1 ( 1. (6.41)
77 The second term has a form similar to that of NDU1,3, but its numerator does not have an absolute value sign included inside the summation. To include this absolute value sign for each term in the summation would require IDS1j > IDS3j for all values of j from 1 to N, equivalent to stating that the pulsed IV current values must be greater than the static IV current values for the entire measurement area. From an examination of Figure 6.2, the upper three pulsed IV curves are higher than the corresponding static IV curv es, but in the lower two curves, the pulsed IV curves dip below the corresponding static IV results in some places. While this dip is only slight and may be small enough that the assumption coul d still provide accurate results, it should be realized that the next step is a result of an assu mption that needs to be made after taking the IV characteristics of the particular device under exam ination into consideration. For the LDMOS device, making the simplifying (but not completely true) assumption that IDS1j > IDS3j for all integer values of j from 1 to N gives N m m DS m DS N j j DS j DSI I I I e NDU e NDU1 3 1 1 3 1 1 3 1 1 3 2) ( 2 ) 1 ( 2 1 1, (6.42) leading to the much-anticipated result that 3 1 1 3 1 1 3 2) 1 ( 2 1 1 NDU e NDU e NDU (6.43) While (6.43) results from an assumption that does not hold in all cases, its use is desired if possible because it does not require use of all th e data points from the static and short-pulse IV measurements, but only the NDU between the short-pulse and static IV results. Because NDU1,3 for the LDMOSFET is 0.216 (from Figure 6.8 at a pulse length of 10-7 seconds, (6.43) becomes 0852 0 216 0 ) 1 ( 2 1 1 ) 216 0 (1 1 3 2 e e NDU Comparing to the value NDU2,3 = 0.0848 calculated without the approximation in (6.37), it seems that the difference in results by using the appr oximation is minimal and that the use of the approximation in this case is acceptable. This can be justified by noticing that the difference
78 between the approximated and exact NDU2,3 results is comparable in magnitude to the repeatability Â“noise floorÂ” NDU values presented in Chapter 4. From the above discussion, the thermal time constant th is the pulse length at which the NDU value reaches NDU2,3 = 0.0848. From Figure 6.8, it can be seen that the pulse length for which the NDU has a value of 0.0848 is th = 0.697 s (labeled with an arrow in Figure 6.8). It is at this time that 68.2 percent of the change in temperature has been achieved. From (2), the estimated thermal capacitance is sec 10 20 9 69 75 10 697 06 3C W x x R Cth th th The result is of the same order of magnitude as the value of thermal capacitance extracted by Yang et. al. for a Si LDMOSFET (Cth = 35.5 x 10-6 W-sec/ C) . The cutoff frequency can also be calculated fro m the thermal time constant by using the following result from Appendix A: th cthf2 1 (6.44) 228 ) 10 697 0 ( 2 13 x fcth Hz Thus, it is concluded that for frequencies be low 228 Hz, the channel temperature will be dependent upon the power dissipated at the signa l location; however, for frequencies above 228 Hz, the channel temperature will be dependent on the power dissipated at the quiescent bias point. At this point, it is instructive to consider differences in the above derivation for a bipolar device. For bipolar junction devices, ICE increases with increasing temperature. Thus a in (6.13) and (6.14) is negative, assuming this functi onal form is applicable. The exponent of T decreases by 1 for each term, so it will eventually become su fficiently negative (likely by the third term) to allow the higher-order terms to be removed. The linear approximation should still be reasonable. Finally, the approximation leading to (6.42) would be changed to state that IDS3j < IDS1j for all j from 1 to N. This results in i DS i DS i DS i DSI I I I3 1 3 1 (6.45) This would give the following approxima tion for BJT devices instead of (6.43): 3 1 1 3 1 1 3 2) 1 ( 2 1 1 NDU e NDU e NDU (6.46)
79 6.5. Chapter Summary It is shown that the thermal resistance and capacitance can be extracted through pulsed IV measurements in conjunction with analysis by the normalized differe nce unit. The adjustment of the ambient temperature to compensate for self-heating at the nonzero power-dissipation quiescent bias point is a simple operation and allows the determination of channel temperature, which can be used to find thermal resistance. This type of curve matching should lend itself well to minimization of a numerical metric such as the NDU. The use of a NDU-versus-pulse-length plot to measure the thermal time constant is math ematically justified. The time constant can be used to calculate the therma l capacitance and the thermal cu toff frequency. The ability to measure the time constant is critical because it allows a frequency dependence to be added to the thermal circuit. Electrothermal models contai ning a thermal subcircuit are advantageous over models based on only static DC IV or pulsed IV measurements in that they can simultaneously predict IV behavior at radio frequencies, lo w-frequency components, a nd DC. In addition, measurement of these parameters allows the generation of thermally corrected IV results when pulsed IV measurement is not availabl e, as discussed in the next chapter.
80 CHAPTER 7: THERMAL CORRECTION OF IV CURVES In Chapter 6 it was shown how approximate thermal resistance and capacitance values can be measured using pulsed IV measurements fo r devices with predominantly thermal effects. This chapter helps to verify the Chapter 6 ther mal resistance results by showing that static IV characteristics can be thermally corrected to pr ovide high-frequency results for a given quiescent bias point if the thermal resistance is known. Th is method is presently applicable for devices in which trapping effects are negligible. B ecause trapping effects do not exhibit the same dependences as temperature, the trapping effect s most likely would not allow the procedures mentioned here to produce accurate results. These thermal correction methods may assist in cases where a pulsed IV measurement system is not readily available, but the thermal resistance of the device is known. One situation in which th is method should prove par ticularly helpful is in the measurement of large transistors with ranges of current and voltage for which pulsed IV test systems are not readily available in a laboratory. It is likely that the results presented in this chapter can be easily extended to allow ther mal correction of multiple-bias S-parameter measurements used in the creation of a nonlinear model. 7.1. Temperature Dependence of IV Results The well-known equation giving channel temperature in terms of ambient temperature, thermal resistance, and power dissipated in the device can be used in the IV curve correction process known as thermal de-embedding. In static IV measurement, self hea ting occurs at each point on the trace. In short-pulse IV measureme nt, the self-heating is dependent on the quiescent bias point . For pulsed IV measurements wh ere no power is dissipated at the quiescent bias point (VDS or ID is zero), the channel temperature is simply equal to the ambient temperature. Using these considerations, a knowledge of thermal resistance allows the channel temperature to be ascertained for each (VGS, VDS) point in a static IV measurement. Using the approximation taken by Winson for many of the model parameters , it is assumed that IDS is a linear function of temperature, b mT T IC C DS ) (, (7.1)
81 where m and b are the slope and intercept of the line, respectively, the value of IDS can be corrected at each measured point to represent a di fferent channel temperature. As previously stated, thermal characteristics in RF operations are dependent on the quiescent bias point; hence, each quiescent point exhibits its own set of RF IV and S-parameter characteristics . Creating IDS as a function of channel temperature by polyno mial expansion (here a 2-term polynomial is used, but the coefficients of a higher order polynomial can be extracted if measurements at additional temperatures are made) allows correc tion to the thermal conditions given by any quiescent bias point; an important step for RF prediction. 7.2. Thermal Correction of Static IV Curves For the 1 Watt LDMOSFET cell measured in Chap ter 6, a thermal resistance value of 75.69 C/W was extracted. This value of thermal re sistance was used to synthesize the IV curves displayed in this chapter. The thermally corr ected curves displayed in this chapter serve as somewhat of a check for the thermal resistance result obtained in the previous chapter. First, the coefficients of the first-order polynomial (linear) approximation were extracted from static IV data taken at ambient temperatures TA1 = 25 C and TA2 = 85 C, chosen to provide channel temperatures at the extremes of the range of interest. The linear approximation was then performed by MathcadÂ™ , which extracted the coefficients m and b from (7.1) for each (VGS, VDS) point used in the measurement. The static IV curves at these two temperatures are shown in Figure 7.1. It is evident that the curves taken at lower temperatures are lower for the upper three curves. A slight rise in the lower two curves is observed for the increase in temperature.
82 Figure 7.1. LDMOSFET Static IV Curves (VGS = 4, 5, 6, 7, 8 V) at TA1 = 25 C (Solid Lines) and TA2 = 85 C (Dashed Lines) After extraction of the IDS(TC) characteristic from these results, the static IV results which are to be corrected can be measured and input into the MathcadÂ™ worksheet for correction. In this case, the data to be corrected is a set of sta tic IV curves taken with an ambient temperature of 75 C. First, these curves are corrected to a quiescent bias point of zero power dissipation (meaning that the channel temperature is equal to the ambient temperature) at TA = 75 C. The corrected curves are shown with the initial static IV results in Figure 2 and with measured pulsed IV results taken from a quiescent point of VGS = 3.5 V, VDS = 0 V (zero power dissipation) in Figure 7.3. Some ripple can be noticed in the correct ed IV results; this is due to the fact that the IDS(TC) approximating function is calculated for each (VGS, VDS) point. As this may cause errors in parameter extraction (gds, for example), it may be desired to alter the curves with a smoothing function for improved results. The fit of the cu rves compared in Figure 7.3 is excellent; the normalized difference unit (NDU) between the corr ected static IV results and the pulsed IV results is a mere 0.017, improved from 0.102 for the uncorrected results (Figure 7.2). As an
83 idea of the correction accuracy, it was shown in Chapter 2 that repeatability error may cause NDU values as high as 0.013 between Â“identicalÂ” pulsed IV measurements. Figure 7.2. Uncorrected Static IV Curves (S olid Lines) and Corrected IV Curves for Zero Power Dissipation Quiescent Bias Point (Dashed Lines) The next step in the thermal correction pro cess is to synthesize the RF IV results for a given quiescent bias point of nonzero power dissipation. As a first example, the curves are corrected to the quiescent bias point VGS = 5 V, VDS = 5 V for TA = 75 C To correct the curves to this point, the channel temperature is calculated using (1), with the value of PD calculated by the VDSID product at the quiescent bias point. The power dissipated at this quiescent bias point is 353.mW. The measured pulsed IV curves and the corrected static IV curves for this quiescent bias point are shown in Figure 7.4. The NDU of 0.015 (once again, just above the repeatability NDU for the instrument) between these results s hows that the process results in an accurate match. X
84 Figure 7.3. LDMOS Thermally Corrected (Solid Lines) and Pulsed (Dashed Lines) IV Results for Quiescent Bias Point of Zero Power Dissipation The curves were also corrected to give RF IV results corresponding to a second quiescent bias point with a higher value of power dissipation: VGS = 6 V, VDS = 10 V. In addition, the ambient temperature of the corrected IV curves was set to be 45 C. The power dissipated at the quiescent bias point in this case is 1534 mW. In Figure 7.4, the corrected static IV results are compared to the pulsed IV measurement taken for the same quiescent bias point and ambient temperature. The NDU for this comparison is approx imately 0.030, showing an error that is more significant but still small. It is proposed that a similar modification c ould be made to a multiple-bias small signal Sparameter measurement to obtain large signal S-pa rameters with thermal effects dependent only on the quiescent bias point. At each frequency, for each bias point, the [S] matrix could be modified to exhibit the correct temperature charact eristics. First, it is necessary to assume that each S-parameter is a function of channel temper ature and extracting a polynomial (it is possible that a linear approximation is sufficient) for S11, S12, S21, and S22. Finally, [S] could then be X
85 corrected at bias point and frequency by finding the values at the channel temperature that is calculated using the quiescent power dissipation. Figure 7.4. Corrected Static IV (Solid Lines) and Pulsed IV (Dashed Lines) Results for Quiescent Bias Point VGS = 5 V, VDS = 5 V (Labeled with an X) at TA = 75 C X
86 Figure 7.5. Corrected Static IV (Solid Lines) and Pulsed IV (Dashed Lines) Results for Quiescent Bias Point VGS = 6 V, VDS = 10 V (Labeled with an X) at TA = 45 C The results of this experiment are important in that they show that the correct IV characteristics for a device with dominant therma l effects can be synthesized from static IV results at multiple temperatures if the thermal resistance is known. This allows thermally corrected results to be generated without the u se of pulsed IV measurements. In addition, it intuitively leads to a method in which large-si gnal S-parameters might be corrected for some devices where trapping effects are minimal without the purchase or setup of a pulsed S-parameter system. The ability to measure at different temperatures and a knowledge of the thermal resistance is all that is required to implemen t these procedures using a traditional IV analyzer (and/or network analyzer). In many cases, devices may have a normal ope rating range that is too large to be measured by readily available pulsed IV analyzer s. However, the thermal resistance could be measured using the method of Chapter 6 in a region that is accessible with an available pulsed IV analyzer. The static IV curves could then be taken over the full operating range by a traditional static DC IV methods and converted to the desi red thermally corrected Â“RF IVÂ” results using the thermal correction procedure presented in this chapter. X
87 In many cases, the thermal resistance is not constant for a device over the range of measurement, but is a function of power dissipate d and ambient temperature . This issue may be addressed by measuring the thermal resistance at various conditions and then using a thermal resistance matrix to describe the temperature power relation for several regions in the plane, as proposed by Maas . The methods discussed above are applicable for devices with minimal or no trapping effects. Quarch and Collantes address the appli cation of electrothermal models to devices with traps by including additional circuitry in the main circuit of the transistor model to describe a back-charge effect on the gate  Direct extraction of the trap circuit parameters in addition to the thermal sub-circuit for high-trapping devices is an interesting application for future study 7.3. Chapter Summary The thermal resistance value found throu gh the experimental method presented in Chapter 6 was used to thermally correct IV cu rves to possess the characteristics of a particular quiescent bias point and ambient temperature. While a linear approximation of the IDS(TC) characteristic was used, the results compared ex cellently with measured pulsed IV results for three examples. The ability to synthesize accura te RF IV results from traditionally measured static IV data allows devices with (VDS, VGS) ranges that are too large for pulsed IV measurement to be accurately characterized for RF performance. The thermal resistance can be measured in a low-power area of the deviceÂ’s operating range with a pulsed IV analyzer. Static IV curves are then measured with an IV analyzer possessing higher power capabilities and corrected using the thermal resistance value and the quiescent conditions.
88 CHAPTER 8: CONCLUSIONS AND RECOMMENDATIONS This thesis has explored applications of IV measurements taken under short pulsed conditions to non-linear modeling of radio frequency (RF) and microwave transistors. A key contribution is the proposal of a new metric for comparing sets of IV curves called the normalized difference unit (NDU). It has been shown herein that pulsed IV measurements can be used in various ways to explore minimum time consta nts for thermal and electronic trapping processes within different types of transistors. This stud y included a revealing analysis of devices for which trapping effects were clearly present in compound semiconductor MESFETs and HEMTs, and devices for which thermal effects were the domin ant difference between pulsed and static IV results, as in the case of silicon LDMOSFET and SiGe HBT devices considered. This latter class of devices was used in a case study to demonstrate new and very practical methods for determining eletrothermal models for transistors and to use the models to thermally correct IV results. These contributions should be useful to engineers involved with modeling of microwave transistors who seek ways to best utilize pul sed and static IV measurements for better understanding of the devices they are trying to model and for extracting valid electrothermal nonlinear models for these transistors. An examination of pulsed IV waveforms in the time domain has revealed some interesting features and improved understanding about the pulsed IV measurement itself. First, it is imperative that the quiescent bias point be set for a time long enough for the processes in the device to reach steady state before pulsing is begun. Second, it is important to use a pulse length and pulse separation for IV measurement that a llow the process conditions to remain in steadystate at the quiescent bias point. Finally, it is seen that while bias tees may be able to increase the stability of the device, the inductive response of the tee affects the shape of the pulse. However, the measurement result should remain acceptable as long as the LR discharge reaches its final value before the measurement is taken at the e nd of the pulse. This was shown to be a valid hypothesis through examination of the IV plots taken from different pulse lengths along with a time-domain representation of the pulsed waveforms taken through a set of commercial bias tees. While the minimum pulse length that can be used while obtaining results that are unaffected by
89 the bias tees may be large in some cases, pul sed IV measurements through bias tees can still provide a significant improvement over static IV results for devices whose thermal or trapping minimum time constants are larger than the mini mum pulse width that can be utilized through the bias tee. An understanding of how to validate this minimum pulse width may provide the ability to design custom bias tees to allow pulsed IV m easurement while providing device stability for particular devices. This would also allow design of bias tees for a system that could perform pulsed IV and pulsed S-parameter measurements with the same setup. The aforementioned NDU has been shown to be a metric that can be used in a number of situations to express IV curve differences. It can be used to compare pulsed and static IV results, pulsed IV results for different quiescent bias points, and measured and modeled results. Furthermore, the NDU can be computed to comp are measurements taken with identical settings on an IV analyzer to compute the Â“noise floor Â” for measurement repeatability. Computing the repeatability basis allows real differences to be distinguished from variations due to measurement non-repeatability. The NDU can also be used as a method of comparing the repeatability of different instruments. While two instruments we re compared in the test shown in this work, multiple instruments could be compared under similar conditions and a conclusion could be drawn regarding which instrument has the most op timal repeatability. Another very interesting application of the NDU is the isolation of pro cesses and the determination of the maximum pulse length that can be used without contamination of the results from these processes. A comparison of static and pulsed IV data is a method thr ough which certain frequency-dependent IV effects present in a device can be extract ed. Because thermal effects are not dependent upon individual bias point voltages but on power dissipation, a co mparison of two sets of pulsed IV data taken from quiescent bias points of equal power dissipation can be used to determine which effects are bias-dependent trapping effects. The remaining e ffects are concluded to be thermal. The results of the extraction for four different types of transi stors were consistent with the expectations. It was found that the GaAs MESFET contains a large am ount of both trapping and thermal effects. The SiGe HBT and Si LDMOSFET showed results that indicated the presence of dominant thermal effects. The measurement of the GaN HE MT was consistent with the expectations for wide bandgap semiconductor devices: a large amount of trapping was revealed. It should be mentioned that the actual pro cess time constants may not be discernable by this NDU analysis for devices which have multiple effects. However, it is concluded that the minimum effect time constant, which is the la rgest pulse length that is uncontaminated by the effect, can be estimated by this analysis.
90 Many models include a means to represent te mperature dependence in an effort to take self-heating effects into account. These electroth ermal models contain a thermal subcircuit that can be used to correct certain model parameters according to the channel temperature. It was shown that the thermal circuit parameters can be estimated through use of the NDU and pulsed IV measurements for devices with negligible tra pping effects. The thermal resistance results measured using a proposed method which uses onl y pulsed IV measurements compared well to the value extracted using a method proposed in the literature . It was shown mathematically that the NDU can be used to measure the thermal time constant for devices with a single dominant therma l effect, such as the LDMOSFET used in this experiment. After finding the time constant th e cutoff frequency of the thermal effect was computed. Using the thermal resistance and the time constant, the thermal capacitance was also computed. Finally, the thermal resistance measurement r esults shown in Chapter 6 were shown to be quite accurate by thermally correcting static IV results. It was shown that accurate RF IV characteristics for several quiescent bias points can be synthesized from static IV measurements taken at multiple temperatures using the thermal resist ance. It is likely that this routine could be implemented in a marketable software program. The derivation of a thermal equivalent circuit representing a device with multiple time constants ma y be the next step in obtaining the ability to synthesize accurate RF IV curves for devices with multiple thermal e ffects . In addition, the widespread use of wide-bandgap semiconductors in power amplifiers for base stations increases the demand for finding a way to synthesize RF IV curves for devices with trapping effects. The ideal end to this pursuit would be the creati on of an electrodynamic model (which takes both thermal and trapping effects into account) which has parameters that are directly measurable and that can be used to correct DC IV resu lts for both thermal and trapping effects. Several possibilities for further study have ar isen from this work. Following this initial study of the quiescent bias dependence of IV results, successful integration of the bias dependence of IV results and large signal S-para meters into nonlinear models would help to enable the practical use of the results. In add ition, a consistent means of modeling trap effects similar to the electrothermal modeling method and a procedure to extract the trap parameters would be helpful in allowing correction of th e IV curves of devices with both thermal and trapping effects. The results of the exploration in this work into various methods of IV analysis
91 and synthesis should provide a starting point towa rd the development of a method of obtaining accurate IV and large-signal S-parameter measur ement results for obtaining microwave nonlinear transistor models.
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96 Appendix A: The Frequency Dependence of Transistor Channel Temperature In Chapter 7, it is explained how the thermal time constant can be estimated through use of the normalized difference unit (NDU) and pulsed IV measurements. In this Appendix, the Fourier transform is used with linear system an alysis techniques to give an indication of the frequency dependence of channel temperature in a transistor. The objective is to highlight inferences that can be made about the freque ncy dependence of temperature from the timedomain response to a step in channel temperature. The reason for this analysis is to provide a framework for the use of thermal circuit techni ques in providing a channel temperature frequency dependence for nonlinear transistor models. Figure 6.1 shows the thermal circuit used in many electrothermal models , . The thermal resistance can be measur ed through pulsed IV techniques, while the capacitance can be extracted by approximating the time constant from a transient response. From circuit analysis, the thermal time constant is given by th th thC R (A.1) A knowledge of the resistance and time constant t hus allows the capacitance to be found. The theory behind finding the time consta nt, and the construction of the frequency response through time-domain step response measu rement techniques is explained in this Appendix. Pulsed IV measuremen t can be considered as a sampling of the step response at each (VGS, VDS) point at a value of time which is equal to the pulse length. It should be remembered that channel temperature is the parameter examined not voltage or current in this case. However, the temperature is analyzed as a voltage in the thermal subcircuit. Because the thermal subcircuit is a linear system, the Fourier techniques used in linear system analysis can be applied to the thermal circuit. As shown in Chapter 6, th e NDU can be used to measure the thermal time constant th. A linear system receives an input f(t) and converts it to an output y(t), as shown in Figure A.1 . The impulse response of the system h(t), is used to represent the device in the time domain. The output y(t) is given by the convolution of the input with the impulse response: ) ( ) ( ) ( t h t f t y (A.2) Figure A.1. System Overview 
97 Appendix A (Continued) The impulse response can be found by inputting an impulse to the system and viewing the response. In this case, f(t) = (t) and y(t) = h(t). Another helpful tool for ascertaining the impulse response of the system is to view the r esponse to the unit step function u(t), which is defined as 0 0 0 1 ) ( t t t u (A.3) . The step response is here denoted as s(t) and is the response y(t) = s(t) to an excitation f(t) = u(t) with the initial condition y(0) = 0 (the zero-st ate response). The step response is the integral of the impulse response : t kdk k h t s ) ( ) ( (A.4) An equivalent expression to (4) is ) ( ) ( ) ( s dt t h t s (A.5) Thus the value of s from its initial value is give n by the indefinite integral of h(t), with the constant of integration being the initial valu e of the step response. Because the system is assumed to be in steady-state until the step is applied at t = 0+, ) 0 ( ) ( s s. (A.6) In considering sinusoidal excitation, the case in which the frequency, complex in general, is strictly imaginary; that is, s = j the Fourier transform can be used to convert between the time and frequency domain. In this case, the fo llowing time-frequency correlations are created through use of the Fourier transform: ) ( ) (F t fF ) ( ) (H t hF ) ( ) (Y t yF When working in the frequency domain, it is much simpler to analyze the response in many cases due to the fact that the output can be found by multiplication instead of through convolution : ) ( ) ( ) ( H F Y (A.7) H( ) is known as the frequency response of the system and is also called the Â“transfer function.Â”
98 Appendix A (Continued) In analysis through the normalized difference un it, the step response of the thermal and/or trap conditions to a step excitation is estimated through the NDU analysis of pulsed IV results at different pulse lengths. The system variable is channel temperature for an analysis of thermal effects. In trapping effects, a similar soluti on may be obtainable by considering trap occupancy as the system variable; however, further research mu st be performed in the area to firmly reach this conclusion. When a pulsed IV measurement is taken, the temperature or trap occupancy is estimated through the overall current difference fro m a static (or other pulsed) IV measurement at a particular time (the pulse length) after a step is applied. Thus, for each pulsed IV measurement taken with a different pulse length, the temperatur e value at another time after application of a step is estimated. The resultant plot is an estimation of the step response s(t). The goal of this analysis is to be able to make an inference on the frequency response H( ) from the step response s(t). The method of a ttack is to solve (A.5) to find the impulse response h(t) and then use Fourier transform techniques to get H( ). From circuit analysis, if PD (the dissipated power) is applied at t = 0+ and if the value of PD is zero for t < 0, the thermal circuit in (1 ) can be described by the differential equation th D th th A C th th CC P C R T T C R dt dT 1. (A.8) The complete solution to this equation is A P R t D th CT e P R TD th ) 1 (/. (A.9) How can this be placed into the system analogue? This is accomplished by letting TC TA be the system output y(t) and PD equal to the causal excitation f(t ). This gives the step response ) ( ) ( ) 1 ( ) (/t u t f e R t yth thC R t th (A.10) Assuming that the input is a unit st ep, the step response is obtained as ) ( ) 1 ( ) (/t u e R t stht th (A.11) where the thermal time constant th is given by (A.1). (A.11) is used in (A.5) to find the impulse response. The initial condition s() = 0 from inspection of (A.11). Thus dt t h t s ) ( ) ( (A.12) dt t h t u e Rtht th) ( ) ( ) 1 (/ (A.13)
99 Appendix A (Continued) Taking the derivative of both sides gives ) ( ) ( ) (/t u e R R dt d t htht th th (A.14) ) ( ) (/t u e R t htht th th (A.15) A table of Fourier transforms  gives the transform pair j a t u eF at 1 ) ( (A.16) Taking the Fourier transform of both sides of (15) gives j C R Hth th th 1 ) (. (A.17) This gives the frequency response of the channel temperature. The system serves as a lowpass filter with respect to temperature. Of interest is the frequency = 1/ th. At this frequency, (17) becomes th th th th thj C R H 1 1 1 (A.18) The magnitude of the frequency response is ) 0 ( 2 1 2 1 1 1 12 2 2H C R C R Hth th th th th th th (A.19) This frequency, where the magnitude of the frequency response is 1/ 2 times the magnitude in the passband, is known as the thermal cutoff frequency: th cth 1 (A.20) Now that the temperature frequency respon se has been successfully found, the channel temperature response to an arbitrary power dissipa tion excitation can be found. For example, if the excitation is sinusoidal,
100 Appendix A (Continued) t P t P t fD D1 0sin ) ( ) ( (A.21) the Fourier transform of the input is ) ( ) ( ) ( ) (1 1 0 D DjP P F (A.22) , yielding the channel temperature (as a function of frequency) given by ) ( ) ( ) ( ) ( H F Y TC (A.23) j C R jP Tth th th D C 1 ) ( ) ( ) (1 1 0 (A.24) This development shows that a temperatur e-versus-frequency characteristic can be developed if an accurate method of channel te mperature measurement is available. Two assumptions are necessary to use the normalized difference unit (NDU) comparing pulsed and static IV curves as a measure of channel temperature. The first is that the current IDS (or ICE) is a linear function of temperature, a seemingly reasona ble approximation . The second is that the normalized difference unit is linear with respect to the pulsed IV current used in the comparison. This assumption is not as good but may be reasonabl e if the difference in the sets of IV curves being compared is small compared to the curre nt values. This may be reasonable if the NDU value is less than 0.2. The thermal subcircuit used in many models to approximate channel temperature as a function of frequency provides the ability to ascer tain the channel temperature of a device as a function of frequency. This is important because it could provides for computer generation of thermally accurate IV or large-signal S-paramete r results pertaining to a given frequency from typical DC-IV and multiple-bias S-parameter data, which may not be taken under thermal conditions appropriate to largesignal operation. The mathematic al, system-based development presented above sets a foundation for such activities and provides boundaries for making inferences on frequency-dependent behavior from a time-domain analysis. If channel temperature can be approximately measured by NDU analysis, then a plot of channel temperature versus frequency can be estimated.
101 Appendix B: Accent Dynamic i(V) Analyzer Specifications Three models of the Dynamic i(V) Analyzer (DiVA), manufactured by Accent Optical Technologies, were used in the completion of this work: models D210, D225, and D265. The specifications for each of these models is provi ded in Tables B.1 through B.6, as taken from the Dynamic i(V) User Manual . Table B.1. Accent DiVA 210 Specifications  Pulse Duration Pulse Separation Voltage Range Current Range Gate Port 100 ns to 1 ms 500 s to 1 s -10 V to + 10 V 0 to 180 mA Drain Port 100 ns to 1 ms 500 s to 1 s -10 V to + 10 V 0 to 0.5 A Table B.2. Current-Dependent Specifications for Accent DiVA 210  Table B.3. Accent DiVA 225 Specifications  Pulse Duration Pulse Separation Voltage Range Current Range Gate Port 100 ns to 1 ms 500 s to 1 s -15 V to + 10 V 0 to 180 mA Drain Port 100 ns to 1 ms 500 s to 1 s 0 V to +25 V 0 to 1 A Table B.4. Current-Dependent Specifications for Accent DiVA 225  Table B.5. Accent DiVA 265 Specifications  Pulse Duration Pulse Separation Voltage Range Current Range Gate Port 200 ns to 1 ms 500 s to 1 s -15 V to +10 V 0 to 180 mA Drain Port 100 ns to 1 ms 500 s to 1 s 0 V to +65 V 0 to 2 A Drain Current Limit Gate Output Impedance Gate Current Resolution Drain Output Impedance Drain Current Resolution Less than 50 mA 50 +/0.2 mA 100 +/0.1 mA Greater than 50 mA 50 +/0.2 mA 10 +/1 mA Drain Current Limit Gate Output Impedance Gate Current Resolution Drain Output Impedance Drain Current Resolution Less than 50 mA 50 +/0.25 mA 100 +/0.125 mA Greater than 50 mA 50 +/0.25 mA 10 +/1.25 mA
102 Appendix B (Continued) Table B.6. Current-Dependent Specifications for Accent DiVA 265  Drain Current Limit Gate Output Impedance Gate Current Resolution Drain Output Impedance Drain Current Resolution Less than 250 mA 50 +/0.25 mA 100 +/0.325 mA Greater than 250 mA 50 +/0.25 mA 10 +/3.25 mA