USF Libraries
USF Digital Collections

Processing and characterization of CIGS - based solar cells

MISSING IMAGE

Material Information

Title:
Processing and characterization of CIGS - based solar cells
Physical Description:
Book
Language:
English
Creator:
Mohanakrishnaswamy, Venkatesh
Publisher:
University of South Florida
Place of Publication:
Tampa, Fla.
Publication Date:

Subjects

Subjects / Keywords:
molybdenum
sodium
backcontact
gallium
Dissertations, Academic -- Electrical Engineering -- Masters -- USF   ( lcsh )
Genre:
government publication (state, provincial, terriorial, dependent)   ( marcgt )
bibliography   ( marcgt )
theses   ( marcgt )
non-fiction   ( marcgt )

Notes

Summary:
ABSTRACT: The goal of this research was to understand the role of the glass substrate and molybdenum (Mo) back contact on the performance of Copper Indium Gallium diselenide (CIGS) / Cadmium Sulphide (CdS) based photovoltaic devices, and to improve the performance of these devices. The CIGS absorber layer was fabricated in a 2 stage process. In this process the metal precursors were deposited at 275oC followed by a high temperature selenization step. The advantage of the 2 stage process is that it is manufacturing friendly. The first step in fabrication of solar cells is to clean the substrate which is necessary to obtain good device performance. A variety of environmentally friendly solvents were evaluated, to determine the optimal cleaning agent. At elevated temperatures of processing sodium tends to diffuse out of Soda lime glass (SLG) and enter the semiconductor. The presence of this sodium during CIGS fabrication is necessary to obtain high efficiency CIGS based solar cells. A silicon nitride barrier layer was sputtered onto the SLG substrates, and this substrate was used to make complete devices. The CIGS absorber layer was deposited by the Type I recipe in two different vacuum systems.These devices were compared with standard devices the Si₃N₄ barrier layer, to understand the role of sodium on the devices fabricated from both of the systems. Furthermore, the influence of molybdenum processing parameters, such as thickness and rate of sputtering, on device performance were studied. The Voc of devices fabricated using the Type I process was limited to 460mV. In order to improve the Voc's a new absorber recipe (Type IV) was developed. Voc's of upto 490mV, Jsc's of upto 37.4mA/cm² and FF of 64%, were obtained. This improvement in performance was due to incorporation of gallium in the space charge region. Techniques such as I-V measurements, spectral response, SEM and EDS measurements were used to characterize the devices.
Thesis:
Thesis (M.S.E.E.)--University of South Florida, 2004.
Bibliography:
Includes bibliographical references.
System Details:
System requirements: World Wide Web browser and PDF reader.
System Details:
Mode of access: World Wide Web.
Statement of Responsibility:
by Venkatesh Mohanakrishnaswamy.
General Note:
Title from PDF of title page.
General Note:
Document formatted into pages; contains 85 pages.

Record Information

Source Institution:
University of South Florida Library
Holding Location:
University of South Florida
Rights Management:
All applicable rights reserved by the source institution and holding location.
Resource Identifier:
oclc - 56137789
notis - AJR7192
usfldc doi - E14-SFE0000368
usfldc handle - e14.368
System ID:
SFS0025062:00001


This item is only available as the following downloads:


Full Text

PAGE 1

Processing And Characterization Of CIGS Based Solar Cells by Venkatesh Mohanakrishnaswamy A thesis submitted in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering Department of Electrical Engineering College of Engineering University of South Florida Major Professor: Don L. Morel, Ph.D. Christos S. Ferekides, Ph.D. Yun. L. Chiou, Ph.D. Date of Approval: June 24, 2004 Keywords: sodium, molybdenum, back contact, gallium Copyright 2004 Venkatesh Mohanakrishnaswamy

PAGE 2

DEDICATION This thesis is dedicated to my family

PAGE 3

ACKNOWLEDGEMENTS I would like to thank my major professor Dr. Don Morel for his continuous guidance, support and motivation throughout the course of this work. His teaching and experience have helped me attain an overall improvement in my personality. Many thanks to Dr. Christos Ferekides, for his continuous help and invaluable suggesti ons during the course of this work. I am grateful to Dr. Y.L. Chiou for participating in my committee. I would like to thank Harish Sankaranarayanan for all his help and suggestions. Also, many thanks to Shirish, Madhavi Harish J., Jagadish, Senth il and all other lab mates for making my research a truly enriching experience. I would like to thank my room mates Madhan, Siva and Srinath, who have made my stay here a very enjoyable and memorable experi ence. I would like to thank Bala, Saravana, Shyam and all other friends fo r their support and motivation. I am what I am, because of my family back in India. They have always showered upon me their unconditional love, s upport, motivation and blessings. I owe my entire life to them.

PAGE 4

i TABLE OF CONTENTS LIST OF TABLES iv LIST OF FIGURES v ABSTRACT viii CHAPTER 1 INTRODUCTION 1 1.1 Photovoltaics 2 1.2 Thin Film Photovoltaics 2 1.3 CuInSe2 and its Family 3 1.3.1 Role of Sodium 6 CHAPTER 2 PHYSICS OF SEMICONDUCTOR AND SOLAR CELLS 8 2.1 Concept of Holes 10 2.2 Doping of Semiconductors 10 2.3 p-n Junction 11 2.4 Effect of Bias 13 2.5 Heterojunctions 13 2.6 Solar Cells 16 2.7 Spectral Response 17 2.8 I – V Characteristics 18 2.9 Equivalent Circuit of a Solar Cell 19 2.10 Output Parameters of a So lar Cell 20 2.11 Loss of Efficiency 20

PAGE 5

ii CHAPTER 3 DEVICE STRUCTURE AND FABRICATION OF OUR SOLAR CELLS 22 3.1 Device Structure 22 3.1.1 Molybdenum Back Contact 23 3.1.2 Cadmium Sulphide 25 3.1.3 ZnO Front Contact 27 3.2 Device Fabrication 27 3.2.1 Substrate Cleaning 27 3.2.2 Molybdenum Deposition 28 3.2.3 CIGS Absorber Deposition 28 3.2.3.1 CIGS Deposition 29 3.2.3.2 Type – I CIGS vs Type – IV CIGS 29 3.2.4 Chemical Bath Deposition of CdS 31 3.2.5 ZnO Deposition 32 3.3 Silicon Nitride 33 3.4 System -1 33 3.5 System-2 34 CHAPTER 4 RESULTS AND DISCUSSION 36 4.1 Impact of Substrate Cleaning on Device Performance 37 4.2 Metal Ratio and Top Cu Optimiz ation 39 4.3 Substrate Effects – Role of Sodium 42 4.3.1 Old System 43 4.3.2 New System 43 4.3.3 Old System vs New System 44 4.3.4 Stability of Devices with 20Ao Nitride Barrier Layer 46 4.3.5 Run #V029, V046 47 4.3.6 Increase in Cu Level 48 4.4 Resistivity vs Rate 50 4.5 Device Performance vs Rate 51

PAGE 6

iii 4.6 Effect of Discharge Voltage on Voc 54 4.7 Effect of Molybdenum Thickness on Device Performance 55 4.8 Type IV (Split Ga – Split In) Process 59 4.8.1 Run # V067, V070 ( x \150 Ao \50 Ao) 60 4.8.2 Effect of Middle Gallium 62 4.8.3 Effect of Top Gallium 66 CHAPTER 5 CONCLUSIONS AND RECOMMENDATIONS 67 REFERENCES 71

PAGE 7

iv LIST OF TABLES Table 3.1 Propertie s of Silicon Nitride 33 Table 4.1 Effect of Va riation of Middle Gallium (Back Gallium 600Ao \ \ Top Gallium 50Ao) 62 Table 4.2 Effect of Va riation of Middle Gallium (Back Gallium-500Ao \ \ Top Gallium50Ao) 62 Table 4.3 Effect of Variation of Top Ga llium (Back Gallium-500Ao \ Middle Gallium-250Ao \ ) 66

PAGE 8

v LIST OF FIGURES Figure 1.1 Confirmed Terrestr ial Cell and Submodule Efficiencies 3 Figure 1.2 CIS Structure 4 Figure 1.3 Band Bending a) Without Grading b) With Grading 6 Figure 2.1 Variation of Fermi-Dirac Distribution With Temperature 8 Figure 2.2 Representation of Se miconductor 9 Figure 2.3 Metallurgical Junction and Band Be nding in p-n Junction 12 Figure 2.4 Two Semiconducto rs Before Heterojunction Formation 14 Figure 2.5 Band Diagram of p-n Heterojunction 15 Figure 2.6 Band Diagram of p-CIGS / n-CdS Hetero junction Solar Cell 16 Figure 2.7 I –V Characteristic of a Solar Cell in Dark and Light 18 Figure 2.8 Equivalent Circuit of a Sola r Cell 19 Figure 3.1 Device Structure 22 Figure 3.2 Selenizati on Profile 30 Figure 3.3 Device Structure With Silicon Nitride Barrier Layer 32 Figure 3.4 Orientation of Sources With Respect to the Substrate in the Old System 34 Figure 3.5 Orientation of Sources With Respect to the Substrate in the New System 35 Figure 4.1 Device Numbering and Orient ation of Sources with Respect to the Substrate 36 Figure 4.2 Voc (mV) Distribution in Sample Cleaned with TrichloroEthane and TrichlorofluoroEthane 37 Figure 4.3 Voc (mV) Distribution in Sample Clean ed with Methanol and TrichloroEthane 37 Figure 4.4 Voc (mV) Distribution in Sa mple Cleaned with Methanol and TetrachloroEthylene 38

PAGE 9

vi Figure 4.5 Voc (mV) Distribution in Run V012 39 Figure 4.6 Voc (mV) and Fill factor Distributi on in Run V015 40 Figure 4.7 Voc (mV) Distribution in Run V016 40 Figure 4.8 Voc (mV) and FF Distribution in Run V020 41 Figure 4.9 Spectral Response Comparis on of Devices from Runs V012, 15, 16, 20 with Top Cu of 60Ao, 20Ao, 60Ao, 30Ao Respectively 41 Figure 4.10 Variation of Device Performance as a Function of Nitride Thickness in Old System 43 Figure 4.11 Variation of Device Performance as a Function of Nitride Thickness in New System 43 Figure 4.12 Variation of Voltage as a Function of Silicon Nitride Thickness in Old and New System 44 Figure 4.13 Voc Variations of Standard Sample and 20 Ao Nitride Sample Vs Time 46 Figure 4.14 Voc (mV) Variation in Run# V046 (50A Silicon Nitride Layer) 47 Figure 4.15 Voc (mV) Variation in Run# V029 (20A Silicon Nitride Layer) 47 Figure 4.16 Voc (mV) Spread After Increasing Cu Level 48 Figure 4.17 Spectral Response of Device V042-11 49 Figure 4.18 SEM Image of Standard CIGS 50 Figure 4.19 SEM Image of CIGS with a 50A Barrier Layer 50 Figure 4.20 Variation of Resis tivity with Rate of Sputtering of Molybdenum 51 Figure 4.21 Variation of Device Performance as a Function of Rate of Sputtering of Molybdenum 52 Figure 4.22 Comparison of Spectral Response of Samples From Runs V057, 58 53 Figure 4.23 Variation of Open Circu it Voltage with Discharge Voltage of Molybdenum Sputtering 54 Figure 4.24 Variation of Max imum Jsc with Variation on Molybdenum Thickness 55 Figure 4.25 Variation of Maximum Open Circuit Voltage with Variation in Molybdenum Thickness 55

PAGE 10

vii Figure 4.26 Voc (mV) Spread on Substrate with Molybdenum Thickness 6000 Ao 56 Figure 4.27 Metal Ratio Sensitivit y (Variation of Voc Within the Substrate Be tween a Standard Sample and a Sample With 6000Ao Thick Molybdenum Layer) 56 Figure 4.28 I-V of Device with 4000Ao Thick Molybdenum Layer 58 Figure 4.29 I-V of Device With 6000Ao Thick Molybdenum Layer 59 Figure 4.30 Voc (mV) Spread From Run # V067 60 Figure 4.31 Spectral Response Comparing Type I vs Type IV 61 Figure 4.32 Voc Spread From Run # V070 61 Figure 4.33 Comparison of SR Between V068 and V069 63 Figure 4.34 Comparison of SR Between V067 And V069 64

PAGE 11

viii PROCESSING AND CHARACTERIZATION OF CIGS BASED SOLAR CELLS Venkatesh Mohanakrishnaswamy ABSTRACT The goal of this research was to understa nd the role of the glass substrate and molybdenum (Mo) back contact on the performance of Copper Indium Gallium diselenide (CIGS) / Cadmium Sulphide (CdS) based photovolta ic devices, and to improve the performance of these devices. The CIGS absorber layer was fabricated in a 2 stage process. In this process the metal precursors were deposited at 275oC followed by a high temperature selenization step. The advantage of the 2 stage proce ss is that it is manufacturing friendly. The first step in fabrication of solar cells is to clean the substrate which is necessary to obtain good device performance A variety of environmentally friendly solvents were evaluated, to determine the optimal cleaning agent. At elevated temperatures of processing sodium tends to diffuse out of Soda lime glass (SLG) and enter the semiconductor. The presence of this sodium during CIGS fabrication is necessary to obtain high effici ency CIGS based solar cells. A silicon nitride barrier layer was sputtered onto the SLG substr ates, and this substrate was used to make complete devices. The CIGS absorber layer was deposited by the Type I recipe in two different vacuum systems. These devices were compared with standard devices the Si3N4

PAGE 12

ix barrier layer, to understand the role of sodium on the devices fabricated from both of the systems. Furthermore, the influence of molybde num processing parameters, such as thickness and rate of s puttering, on device performance were studied. The Voc of devices fabricated using the Type I process was limited to 460mV. In order to improve the Voc’s a new absorber recipe (Type IV) was developed. Voc’s of upto 490mV, Jsc’s of upto 37.4mA/cm2 and FF of 64%, were obtained. This improvement in performance was due to inco rporation of gallium in the space charge region. Techniques such as I-V measurements, spectral response, SEM and EDS measurements were used to characterize the devices.

PAGE 13

1 CHAPTER 1 INTRODUCTION The start of the Industrial revolution trig gered the use of Non-Renewable sources of energy around the globe. Technological adva nces, like the development of the internal combustion engine and the birth of the petroc hemical industry, spurred rapid growth in the demand for oil. Between 1950 and the early 1970’s, world energy consumption was doubling every 15 years. As energy consumptio n escalated, many Industrial nations that included the United States, Japan, and countries from Europe, that had been energy self sufficient became dependent on energy imports, largely from the oil rich Middle East. The industrial world growing dependence on a fe w countries set the st age for the Arab oil embargo, when crude oil prices rose from $3 per barrel in 1973 to $40 a barrel in1981. This sparked the need for renewable energy sources and energy efficiency. Among the various renewable energy sour ces solar power stands out because the source of energy is unlimited and available everywhere. It is versatile in terms of both large scale and small scale power generation. Th e challenges of solar power are its cost and storage.

PAGE 14

2 1.1 Photovoltaics Photovoltaics is an approach to convert sunlight directly into electricity. The advantages of PV are its high reliability, low operation cost and non-polluting nature. The PV effect was first discovered by a French physicist Becquerel in1839. German scientist Heinrich Hertz experimented with selenium el ectrodes and this led to the development of the first primitive PV cell. These cells had onl y about 1~2% efficiency. In 1954 Bell labs came up with the first silicon solar cells w ith efficiency of 6%[1]. The space race between the United States and the Soviet Union led to the use of solar cells as a power source in space. PV systems were selected for space use because they were lightweight, which kept operational costs down and becau se they could produce power for long periods of time. The main driving force behind the use of photovoltaics for terrestrial power supplies came in 1973 with the notorious oil shock. Since then all possible options for cost reduction have been explored, which wa s recognized as the major obstacle to the widespread use of photovoltaics. 1.2 Thin Film Photovoltaics Great efforts are being taken for the development of thin film solar cells. The greatest motivation of this being the cost reduction and energy savings during cell manufacture. All the thin film compound semic onductors being researched are direct band gap semiconductors. So the absorption of sunlight occurs within a few microns. One of the major hurdles that this technology suffers from is that most of the thin film semiconductors are polycry stalline. This leads to a loss in efficiency due to grain

PAGE 15

3 boundary recombination. Some of the promisin g materials for thin film solar cells are amorphous silicon, cadmium telluride, CuInSe2 and its alloys. The maximum reported efficiency for a thin film solar cell is a CIGS based solar cell and the efficiency is 18.8%[2]. Figure 1.1 lists the highest independen tly confirmed efficiencies for solar cells and submodules. Figure 1.1 Confirmed Terrestrial Ce ll and Submodule Efficiencies [3] 1.3 CuInSe2 and its Family CIS a ternary Semiconductor, with a direct band gap of 1.0 eV is known to absorb light in the solar spectrum better than an y other semiconductor. CIS has the highest reported absorption coefficient of 3.6 x 105cm-1[5]. The fact that these thin film cells gave efficiencies with no degradation being observed increased the research activity in this field.

PAGE 16

4 The typical structure of CIS based solar cells is: Soda lime glass substrate (SLG)\ Molybdenum\ CIS layer\ CdS\ ZnO. The CdS layer acts as the n-type partner to the ptype CIS absorber layer. Molybdenum acts as the back contact and the ZnO layer acts as the front contact. The light is incident through the ZnO layer. The CIS takes the chalcopyrite structur e, which is a diamond like lattice with a face-centered tetragonal unit cell. Figure 1.2 CIS Structure [4] There are various native defects in CIS. Some of them are: 1 Copper Vacancies (VCu ) : This is an acceptor defect 2 Copper on Indium antisite defect (CuIn ): This is an acceptor defect

PAGE 17

5 3 Indium on Copper antisite defect (InCu ): This is a donor defect 4 Selenium vacancies (VSe ): This is a donor defect CIS can be made highly conductive and p-type by depositing more copper than Indium. But this results in degradation of device performance. This is because of the formation of Copper Selenide, which being highly conductive tends to short circuit the junction. The formation of coppe r selenide can be avoided by having more Indium than Copper but the resulting material has a high compensation effect. This is due to the presence of both VCu and InCu The former is acceptor defect and the latter is a donor defect. For good device performance the Cu/In ratio is kept close to unity. CIS, when properly formed, tends to be p-type becaus e of the low formation energy of copper vacancies. One of the drawbacks of the CIS cells is its low open circuit voltage. This is because of its low bandgap. This led to the incorporation of Gallium in the ternary CIS semiconductor resulting in the formation of the quaternary CIGS semiconductor. The incorporation of Gallium is done in such a way that it is used to substitute an equivalent amount of Indium. This substitution raises th e bandgap of the material. The bandgap can be varied from 1.02eV (CIS bandgap) to 1.7e V (CGS bandgap). The bandgap variation for CuIn(1-x)GaxSe2 is given by Eg = 1.011 + 0.664x – 0.249x(1-x) ( eq 1.1) [6] In addition to improving the Voc‘s, the incorporation of Gallium helps in improved adhesion to the Molybde num back contact. It also results in changes in material properties like lattice consta nt, film morphology and defe ct mechanisms. The gallium profile in the absorber can be varied by us ing different processing techniques. This is

PAGE 18

6 referred to as Gallium grading. Increasing the gallium content increases the bandgap by predominantly shifting the conduction band, shown in figure 1.2. Thus Gallium grading helps to build quasi-electrostatic fiel ds, which enhances current collection. Figure 1.3 Band Bending a) Without Grading b) With Grading T.Dullweber et al. [7] have studied various graded absorber layers like a linearly graded absorber, multi-graded absorber and a double graded absorber. The output parameters show a strong relation to the slope of grading in a linearly graded absorber. While in a multigraded absorber, the curren t is dominated by the minimum bandgap and the open circuit voltage is dominated by the bandgap in the space charge region. They also concluded that the 3 stage process shows more limitation to a design of graded bandgap structures as opposed to co-evaporation. 1.3.1 Role of Sodium During the growth of CIGS film, at elevat ed temperatures of processing, Na tends to diffuse out of SLG through the back cont act and into the semiconductor material [8]. The common methods used to analyze the role of Sodium in CIGS films is to use barrier

PAGE 19

7 layers on the substrate to block the diffu sion of Sodium from the substrate or use substrates other than SLG[9]. The presen ce of Na in polycrystalline CIGS based photovoltaic devices correlates with numerous changes in material and device quality. The observed changes include increase in conversion efficiencies[10], grain size, preferential orientation[11] and a reduced se nsitivity of devices to the metal ratio[12]. Some of the possible mechanisms by which Na works are 1. Zhang/ Wei/ Zunger defect pair model (2 VCu InCu pair dominance)[32] : Na can take up intended Cu positions in the latti ce[13]. This results in a reduced defect pair formation. Thus affecting the hole de nsity and leading to an increase in Voc and fill factor. 2. Neumann defect pair model (CuIn InCu pair dominance) [14]: Na replaces Cu in the lattice. It follows that the number of defect pair is reduced, reducing the cation disorder and enhancing Voc and fill factor. 3. Na acts as catalyst in the passivation of VSe by oxygen [15]. 4. U. Rau et al have observed the forma tion of a acceptor level at about 75mev above the valence band, which they attribute to the increase in the carrier concentration in the absorber material [16].

PAGE 20

8 CHAPTER 2 PHYSICS OF SEMICONDUCTOR AND SOLAR CELLS At low temperatures, electrons in a crystal occupy the lowest possible energy states. The occupation of energy states is in accordance with Pauli’s exclusion principle. According to this principle each allowed energy level can be occupied by two electrons of opposite spin. Figure 2.1 Variation of Fermi-Dirac Distribution Function With Temperature

PAGE 21

9 Thus at low temperatures (T=0K), all the energy levels upto a certain energy level are filled with two electrons. This energy level is known as Fermi level. But as the temperature increases, energy levels higher than the fermi energy (EF) will have a finite probability of having an electron, and energy levels less than EF will have a finite probability of being empty. The Fermi distribution function f(E) is given by Eq. 2.1 and the variation of Fermi energy with temperature is shown in fig. 2.1. f(E) = 1/ (1 + e(E – E F ) / KT) (Eq. 2.1) For a conduction band to contribute to current flow in a crystal it cannot be either completely full or completely empty. A semiconductor is a material which ha s a narrow forbidden band gap between the conduction and valence bands. The ener gy band structure of a semiconductor is shown in figure 2.2. At higher temperature they have sufficient smearing out of the Fermi Dirac distribution function. This will ensure that some of the electrons from a completely filled valence band have move d to the conduction band, whic h has a lot of unoccupied energy states, thus enabling current flow. Figure 2.2 Representa tion of Semiconductor

PAGE 22

10 2.1 Concept of Holes To understand the concept of holes let us consider the Silicon crystal structure. Silicon belongs to group IV of the periodic table and has 4 electrons in its outermost shell. Thus to complete its octet it makes cova lent bonds with 4 neighboring silicon atoms. The semiconductor thus formed can not conduct electricity. But at higher temperatures, if some electrons can gain enough energy to break free from the covalent bond, they can contribute to current flow. If the neighboring electrons can jump from their bond to the broken bond they can contribute to current flow as well. The electrons being released from the bond can be recogn ized as being in the conduction band. The broken bond can be termed as a hole and they can be recognized as being in the valence band. 2.2 Doping of Semiconductors Electronic properties of se miconductors can be altered by adding impurities to them. These impurities are referred to as dopants. These added impurities are either squeezed between the atoms of the host material, which are then are referred to as the interstitial impurities or they can replace the atoms in the host crystal in which case they are called substitutional impurities. To understand the effects of dopants let us again consider a Silicon lattice. When a group V atom replaces a Silicon atom, 4 of its electrons are used up to form covalent bonds while the fifth electron is bonded to the at om. Thus it is not free to move about in the lattice. The energy required to release th e electron to the conduction band is very low,

PAGE 23

11 typically in the range of a few meV below the conduction band. This type of semiconductor is referred to as n-type semiconductor. In the analogous way when a group III atom replaces a silicon atom in the crystal lattice, it does not have sufficient electrons to form 4 covalent bonds. This creates a hole in the valence band. Thus an energy level is created, which is a few meV above the valence band. Depending on the level of doping the fermi level tends to go closer to valence band. This type of semiconducto r is called a p-type semiconductor. 2.3 p-n Junction When a p-type material and a n-type material are made to come together, a p-n junction is formed. The Fermi levels of both the materials will line up. The electrons from the n-type material move to the p-type material leaving behind ionized donors. On the other hand holes from the p-type material would move to the n-type material leaving behind ionized acceptors. The region of i onized acceptors and ionized donors, put together, is referred to as the space charge region and is shown in fig. 2.3. The charges on both sides give rise to an electric field. This field will oppose the natural diffusion tendency of the majority carriers. The diffusion potential or built-in potential is given by eq 2.2 and this difference in potential produc es a bending of energy bands in the semiconductor, which is shown in fig. 2.3. Vbi = KT/q ln(NA ND / ni 2) (eq 2.2) The width of the space charge region is given by W = [2 (Vbi – V) ((NA + ND )]1/2 (eq 2.3) ___________________ [q NA ND ] 1/2

PAGE 24

12 Where: ND is Donor impurity concentration on the n-side NA is Acceptor impurity concentration on the p-side V is Applied Voltage K is Boltzmann’s constant ni is intrinsic carrier concentration Figure 2.3 Metallurgical Junction and Band Bending in p-n Junction

PAGE 25

13 2.4 Effect of Bias In forward bias, (i.e) when a negative potential(Vf) is applied to the n-region with respect to the p-region, the band bending reduces as compared to its thermal equilibrium position. This means that the potential differe nce between the ends of the diode is reduced. The reduction of potential difference is equal to the applied voltage. Thus there is a reduction of the barrier height for the majo rity carriers. The reduced barrier height for roughly the same carrier concentration gradient, yields an increase in the diffusion current of majority carriers. The drift cu rrent, which oppose the diffusion current, is relatively insensitive to the change in barrier height and is the same as its thermal equilibrium value. In reverse bias, i.e when a positive voltage to the n-region with respect to the p-region, the band bending increases t hus the diffusion current becomes negligible. The drift current as already mentioned is insensitive to the changes in band bending so they remain at there thermal equilibrium value. Thus in reverse bias a small negative current flows, this current is often referr ed to as the reverse saturation current Io. The current in a p-n junction in the dark can be given by I = Io exp(qV/KT 1) (eq 2.4) 2.5 Heterojunction A heterojunction is a junction formed between two diss imilar semiconductors. When the two semiconductors have the same type of conductivity it is called an Isotype heterojunction. When the conductivity types di ffer it is called anisotype heterojunction. Heterojunction devices are extensively used in Injection lasers, light emitting diodes,

PAGE 26

14 photodetectors and solar cells. The major pr oblems of heterojunction devices are the lattice mismatch and differences in electron af finity, which gives rise to energy band discontinuities. Let us consider two se miconductors of band gap Eg1 and Eg2 having electron affinities X1 and X2 respectively being partnered togeth er to form a heterojunction. The Energy band diagram of the two semiconduc tors before and after forming the heterojunction is shown in Figures 2.4 and 2.5. It can be seen that there is a discontinuity in the valence band ( Ev) and conduction band ( Ec). Such discontinuities are due to the inherent differences in properties of the tw o semiconductors, such as the electron affinity. The impact of the discontinuity is that it hinders carrier flow when a solar cell is placed under illumination. Hence, proper selection of materials is an important criterion. 1 m2 m cE vE Figure 2.4 Two Semiconductors Before Heterojunction Formation [17]

PAGE 27

15 1 m vE 2 mcE Figure 2.5 Band Diagram of p-n Heterojunction [17] The discontinuities are given by Ec = X1 – X2 (eq 2.5) Ev = (Eg2 Eg1 Ec ) (eq 2.6) The total built in potential, Vbi, is equal to the sum of partial built in voltages (Vb1, Vb2 ), where Vb1 and Vb2 are electrostatic potentials of two semiconductors. In this research a p-CIGS/n-CdS anis otype heterojunction has been studied The band diagram of this heterojunc tion with n-type ZnO front c ontact is shown in Figure 2.6

PAGE 28

16 Figure 2.6 Band Diagram of p-CIGS / n-CdS Heteroj unction Solar Cell 2.6 Solar Cells The photovoltaic effect is the process of conversion of light energy into electricity. One of the ways of doing this is by using a solar cell. A solar cell is a device, which is made by partnering a p-type semiconductor and n-type semiconductor. The semiconductors are chosen such that one of the semiconductors absorb a significant portion of the light spectrum. Absorption of lig ht depends on the bandgap of the material. If the bandgap is greater than the energy of the photon, light just passes through. On the contrary, if the bandgap is less than the energy of the photon, the photon is absorbed. The absorbed photon gives rise to Electron-Hole pairs(EHP) These excess carriers are swept across the junction by the electric field and are collected at the contacts. This gives rise to photocurrent and can be made to deliver power to a load. Thus the important steps in solar energy conversion are 1 Absorption of radiation 2 Generation of carriers

PAGE 29

17 3 Diffusion of minority carriers to the edge of the depletion width 4 Separation of minority carriers by the electric field. 5 Collection of carriers at the contact. The absorption of light by a semiconducto r can be described by the relation I = Io [exp(( )t] (eq 2.7) Io Intensity of light incident on the semiconductor – Absorption coefficient which is a function of wavelength t – Depth of material from surface of incidence. 2.7 Spectral Response When monochromatic lig ht of wavelength is incident on a semiconductor, EHP’s are generated at a distance x from th e semiconductor surface. The generation rate of these carriers is given by G( ,x) = ( ) F( ) [1 – R( )] e-() x [17] (eq 2.8) F( ) – No. of incident photons / cm2 / s / unit bandwidth R( ) – Fraction of these photons reflected from surface Assuming a low injection condition, The spectral response can be given by SR( ) = (1 / q F( ) [ 1 R( )] ) [ Jp( ) + Jn( ) + Jdr( ) ] (eq 2.9) Jp( ) – Photocurrent contribution from p-region Jn( ) – Photocurrent contribution from n-region Jdr( ) – Photocurrent contribu tion from depletion region The photocurrent density can be obtained by JL = q F( ) ( 1 R( ) ) SR( ) d (eq 2.10)

PAGE 30

18 2.8 I – V Characteristics When light is incident on a solar cell el ectron-hole pairs are ge nerated. This gives rise to a current. In order to account for this current the dark current equation is modified as I = Io exp((qV/kT) 1) – IL (eq 2.11) The I-V characteristic of a solar cell in dark and light is shown in the following figure. Figure 2.7 I –V Characteristic of a Solar Cell in Dark and Light If Lp and Ln are the minority carrier diffusion lengths of holes and electrons respectively, W is the depletion width and G is th e generation rate of EHP’s, Then IL = q A G (Ln + Lp + W) [18] (eq 2.12)

PAGE 31

19 Thus it can be seen that the depletion regi on and the volume of material lying within a diffusion length on either side of the deple tion region can be referred to as the active collection region of a p-n junction solar cell. 2.9 Equivalent Circuit of a Solar Cell Figure 2.8 Equivalent Ci rcuit of a Solar Cell Figure 2.8 shows the equivalent circu it of a solar cell. The photocurrent IL is represented by a current generator. A diode is in parallel with the current generator. There are two resistances, one is the series resistance and other is the shunt resistance. Series resistance RS, takes into account the bulk resistance fr om the absorber and the resistances from the contact materials. Ideally the va lue of this parameter should be zero. Rsh is the shunt resistance which accounts for any para llel paths across the junction. Ideally this value should be infinity.

PAGE 32

20 2.10 Output Parameters of a Solar Cell The current flowing in a solar cell under illumination is given by I = Io exp((qV/nkT) – 1) – IL (eq 2.13) where n is the diode ideality factor. The first term gives the voltage driven curren t. The second term gives the light generated current. The short circuit current is the curren t generated by the light and is given by the term ISC. ISC = IL (eq 2.14) The open circuit voltage, VOC, is obtained by setting I = 0 in eq 2.13 VOC = kT / q ln[ (IL / I0) + 1] (eq 2.15) It can be seen that VOC depends on the properties of the se miconductor by the virtue of its dependence on I0 The output power at any point in the 4th quadrant is given by the area of a rectangle. At one point the output power is maximum. This leads to the definition of the other output parameter, the fill factor (FF). FF = (VMP IMP ) / (VOC ISC) (eq 2.16) The conversion efficiency is given by = FF VOC ISC / PIN (eq 2.17) 2.11 Loss of Efficiency One of the major loss mechanisms in a solar cell is the recombination in the bulk semiconductor. From the point of generation some of the carriers get recombined before reaching the terminal. The lower the recombination rate in both the bulk and surface,

PAGE 33

21 higher is the VOC and JSC Recombination in the depleti on region through trapping levels can limit the VOC and JSC as well.

PAGE 34

22 CHAPTER-3 DEVICE STRUCTURE AND FABRICAT ION OF OUR SOLAR CELLS 3.1 Device Structure Figure 3.1 Device Structure The above figure shows the structure of the solar cells fabricated in our laboratory. On a 2mm thick Soda lime glass substrate a thin layer of Molybdenum back contact is deposited. Then the CIGS absorber layer is deposited. Following this, the ntype CdS buffer layer is deposited. Fina lly the ZnO front contact is deposited.

PAGE 35

23 3.1.1 Molybdenum Back Contact Some of the requirements of a good back c ontact material for CI GS solar cells are 1. To form an ohmic contact 2. Low recombination rate for minority carriers 3. Certain inertness, to the corrosive atmosphere which the material is being exposed to, during CIGS deposition Molybdenum was the popular choice as back contact material because it fulfilled all the requirements. Jaegermann et al.[19] have reported that a schottky barrier is formed for an intimate p-CIS / Mo contact. This is not in agreement with the fact that an ohmic back contact is necessary for obtaining high efficiency CIGS solar cells. T. Wada et al[20] have investigated the CIGS / Mo inte rface and have concluded that the CIGS / Mo heterocontact including the MoSe2 layer is not a schottky type contact but a favorable ohmic contact. K.Orgassa [21] et al. investigated W, Mo, Ta, Nb, Cr, V, Ti and Mn as possible back contact material for CIGS solar cells. All the films were deposited by electron beam evaporation on soda lime glass. Subsequently CIGS layer was deposited by coevaporation, CdS by CBD and ZnO by RF sputte ring. They have concluded that Ti, V, Cr and Mn tend to react with Selenium during absorber growth thus affecting the absorber growth. Devices with Ta and Nb back contact showed good performance only with graded bandgap absorber. Devices with a tungsten back contact showed comparable performance as devices with a Mo back c ontact, with and without bandgap grading. The authors have also established a relation to calculate the current density loss due to the back contact.

PAGE 36

24 Jloss = q f1.5 ( ) ABC d (Eq. 3.1) ABC -: Optical absorbance of the back contact in the solar cell. This can be calculated from energy flux balance into and out of this layer. f1.5 ( ) -: Spectral photon flux density of AM1.5 spectral intensity distribution. Jloss is dependent on the thickness of the ab sorber layer. For a thick absorber Jloss is zero. But as the thickness starts to reduce Jloss begins to increase depending on the reflective property of the metal. Hamda A Al-Thian et al.[22] have st udied the effect of various sputtering pressures during deposition a nd its influence on Na out diffusion during the CIGS deposition process and its subs equent effect on CIGS devi ce performance. Molybdenum thin films were deposited at various pressures from 0.6mT to 16mT and complete devices were fabricated on these substrates. The CI GS absorber layer for these devices was fabricated by the 3-stage process. They found that the level of Na in the absorber layer had a direct correlation to the sputtering pressure. Samples with the molybdenum sputtered under 0.6mT, showed lower sodi um counts as opposed to samples with molybdenum sputtered under 8mT of argon pre ssure. This has been attributed to the variation in structure of moly with the vari ation in pressure. Moly sputtered at 0.8mT had a dense, small grain structur e with close grain boundaries. Films sputtered at 5mT had porous and fibrous grains with valleys. Films sputtered at 8mT had open columnar structure, consisting of free standing columns, with an increasing amount of column boundary voids. They concluded that the correct sputtering pressure for the best device performance was 5mT.

PAGE 37

25 Scofield et al.[23] investigated the electrical and mechanical properties of molybdenum and concluded that the resistivity of molybdenum thin films increased beyond sputtering pressures of 2mT. Films deposited at higher pressures passed the adhesion test. The stress was compressive at 0.2mT and 20mT but went through a cycle of tensile stress with the maximum tensile stress at 2mT. Since we have already dealt with CIS in chapter 1 we will move on to Cadmium Sulphide. 3.1.2 Cadmium Sulphide CdS is widely used as the n-type semic onductor material to form a p-n junction with p-type CIGS absorber material. CdS is a direct bandgap material with a bandgap of 2.4ev. It has a wurzite structure. It has an absorption edge of 510nm. Thus some of the light in the blue region is absorbed in the CdS layer. These absorbed photons can generate carriers, most of which is lost due to recombination. There are many ways to deposit CdS na mely chemical bath deposition (CBD), sputtering and closed space sublimation (CSS). Of these CBD is the most widely used technique because of its uniformity, ease of deposition and the elimination of the use of vacuum equipment. The lattice constant of CdS is close to that of CIGS, thus the interface between the two will have lower defect density. The disadvantages of CdS are 1. Its bangap limits the short wavelength part of solar spectrum from reaching the absorber, leading to a loss of current. 2. The generation and disposal of la rge quantities of hazardous waste. 3. The CBD method has a low material yi eld (cadmium acetate 27% ; thiourea – 0.34%)[28]

PAGE 38

26 From an industry standpoint both the lo w yield and high amount of toxic waste cause high production costs as well as environmental problems. To circumvent these problems K.Ramanath an et al.[24] have investigated a surface treatment technique. CIGS thin films were treated in an aqueous solution containing Cd or Zn ions followed by the completion of the solar cell with the ZnO layer. They have observed an increase of 2mA/cm2 in Jsc when compared to CdS containing cells, due to absence of losses in the blue region. But the cells with partial electrolyte treatment show lower open circuit voltages and f ill factor. This they have attributed to the nature of the interface created by dissimilar materials and to defe ct states introduced during the processing steps. A.E. Delahoy et. al.[25] have investigated ZIS, In2Se3 and ZnSe as possible candidates to replace the CdS buffer layer. Devices with all these materials as a buffer layer have lower efficiency as compared to CdS. Out of these materials the most promising material is ZIS. The performance of devices with ZIS had 9.9% efficiency while the CdS containing devices had an effi ciency of 10.4%. T.Nakada et al.[31] have reported an efficiency of 17.7% with a ZnS buffer layer deposited by CBD. The difficulty in replacing CBD CdS arises from the fact that the process confers many benefits: 1. Cleaning of the CIGS surface 2. Conformal coverage 3. Protection against sputtering 4. Defect passivation (Su rface and grain boundaries)

PAGE 39

27 5. Provision of a conduction band edge 0.20.3 ev higher than CIGS to avoid recombination under forward bias. 3.1.3 ZnO Front Contact Two of the primary requirements of a good front contact are: 1. High conductivity 2. Transparency to incident photons. ZnO is one of the widely used front cont act material for CIGS based solar cells. It has a bandgap of 3.3eV. It has good optical and electrical properties. ZnO films show a transmission of about 90% between 400-1000nm. The transmission begins to drop at higher wavelengths, due to free carrier ab sorption, which increases with increase in doping. Thus a compromise has to be made in terms of low resistivity and free carrier absorption. 3.2 Device Fabrication 3.2.1 Substrate Cleaning Cleaning of contaminants in the substrate is a very crucial step and has to be done with atmost care as this has a direct impact on device performance. Soda lime glass substrates of dimensions 4” x 2” x 2m m were cut using a diamond scriber. These substrates are soaked in a bath containing de-ionized water and micro-90 cleaning agent. The typical concentration of the cleaning agent in the bath is approximately 2%. The substrates remain soaked in the bath for 3 hrs. The substrates are scrubbed thoroughly The substrates are then placed in an ultrasonic bath, containing a solvent like 2-propanol,

PAGE 40

28 for 20 min. This step is done to eliminate or ganic impurities and some contaminants left by the cleaning agent itself. Then the substrates are placed in a hot water bath, maintained at 70oC, for 30 min. After this the substrates ar e placed, in DI water. The substrates are blown dry using dry nitrogen before subsequent processing. 3.2.2 Molybdenum Deposition The chamber used for molybdenum depos ition has a load lock and a main chamber. In the load lock the substrate is heated to 150oC using a time temperature profile. Approximately 1.5m T of Ar is allowed to flow for 25min. This is done in order to get rid of any moisture in the substrate. Subs equently, the substrate is transferred to the main chamber. The main chamber is pumpe d down approximately to 5 microtorr before deposition. DC magnetron sputtering is used to deposit 1micron of molybdenum. A bilayer of molybdenum is sputtered. The first la yer is sputtered at 5mT and the second layer is sputtered at 1.5mT. The thickness of the first layer is 3000 and the thickness of the second layer is 7500 . The first layer gives good adhesion but has a higher resistivity because of its less dense structure. The second layer has more dense structure and has a lower resistivity. Resistivity numbers of 5E-5 ohm-cm are routinely obtained in our process. 3.2.3 CIGS Absorber Deposition Our laboratory has developed a two stage ma nufacturing friendly process. In this process, the metal precursors are deposited sequentially follo wed by a selenization step. The manufacturing friendliness comes from the fact that this method does not use the

PAGE 41

29 complex co-evaporation process and the metal precursors can be deposited by sputtering or by evaporation and toxic material lik e hydrogen selenide is not used. The coevaporation process does not give a uniform c overage over a large area and it also needs very high degree of control. 3.2.3.1 CIGS Deposition 2” X 2” molybdenum coated SLG substrate is loaded into CIGS deposition system. The chamber is pumped down to 1 mic rotorr. The substrate is heated to 275oC before starting deposition. The fa brication of the CIGS absorber layer is done by the two stage process. The first stage is the precursor formation where the metal precursors are deposited sequentially at 275oC. Following this is the second stage called the selenization. In the second stage the metal prec ursors are annealed at high selenium flux for 28min. The selenization is done in a specific time-temperature profile. In the course of this research the CIGS absorber layer was fabricated by two methods. First, is the Type – 1 process and th e second one is the Type 4 (split In – split Ga) process. 3.2.3.2 Type – 1 CIGS vs. Type – 4 CIGS Type – 1 CIGS: Precursor formation 1. The substrate temperature is held at 275oC. 2. 1,250 of Cu is deposited at 0.8 /s. 3. 800 of Gallium is deposited at 1.2 /s. 4. In, Se are co-evaporated until 3,100 Ao of Indium is deposited at 2.3 /s.

PAGE 42

30 Selenization 1. Constant selenium flux of 25 /s is maintained throughout selenization. 2. Temperature is ramped from 275 to 450oC in approximately 4min. 3. Temperature is held at 450oC for 7 minutes. 4. Ramp from 450 to 550oC in approximately 4minutes 5. Temperature is held at 550oC for 7 minutes. 6. At the end of 16th minute a thin layer of Cu called the top Cu is deposited 7. Cool down from 550 to 425oC Substrate is allowed to cool down to room temperature in vacuum. 0 100 200 300 400 500 600 051015202530 Time (min)Temp (C) Figure 3.2 Sele nization Profile Type – 4 CIGS: Precursor formation 1. The substrate temperature is held at 275oC. 2. 1,250 of Cu is deposited at 0.8 /s. 3. Approx. 3/4th of Gallium is deposited at 1.2 /s.

PAGE 43

31 4. In, Se are co-evaporated until 1550 of Indium is deposited at 2.3 /s. 5. Approx. 3/16th of Gallium is deposited at 1.2 /s. 6. In, Se are co-evaporated until 1550 of Indium is deposited at 2.3 /s. Selenization 1. Constant selenium flux of 25 /s is maintained throughout selenization. 2. Temperature is ramped from 275 to 450oC in approximately 4min. 3. Temperature is held at 450oC for 7 min. 4. At the end of the 3rd min the remaining 1/16th of Gallim is deposited. 5. Ramp from 450 to 550oC in approximately 4min 6. Temperature is held at 550oC for 7min 7. At the end of 16th minute a thin layer of Cu called the top Cu is deposited 8. Cool down from 550 to 425oC Substrate is allowed to cool down to room temperature in vacuum. 3.2.4 Chemical Bath Deposition of CdS A thin layer of CdS, about 300-500 , is deposited on the absorber by CBD. The CBD solution consists of 150ml of de-i onized water to which 27.5cc of 0.15M ammonium hydroxide is added followed by 22cc of 0.015M cadmium acetate. Cadmium acetate is the cadmium source. The sample is introduced into this solution and at 30oC 22cc of thiourea is added. This is the sour ce for sulphur. The temperature of the solution is raised upto 80oC. The solution is constantly stirred using a magnetic stirrer.

PAGE 44

32 3.2.5 ZnO Deposition After CdS deposition the substrate is transferred into a RF sputtering system for the deposition of ZnO. The mask used for the deposition is designed so as to get 25 individual circular dots on the substrate. Th is helps to make devices with varying compositional ratios. The size of each dot is approx. 0.1cm2 The substrate is heated to 125oC using a temperature profile. Then the firs t layer of undoped ZnO is sputtered in an Argon and oxygen ambient where the Ar pressure is kept at 1mT and oxygen pressure is kept at 0.3mT. The typical thickness of undoped layer is 400 . Following this a doped layer of 4500 is deposited. Sputtering is done in an Argon ambient of 1.3mT. The target has alumina pieces kept on it to provi de alumina doping. Resistivity of high 10-4 ohm-cm is routinely obtained in our process. The other device structure i nvestigated over the course of this research is the device with a silicon nitride barrier layer, shown in figure 3.3 Figure 3.3 Device Structure With Silicon Nitride Barrier Layer

PAGE 45

33 3.3 Silicon Nitride Soda lime glass substrates were loaded into a RF sputtering system. The substrate was heated to 200C. The silicon nitride was sputtered at 2mT of Argon. Some of the important properties of silicon nitride are Table 3.1 Properties of Silicon Nitride[26] Density 3-3.3 g/cm3 Electrical Conductivity Insulator Breakdown Field Typically a few 106 V/cm Thermal Conductivity 0.15 W/cm K Thermal Diffusivity 0.07 cm2 /sec Coefficient of thermal expansion 3ppm/K Dielectric constant 6-8 The processing details of all the other layers are the same. The absorber layers for these devices were deposited in two different systems. Though the basic process is the same in both these systems, the system s differ in terms of their geometry. 3.4 System-1 System-1 for convenience w ill be referred to as the ol d system. This chamber has a substrate holder designed for 2’ x 2’ moly bdenum and has a lamp heating arrangement. There are 4 boats each for Cu, In, Ga and Se sources. There are separators between one boat and the others. This minimizes cross contamination. The boats are placed in such a

PAGE 46

34 way that there is an intentional gradient of each material along the substrate. This helps in analyzing the influence of compositi onal gradients in a ll our experiments. Figure 3.4 Orientation of Sources With Re spect to the Substrat e in the Old System 3.4 System – 2 System-2 for convenience will be referred to as the new system. This system has a loadlock and two chambers namely chamber-1 and chamber-2, all in line. The sample is loaded in to the loadlock and transferred into chamber-1 via gate valve1. This chamber has Cu and Ga evaporation guns. This ensures the elimination of the selenium back ground during the deposition of these metals. Af ter this the substrate is transferred to chamber-2 via gate valve-2. This chamber has 3 evaporation guns for Cu, In and Se. Both these chambers have boron nitride heaters for heating the substrate. The temperature control is done using a thermocouple and a cont roller. The gradient of materials in this

PAGE 47

35 system is slightly more complex as opposed to the old chamber. This is because Cu and In have the same direction of the gradient. Figure 3.5 Orientation of Sources With Re spect to the Substrat e in the New System

PAGE 48

36 CHAPTER 4 RESULTS AND DISCUSSION The objective of this work was to under stand the influence of back contact processing conditions on the performance of CI GS based solar cells fabricated by the processes described in previous chapter. The devices thus fabricated were analyzed using I-V and spectral response measurements. The op en circuit voltage, f ill factor and short circuit current density are the primary parameters used to study the influence of processing conditions on the device performa nce. These were used as guidance in the design of experiments. The device numbe ring in a substrate is shown below. Figure 4.1 Device Numbering and Orientation of Sources with Respect to the Substrate

PAGE 49

37 4.1 Impact Of Substrate Cleaning on Device Performance A clean substrate is one of the primary requisites to obtain high efficiency solar cells. The cleaning procedure followed in our laboratory has already been discussed in chapter 3. One of the important steps in this is the solvent clean, which is used to remove organic impurities and stains left from scientific soap. The standard solvent that was used for this purpose was trichlorotrifluoro-ethane. Since there was an environmental safety issue associated with this solvent, we had to replace it with a more environmental friendly solvent like methanol or Trichloroethane or 2-propanol. 400 400 400 390 390 380 390 400 390 370 390 380 390 390 360 390 390 340 360 370 340 320 370 370 340 Figure 4.2 Voc (mV) Distribution in Samp le Cleaned with TrichloroEthane and TrichlorofluoroEthane 400 410 400 380 340 390 400 400 400 390 320 330 320 360 380 300 280 + 380 380 + 270 240 280 210 Figure 4.3 Voc (mV) Distribution in Sample Cleaned with Methanol and TrichloroEthane

PAGE 50

38 400 390 380 340 390 + 390 400 440 430 280 + 400 + 380 290 410 130 400 370 190 330 400 430 400 Figure 4.4 Voc (mV) Distribution in Sample Cleaned w ith Methanol and TetrachloroEthylene The figures 4.2, 4.3, 4.4 show the spread of Voc’s on substrates cleaned using different cleaning agents. When molybdenum was deposited on these substrates, white spots were evident on the surface of the molybdenum. These spots came from the glass substrate to the molybdenum surface. These spot s were present in the glass substrate even after cleaning indicating that the cleaning agents were not powerful enough to remove the stains from the glass substrates. When devices were fabricated on these substrates, the device performance within a substrate was non-uniform, which was evident from the Voc spread from the above figures. This can be re ferred to as spotty device performance. This could be because the growth of CIGS was affected in these spotty areas of molybdenum. The Jsc’s in all the above clean ing methods were limited to 25mA/cm2. Then 2-propanol was tried as a cleaning agent and molybdenum films without any spots were obtained. The devices fabricated on these substrat es had Voc’s around 450mV, Jsc’s around 35mA/cm2 and FF around 60%. Thus we started us ing 2-propanol as our standard solvent for cleaning.

PAGE 51

39 4.2 Metal Ratio and Top Cu Optimization It can be seen from figure 4.5 that Voc’s were limited to 400mV, the Jsc’s were limited to 25mA/cm2 respectively. 140 (25%) 260 (40%) 240 (37%) 60 (26%) 290 (45%) 300 (48%) 280 (46%) 210 (31%) 260 (48%) 320 (46%) 390 (48%) 330 (44%) 280 (41%) 290 (44%) 320 (38%) 370 (48%) 310 (38%) 300 (38%) 320 (44%) 370 (45%) 400 (50%) 400 (47%) 320 (38%) 400 (51%) 430 (58%) Figure 4.5 Voc (mV) Distributions in Run V012 Voc spread in Run # V012, shown above, clearly shows that the best devices in this run were obtained in the Indium end i. e. the In-rich regime in the compositional gradient. This indicates that we were having a higher level of Cu in our film. Thus as the devices progressed from the In-side to Cu-side they became Cu-rich. The metal ratio at the Cu end was 1.04 and was 0.97 at the In end. When the metal ratio became greater than 1 due to the presence of excess Cu, it resulted in the formation of CuxSey. CuxSey being highly conductive tends to short circuit the junction. To get the metal ratio close to 1.0 at the Cu end it was decided to increase the Indium thickness by 200. Thus in Run # V015, the Indium thickness was increased by 200 and all other conditions were the same as in Run V012.

PAGE 52

40 100 (30%) 170 (31%) 360 (48%) 350 (42%) 370 (48%) 320 (40%) 360 (51%) 370 (58%) 370 (60%) 390 (53%) 330 (39%) 350 (44%) 370 (54%) 350 (53%) 330 (45%) 370 (55%) 370 (47%) 370 (48%) 370 (55%) 370 (54%) 340 (43%) 370 (56%) 370 (58%) 370 (59%) 370 (59%) Figure 4.6 Voc (mV) and Fill Factor Distribution in Run V015 It can be seen that the fill factors ha ve improved. These fill factor numbers are close to our standard values. This showed th at our bulk metal ratio was good. So, we left the bulk metal ratio unchanged a nd decided to lower the top Cu thickness. In Run # V016 we lowered the top Cu thickness from 60 to 30. 390 370 350 350 320 370 360 360 350 340 420 380 370 380 390 410 390 400 400 390 420 420 420 360 400 Figure 4.7 Voc (mV) Distribution in Run V016

PAGE 53

41 The Voc spread from Run # V016 still indica ted that we had to lower the top Cu thickness. Thus we reduced the top Cu to 20. 420 (60%) 460 (61%) 450 (56%) 440 (56%) 430 (55%) 430 (57%) 420 (52%) 440 (56%) 430 (60%) 430 (60%) 440 (58%) 450 (56%) 440 (54%) 410 (51%) 430 (54%) 420 (56%) 430 (54%) 420 (53%) 420 (56%) 410 (57%) 270 (33%) 410 (51%) 250 (32%) 420 (53%) 420 (54%) Figure 4.8 Voc (mV) and FF Distribution in Run V020 The Voc spread from Run V020 in figure 4.8 shows good device performance. The 2 bad devices could be due to molybdenum being spotty. 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 40050060070080090010001100120013001400 wavelength (nm)Q.E. V012-15 25.9 mA/cm^2 V020-06 35.0 mA/cm^2 V015-15 31.6 mA/cm^2 V016-15 34.2 mA/cm^2 Figure 4.9 Spectral Response Comparison of Devices From Runs V012, 15, 16, 20 with Top Cu of 60Ao, 20Ao, 60Ao, 30Ao Respectively

PAGE 54

42 The spectral response in figure 4.9 showed that the bulk metal ratio is the primary controlling factor of currents. It can also be seen that with variation in top Cu the spectral response shows improvement till the 900nm wave length range, which corresponds to the first few thousand Angstroms in the absorber laye r. Indicating that the effect of top Cu is on the surface of the absorber layer[30]. 4.3 Substrate Effects – Role of Sodium At elevated temperatures of processing sodium tends to diffuse out of soda lime glass and migrates though the film and is known to exis t in interfaces and grain boundaries[27]. It is also known to form Nacu antisite defect[13]. Na and Cu are Group-1 elements therefore substitution of one by the other gives rise to ne utral defects. Na is also thought to be a catalyst in the oxidation of selenium vacancies. Selenium vacancies (Vse ) can form at surface indium sites this is shown in eq 4.1. These are donor defects. Oxygen at the surface in presence of sodium gains 2 electrons from the lattice producing O2which fills the selenium vacancy on the indium surface thus passivating the donor defects. This is shown in eq 4.2 and 4.3. In these euations M denotes a metal site (which can be In or Cu) and x denotes a neutral charge { Inm x SeSe x }Surf { Inm x VSe 2+ }Surf + 2e+ Se (eq 4.1) (O2 + 2e) (O-) (eq 4.2)[15] { Inm x VSe 2+ }Surf + (O2-) { Inm x OSe x }Surf (eq 4.3)

PAGE 55

43 To reduce the effect of sodium in our devices we deposited a silicon nitride barrier layer on the SLG and fabricated de vices in both the old and new system. The device fabrication is described in chapter-3. 4.3.1 Old System Samples were fabricated in this system with nitride thickness varying from 20-150 . Figure 4.10 Variation of Device Performance as a F unction of Nitride Thickness in Old System 4.3.2 New System Samples were fabricat ed with silicon nitride thickness varying from 200Ao – 1600Ao. Figure 4.11 Variation of Device Performance as a Function of Nitride Thickness in New System Si3N4 Thickness ( ) Voc(mV) Isc (mA) FF (%) 20 400 5.4 53% 50 260 3.0 27% 150 90 2.5 30% Si3N4 Thickness ( ) Voc(mV) Isc (mA) 200 350 6.0 800 300 2.5 1600 290 0.3

PAGE 56

44 4.3.3 Old System vs New System 0 50 100 150 200 250 300 350 400 450 0500100015002000Silicon Nitride Thickness (Angstroms)Voc (mV) Old System New System Figure 4.12 Variation of Voltage as a Func tion of Silicon Nitride Thickness in Old and New System It is evident from figure 4.12 that the drop in device performance, as a function of silicon nitride thickness, was more rapid in the old system as opposed to the new system. This can be speculated upon as follo ws. The primary difference between the two systems is that in the new system we have the ability to deposit Cu in a selenium-free environment; Whereas in the old system th ere is a continuous selenium background during copper deposition. The back-ground se lenium was due to a large amount of accumulated selenium in the system and th e contamination of the copper source with selenium during depositions. This resulted in the formation of copper selenide. It was felt that that the device performance in the old system was limited by the formation of copper

PAGE 57

45 selenide. In the new system Cu and Ga were deposited in chamber 1, which does not contain selenium. The substrate is then moved to chamber 2 for the In2Se3 and selenization steps. It is thought that the CuxSey formed in the old system is not only a problem by itself but also resulted in the form ation of high levels of copper vacancies. This resulted in Cu-poor CIGS films. Oxidati on is more prevalent in this environment, and our process has been tuned accordingl y to get the best Voc’s and device performance. The presence of silicon nitride reduced the amount of sodium reaching the CIGS layer as a function of silicon nitride thickness. This lack of sodium resulted in lower oxidation and a high level of InCu anti-site defects, thus resulted in lower Voc. In the new system oxidation is less prevalent and the process has been tuned accordingly to obtain the best device performance. Thus as the sodium level is reduced the accompanying reduction in oxidation is less important and thus there is less of an effect on Voc. The 200 data point from the new syst em was interesting. For this device Cu was deposited in chamber 2 of the new system Chamber 2 has a selenium environment. Though we expect to form some CuxSey during Cu deposition, this would be less than that of the old system. Thus the impact on th e Voc should be in between the old and new system. This can be seen in the graph above.

PAGE 58

46 4.3.4 Stability of Devices with 20Ao Nitride Barrier Layer 0 50 100 150 200 250 300 350 400 450 500 0510 Time (months) V oc (m V) 20 Angstroms Nitride layer Standard sample Figure 4.13 Voc Variations of Standard Sample and 20 Ao Nitride Sample Vs Time Although, the performance of devices with a 20 silicon nitride barrier layer was lower than the standard device (without the barrier layer), the performance improved as time passed (8 months) as seen in figure 4.13. This result reinforces the discussion above. In the absence of a barrier layer the pro cess was tuned to get good initial performance. However as the device was kept in the lab in the presence of air and moisture, they oxidized and degraded. Devices with 20 silicon nitride barrier layer started with lower initial performance because of under oxidation since the oxidation could continue when the device was kept in the lab, though at a slower pace because of reduced Na environment, the performance seemed to improve and the device was more stable.

PAGE 59

47 4.3.5 Run #V029, V046 350 370 350 370 370 240 360 350 310 430 290 320 220 350 240 160 270 220 230 240 150 180 200 210 250 Figure 4.14 Voc (mV) Variation in R un# V046 (50A Silicon Nitride Layer) Figure 4.15 Voc (mV) Variation in R un# V029 (20A Silicon Nitride Layer) It can be observed from figures 4.14 and 4.15 that as the devices went from Cu end to In end, there seems to be a drop in de vice performance. It is more pronounced in the 50 Ao (V046) silicon nitride blocking layer. This can be speculated as follows: As we move from the Cu end to In end there is a gr adient in Cu thickness and In thickness (i.e.) at the Cu end we have more Cu and less In a nd at the In end we have more In and less of Cu. This corresponds to a higher level of Vcu in the indium end as opposed to Cu end. In 330 400 390 340 360 300 380 360 390 380 220 370 310 370 380 380 310 370 340 350 370 350 350 370 340

PAGE 60

48 our standard process th e level of Cu is tuned to the environment of sodium coming from substrate. In the presence of a barrier laye r the Group-1 (Cu + Na) level is lowered. In the indium end, as already mentioned, there is a higher level of Vcu. In the presence of Na they get into these sites and form NacuInSe2. In the absence of Na, Indium tends to get into these sites and forms Incu antisite defects. These are donor defects. Thus as we progress from Cu end to In end we have higher level of Incu antisite defect. This leads to a drop of Voc from Cu to In end. 4.3.6 Increase in Cu Level The Cu level was increased in order to analyze the possible compensation for lack of sodium. The edge to edge difference in Cu thickness was 100. Thus we decided to increase the Cu thickness on the substrate by 100. 380 390 380 280 380 380 390 370 350 360 400 390 330 380 380 380 370 370 370 370 370 370 360 360 340 Figure 4.16 Voc (mV) Spread After Increasing Cu Level The Voc spread in figure 4.16 showed no specific trends, suggesting that sufficient Cu was supplied to compensate for the sodium thereby suppressing the formation of Incu antisite defects. The best device ha d a Voc of 400mV and Jsc of 34.5mA/cm2. Fig 4.17 shows the spectral response of device V042-11, which had the maximum Jsc of

PAGE 61

49 35.2mA/cm2 The Jsc value is close to the Jsc from our standard devices but the Voc is very low in comparison to the values from our standard devices. This shows that even though Cu can substitute for Na we need sodium for good device performance. 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 40050060070080090010001100120013001400 wavelength (nm)Q.E. Figure 4.17 Spectral Response of Device V042-11 From the SEM images in Figure’s 4.18 and 4.19 it can be seen that the absorber layer grown on substrates with a barrier layer has a rougher surface as opposed to our standard CIGS film. This could result in a non uniform coverage of CdS thus resulting in a bad junction and lower Voc’s.

PAGE 62

50 Figure 4.18 SEM Image of Standard CIGS Figure 4.19 SEM Image of CIGS with a 50A Barrier Layer From the above we concluded that bloc king off any amount of sodium using a barrier layer hurts our device performance. So we decided to optimize the molybdenum back contact, through which sodium migrates to the absorber at elevated temperatures of processing and in turn fine tune our device performance. 4.4 Resistivity vs Rate It has been reported that in a bi-layer sputtered molybdenum film the first layer which is sputtered at high pre ssure is less dense and hence ha s a higher resistivity. The

PAGE 63

51 second layer which is sputtered at lower pr essure is denser and hence has a lower resistivity[22]. It can be observed from figure 4.20 that the resistivity of molybdenum films which are used in our studies is dependent on the rate of deposition. 0.00E+00 2.00E-05 4.00E-05 6.00E-05 8.00E-05 1.00E-04 1.20E-04 1.40E-04 1.60E-04 00.511.522.533.5 Rate (Angstroms/Sec)Resistivity (ohm-cm) Figure 4.20 Variation of Resistivity with Rate of Sputteri ng of Molybdenum To obtain higher rate of deposition the sputtering power has to be increased. Increasing power leads to an increase in density, and a decrease in resistivity. 4.5 Device Performance vs Rate In figure 4.21 the filled da ta points for Voc and Jsc are from devices with molybdenum sputtered from a new target and the non-filled Voc and Jsc data points are from devices with molybdenum sputtered from an old target. It can be seen from figure

PAGE 64

52 4.21 that to obtain a Jsc value of approx 35mA/cm2 the sputtering rate of molybdenum has to be kept above 2.7/s. This is true for the data points from both the old and new targets. From the discussion in section 4.4, it can be inferred that the density of molybdenum was directly related to the sputte ring rate. From a sodium perspective, lower density would translate into higher sodium migrating into the CIGS absorber layer. As the sputtering rate increases the density increases. Thus the channel for sodium migration is more constrained. This would translate in to lesser sodium migrating to the film. When excess sodium is present in films they tend to form deep states [29] and can start trapping carriers. This is a possible reason for lowe r Jsc values at lower sputtering rate. 1 1.5 2 2.5 3 3.5 Rate (Angstroms/sec) 26 28 30 32 34 36 38 40J s c ( m A / c m 2 ) 380 390 400 410 420 430 440V o c ( m V ) Current Voltage Figure 4.21 Variation of Device Performance as a Function of Rate of Sputtering of Molybdenum

PAGE 65

53 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 40050060070080090010001100120013001400 wavelength (nm)Q.E. 57-11 27.7 mA/cm^2 58-13 34.4mA/cm^2Figure 4.22 Comparison of Spectral Res ponse of Samples From Runs V057, 58 Figure 4.22 shows the SR of the two devices with molybdenum sputtered at 1.3/s(Run V057) and 3.2 /s(run V058). It ca n be seen from the SR that the response of device V057 was uniformly shifted down and has a bigger slope hinting that there might be a collection problem in this case. Thus the sputtering rate has to be kept above 2.7 /s to get good Jsc. The impact of molybdenum sputtering rate on Voc was not very clear. This is because even though the average Voc of devices seems to drop with increasing sputtering rate but the average Voc of device with mo lybdenum sputtered at 3.2/s from the old target has the best performance. This suggests that the drop in Voc with the new target was due to high discharge voltage, wh ich is dealt in the next section.

PAGE 66

54 4.6 Effect of Discharge Voltage on Voc 350 360 370 380 390 400 410 420 430 440 450 400450500550600650700 Discharge Voltage (Volts) V oc (m V) Figure 4.23 Variation of Open Circuit Volta ge with Discharge Voltage of Molybdenum Sputtering It can be seen from figure 4.23 that as the discharge voltage of molybdenum sputtering is increased the Voc of devices keeps decreasing. The devices fabricated on molybdenum sputtered at 680V had a tendency to pop out from the molybdenum surface suggesting that the devices were in high le vel of stress. The drop in device performance could be because of the high level of stress developed with increase in discharge voltage. To obtain good device performance the discha rge voltage has to be kept below 600V.

PAGE 67

55 4.7 Effect of Molybdenum Th ickness on Device Performance 34 34.5 35 35.5 36 36.5 37 020004000600080001000012000Moly thickness (Angstroms)Jsc (mA / cm^2) Figure 4.24 Variation of Maximum Jsc w ith Variation on Molybdenum Thickness 0 50 100 150 200 250 300 350 400 450 500 020004000600080001000012000Moly thickness (Angstroms) V oc (m V) Figure 4.25 Variation of Maximum Open Circ uit Voltage with Vari ation in Molybdenum Thickness

PAGE 68

56 The Molybdenum thickness was decreased with an intention to let more sodium migrate to the CIGS film. The molybde num thickness was reduced from 10,500 to 5000 by reducing the thickness of the second la yer. The first layer thickness was kept at 3000. It can be observed from figure 4.25 th at the maximum Voc value was constant with varying thickness till 6000. 420 450 440 430 390 450 460 450 450 430 450 430 420 440 420 450 440 390 400 420 410 440 420 430 270 Figure 4.26 Voc (mV) Spread on Substr ate with Molybdenum Thickness 6000 415 420 425 430 435 440 445 450 455 460 465 0123456 Row (1-Cu end ---5-In end) V oltage (m V) Standard sample (10,500 Angstroms thick Molybdenum Sample with 6000 Angstroms thick molybdenum Figure 4.27 Metal Ratio Sensitiv ity (Variation of MaximumV oc within the Substrate Between a Standard Sample and a Sample With 6000Ao Thick Molybdenum Layer)

PAGE 69

57 Although the maximum value of Voc is appr oximately the same at all thickness from 6000 to 10,500, it can be seen from figure 4.2 6 that Voc spread across the substrate is more uniform in the case of a 6000 thick moly bdenum layer, i.e. the devices were less sensitive to variation of metal ratio. This is shown clearly in figure 4.27 by comparing the variation of Voc while progressing from the Cu end to the In end in a standard sample within the sample with that in the 6000 thick molybdenum layer. The reduced sensitivity to variation in meta l ratio is probably because of more sodium migrating into the film, thus increasing the Group-1 / Group3 ratio uniformly across the substrate without getting Cu-rich. When the thickness was reduced to 5000, it can be observed that there was a drop in Voc, so it was d ecided to keep the second layer thickness at 3000. The molybdenum thickness was reduce d to 4000 by reducing the first layer thickness to 1000 and maintaining the second layer at 3000. Though the performance of the devices was better than the devices with 5000 molybdenum, still they were lower than that of 6000 molybdenum. Generally, af ter the deposition of the absorber layer the film looks bluish in color hinting that the surface of the film is smooth. CIGS films deposited on 4000 and 5000 thick molybdenum appeared grayish in color meaning that the films were rougher. When CdS was deposited on these substrates it could have resulted in a non-uniform coverage of CdS, le ading to a bad junction. This can also be ascertained by the I-V curve in Figure 4.28 which shows the sample with a 4000 thick molybdenum layer showing shunting. This coul d have resulted in lo ss of Voc or it could be because of some defects in the absorber It can be observed from figure 4.24 that the maximum Jsc is obtained from the device with 4000 thick molybdenum layer. This is probably because the rougher surface helped get rid of some of the reflection losses. The

PAGE 70

58 best overall device performance was obtaine d at 6000 of molybdenum thickness. The best device had a Voc of 460mV, Jsc of 35.7mA/cm2 and a Fill Factor of 62%, Figure 4.29 shows the I-V curve of this device. In order to measure the sodium content in the absorber layer we did EDS measurements on our samples. The data obtained from this measurement was inconclusive because we realized that the sodium detected from this measurement was predominantly from the SLG substrate. The sodium content in the film can be measured accurately by doing SIMS measurements but we couldn’t do this measurement because of the unavailability of the equipment. -0.005 -0.004 -0.003 -0.002 -0.001 0 0.001 0.002 0.003 0.004 -0.3-0.2-0.100.10.20.30.40.50.6 Voltage (mV)Current (mA) Figure 4.28 I-V of Device with 4000Ao Thick Molybdenum Layer

PAGE 71

59 -0.005 0 0.005 0.01 0.015 0.02 -0.4-0.200.20.40.6 Voltage (mV)Current (mA) Figure 4.29 I-V of Device With 6000Ao Thick Molybdenum Layer 4.8 Type IV (Split Ga – Split In) Process The best results obtained in our laborator y for our 2-stage process is a device with an efficiency of 13.0%[30]. During this ti me the gallium was deposited by sputtering, which was eventually replaced with an ev aporation set up. The process kinetics with gallium sputtering helped the incorporation of a little bit of gallium in the space charge region which helped to open up the bandgap to around 1.0eV. This in turn helped to get Voc’s as high as 495mV. When we switched to gallium evaporation, the process kinetics did not help in the incorporation of gallium in the space charge region, hence the Voc’s were limited to 460mV. The base process was changed so as to try and incorporate gallium in the space charge region. This proce ss was called the Type IV (split In – split Ga) process.

PAGE 72

60 In this process the gallium was split into 3 parts. The idea behind this was that the first part (Back Gallium) would help in a dhesion to the back contact, the second part (middle Gallium) which was deposited by splitting the In2Se3 would help in obtaining a normal gallium profile from the back contact to the front contact and the third part (top Gallium) would help in opening the bandgap. The complete processing details for this process are given in chapter 3. 4.8.1 Run # V067, V070 ( x \150 Ao \50 Ao) In Run # V067, gallium was split into 600 of back gallium, 150 of middle gallium and 50 of top gallium. The Voc spread of devices from the run is shown in Figure 4.30. 460 460 410 430 400 480 460 460 450 390 450 470 470 450 450 470 480 480 480 470 460 470 470 470 440 Figure 4.30 Voc (mV) Spread From Run # V067 It can be seen that the device performance is very uniform throughout the substrate with the best devices having Voc’s of 480mV. The Jsc obtained in this run was 32.3mA/cm2. Figure 4.31 shows the comparison of the spect ral responses between a device fabricated using the Type I process and the device from this run.

PAGE 73

61 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 400600800100012001400 wavelength (nm) Q .E Type IV Type IFigure 4.31 Spectral Response Comparing Type I vs Type IV It can be concluded from figure 4.31 that the Type IV process incorporates gallium into the space charge region which has resulted in an approximate 40meV increase in the bandgap when compared with the Type I proce ss. This bandgap shift helped in obtaining Voc values greater than 460mV. To analyze the effect of back gallium the thickness of back gallium was lowered to 500Ao, leaving all other parameters same as that of Run V067. 480 430 460 290 400 480 470 490 490 460 490 490 490 470 480 490 490 480 490 490 430 450 430 430 410 Figure 4.32 Voc (mV) Spread From Run # V070

PAGE 74

62 It can be observed in figure 4.32 that the be st devices had Voc’s of 490mV, which was the highest value of Voc obtained over the cour se of this research. However, the Jsc was limited to 30.6mA/cm2. By varying the back gallium thickness there was no significant improvement in device performance, so it was decided to analyze the effect of the middle gallium on device performance. 4.8.2 Effect of Middle Gallium The effect of middle Gallium was analyzed by varying the thickness of middle gallium and by keeping the back and top gallium thicknesses constant. Table 4.1 Effect of Variati on of Middle Gallium (Back Gallium 600 \ \ Top Gallium 50) Run # Middle Ga Thickness(Ao) Voc (mV) Jsc (mA/cm2) FF V067 150 480 32.3 64% V069 250 430 32.2 61% V074 100 460 30.8 54% Table 4.2 Effect of Variation of Middle Ga llium (Back Gallium-500 \ \ Top Gallium50) Run # Middle Ga Thickness(Ao) Voc (mV) Jsc (mA/cm2) FF V070 150 490 32.3 62% V068 250 410 37.4 59%

PAGE 75

63 The middle gallium has a significant impact on both the Jsc and Voc. It can be seen from Tables 4.1 and 4.2 that the best Voc values are obtained with a middle gallium of 150Ao. When we raise the gallium level to 250, in the case of devices with 600 of back gallium there is an overall drop in device pe rformance, however the devices with 500 of back gallium had a Jsc of 37.4mA/cm2. This is the highest value of Jsc obtained for this process. The Voc of devices with 250 of mi ddle gallium was lower than that of devices with 150 of middle gallium, irrespectiv e of the thickness of the back gallium 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 400600800100012001400 wavelength (nm)Q.E. V068 V069 Figure 4.33 Comparison of SR Between V068 and V069 Figure 4.33 shows the comparison of devi ces with varying back gallium thickness (500Ao V068, 600Ao -V069). The middle and top gallium thickness were 250Ao and

PAGE 76

64 50 respectively in both the devices. It can be seen that the devices with 500 of back gallium has a slightly lower band gap as opposed to devices with 600 of back gallium. This suggests that the back gallium level would determine the amount of gallium that would remain in the front of the device, i.e. the less the gallium at the back of the device the more the migration from the from the front of the device. The slightly higher bandgap in the case of device with 600 of back galliu m could be the reason for the higher Voc in this device when compared with the device with 500 of back gallium. The higher Jsc in devices with 500 of back gallium could be because of a favorabl e band gap profiling caused by the migration of some of the gallium to the back. 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 400600800100012001400 wavelength (nm)Q .E V067 V069 Figure 4.34 Comparison of SR Between V067 And V069 Figure 4.34 shows the comparison of devices with varying middle gallium thickness (150 V067, 250 -V069). The back and top gallium thickness were 600

PAGE 77

65 and 50 respectively in both the devices. It can be observed that even though the total gallium level in the front of the device was in creased, it didn’t translate into a significant bandgap shift. This suggested that some of the gallium that was deposited stayed as free gallium thus resulting in point defects, which affected the device performance The devices with 150 of middle gallium had the best Voc’s, while the devices with 250 of middle gallium had the best Jsc ’s. There may be two possible explanations for this behavior: 1 Gallium vacancies may have been created in the absorber with 150Ao of middle gallium. However, 250 of middle gallium may result in excess gallium in the absorber. This shift from gallium vacancies to excess gallium can be used to explain this difference in the device performance. 2 With 150Ao of middle gallium there may be point defects in the bulk of the material, which results in lower Jsc. Howe ver, with 250 of middle gallium the point defects may be predominantly on the surface thereby, affecting the Voc’s.

PAGE 78

66 4.8.3 Effect of Top Gallium Table 4.3 Effect of Variation of Top Gallium (Back Gallium-500 \ Middle Gallium250 \ ) Run # Top Gallium Thickness(Ao) Voc (mV) Jsc (mA/cm2) FF V068 50 410 37.4 59% V072 25 440 27.8 53% It can be seen from Table 4.3 that the de vices were sensitive to the variation of top gallium. The devices with lower top gallium probably had lower point defects on the surface which resulted in higher Voc’s but th e lower Jsc’s may be due to an unfavorable bandgap profiling which might have led to collection problems. The best device from this process had a Voc of 480mV, Jsc of 32.3mA/cm2. Some of the devices had Voc’s as high as 490mV, Jsc’s as high as 37.4mA/cm2 and FF’s as high as 64%.

PAGE 79

67 CHAPTER 5 CONCLUSIONS AND RE COMMENDATIONS The accomplishments of this research were 1 Analyzed the influence of silicon nitride barrier layer on Type-I CIGS solar cells. The absorber layers for this research wo rk were fabricated from both the old and new CIGS deposition system. 2 Analyzed the influence of molybdenum processing conditions on Type-I CIGS solar cells. 3 Developed a TypeIV CI GS deposition process. Silicon Nitride was sputtered on to SLG and devices were fabricated on these substrates. The absorber layer was deposited, by the Type-I process, on both the old and new system. The results showed that the devices fabricated in the old system were more sensitive to the presence of the barrier laye r. The Voc’s dropped from 400mv to 90mv as the silicon nitride thickness increased from 20 to 150. The devices fabricated in the new system with silicon nitride thic kness varying from 200 to 1600 had a corresponding Voc variation of 350mV to 290 mV. This difference in behavior was because the Cu deposited in the new system had no selenium background. Whereas, in the old system we had a continuous unintenti onal selenium background, which resulted in

PAGE 80

68 the formation of copper seleni de. Thus the CIGS films deposited in the old system werecopper poor when compared to the films from the new system. The impact of Na is more on Cu-poor films. The Voc distribution in samples with 20 and 50 silicon nitride layers showed a drop in device performance as a function of Cu/In ratio suggesting the possibility of formation of Incu antisite defect. We tried to compensate for Na by increasing the copper level in the film. Th e overall device perf ormance improved and there were no specific trends within the s ubstrate. The best de vice had a Voc of 400mV and a Jsc of 35mA/cm2 It can be seen that the Voc is low when compared to our standard device. It can be c oncluded from this that blocking off the diffusion of any amount of sodium hurts our device performa nce and copper cannot compensate for the absence of sodium. This showed that Na apart from occupying the copper sites (Nacu) also has other bene ficial effects. In order to increase the sodium content in the film the molybdenum layer can be made less dense. As the moly bdenum sputtering rate varied from 1.2 /s to 3.2/s, the resistivity of the film decreased. This mean t that the films were getting denser with increased sputtering rate. To obtain good devi ce performance the sputtering rate had to be kept above 2.7/s. The reduction in device pe rformance at lower rate may be due to excess sodium in the film. The thickness of the molybdenum layer was decreased from 10,000 to 4,000 with the intention of letting mo re sodium into the CIGS film. It was found that a 6000 thick molybdenum layer gave the best device performance of 460mv and 35.7mA/cm2 The devices were also insensitive to the variation in metal ratio (uniform device performance throughout the substrate).

PAGE 81

69 The structure of CIGS is strongly depend ent on the structural properties of the molybdenum layer. Properties like morphology, grain size and stress state can affect the CIGS nucleation and growth process. Some of the results that we have observed may be due to the changes in the structure of the CIGS itself. The structural change may be because of two possible reasons. First, change in the sodium content in the CIGS film could have affected the structure. Second, th e properties of the molybdenum film may be altered due to the variation in the deposition rate and due to the deposition of molybdenum on the silicon nitride barrier layer, thus affecting the CIGS structure. In order to incorporate sodium in a cont rolled manner, a sodium source has to be deposited on molybdenum before the deposition of the CIGS layer and the SLG substrate could be coated with an alkali barrier layer like silicon nitride. The sodium source can be deposited either by evaporation of NaCl or by doing a NaCl solution treatment. The evaporation of NaCl may not be feasible in ou r laboratory because of the concern of cross contamination in the existing equipments. One of the key process parameter in molybdenum deposition was found to be the discharge voltage during sputtering. The Voc’ s were found to decrease with increase in sputtering discharge voltage. To obtain g ood device performance the discharge voltage had to be kept below 600V. At around 700V the devices had poor adhesion to the back contact. This could be because of a high level of stress developed in the molybdenum film due to high discharge voltage. The type IV recipe developed to incorporate gallium in the space charge region helped to improve the Voc’s beyond 460mV. In this process, the total gallium thickness was split into 3 parts. The first part was called the back gallium, which was deposited

PAGE 82

70 after the copper deposition. The second part wa s referred to as the middle gallium, which was deposited by splitting the indium selenide. The third part which was deposited in the 4th minute of selenization was called the top gallium. The gallium at the back of the device seemed to determine the amount of galliu m that stayed in the front of the device i.e. lesser the gallium at the back of the device more is the migration from the front of the device. This showed that the kinetics of the process tends to create an automatic gallium profiling in the device. This inherent behavior could be exploited to improve the device performance. It was observed that the increase in gallium level (beyond 200) in the front of the device (middle + top Ga) did not translate into a significant bandgap shift. This suggested some of the gallium that was deposited stayed as free gallium thus resulting in point defects, which affected the device performance. In order to circumvent this problem experiments like increasing the substrate temperature during precursor formation, adjusting the selenization timing and profile, and argon annealing, can be carried out. The devices fabricated using the type IV process had Voc’s as high as 490mV, Jsc’s as high as 37.4mA/cm2 and fill factors as high as 64%.

PAGE 83

71 REFERENCES [1] Wei S., Zhang S. and Zunger A., Appl. Phys. Lett., Vol. 72, No.24, (1998). [2] Contreras M.A. et al, Progr. Photovolt,7, 311-316, (1999). [3] Martin A. Green, Keith Emery, Da vid L. King, Sanekazu Igari and W ilhelm Warta, Solar cell Efficiency Tables, September 2001. [4] Horig W., H. Neumann and H. SobottaB. Schumann and G. Khn, Thin Solid Films, Volume 48, Issue 1, 1978. [5] Panse P., Ph.D. Dissertation, Un iversity of South Florida, 2003. [6] Albin D.S, Tuttle J.R, Mooney G.D and Cara pella J.J, Proceedings of the IEEE Photovoltaics Specialists Conference, 1990. [7] Dullweber T., Hanna G.,Contreras M. A et. al, Thin Solid Films, 361-362, 2000. [8] Marika Bodegard, Karin Granath, Lars Stolt and Rockett Angus, Solar Energy Materials and Solar Cells, 58, 1999. [9] Basol B.M, Kapur V.K, Leidholm C.R, Minnick A. and Halani A., Proceedings of the IEEE Photovoltaics Specialists Conference,December 1994. [10] Probst V., Rimmasch J., Riedl W.,Stette r W., Holz J., Harms H. and Karg F., 24th IEEE PVSC (1st WCPEC), 1994. [11] Bodegard et al., 13th European Photovoltaic Solar Energy Conference, 1995. [12] Nakada T. et al., International PVSEC – 9, 1996. [13] Stanbery B.J, Lambers E.S and Anderson T.J, 26th IEEE – PVSC,1997. [14] Neuman H., Solar Cells, 16, 317-333 (1986). [15] Kronik L., Cahen D., Schock H., Advanced Materials, Communications, September 1997.

PAGE 84

72 [16] Rau U., Schmitt M., Hilburger D., Engelhardt F., Seifert O. and Parisi J., 25th IEEE PVSC, 1996. [17] Sze S.M, Book: Physics of Se miconductor Devices, John Wiley & Sons, 1981. [18] Martin A.Green, Book: Solar Cells Operating Principles Technology and Systems Applications, Prentice Hall Inc., 1982. [19] Jaegaermann W., Loher T. and Pette nkofer C., Cryst. Res. Technology, 31, 1996. [20] Wada T., Kohara N., Nishiwaki S. and Negami T., Thin Solid Films, 387, 2001. [21] Orgassa K., Schock H. W and Werner J.H, Thin Solid Films, 431-432, 2003, 387391. [22] Hamda A. Al – Thani, Falah S. Ha soon, Matt Young, Sally Asher, Jeff L. Alleman, Mowafak M. Al – Jassim and Don L. Williamson, IEEE, 2002. [23] John H. Scofield, A. Duda, D. Albin, D. Albin, B. L Ballard, P.k Predecki, Thin Solid Films, 260, 1995, 26 – 31. [24] Ramanathan K., Hasoon F.S, Smith S., Young D.L., Contreras M.A, Johnson P.K, Pudov A.O, Sites J.R, Jour nal of Physics and Che mistry of Solids, 64, 2003, 1495 – 1498. [25] Delahoy A.E, Akhtar M., Cambridge J., Chen L., Govindarajan R., Guo S. and Romero M.J., IEEE, 2002. [26] www.batnet.com/eni gmatics/semicondutor_proce ssing/CVD_Fundamentals/ Films. [27] Bodegard M., Stoll L. and Hedstrom J., 12th European Photovoltaic Solar Energy Conference, 1994, 1743. [28] Hariskos D., Powalla M., Chevaldonne t N., Lincot D., Schindler A., and Dimmler B., Thin Solid Films, 387, 2001, 179 – 181. [29] Rau U., Schitt M., Hilbuger D., Engelhardt P., Seifert O., Parisi J., Reidl W., Rimmasch J., Karg F., 25th IEEE PVSC, 1996, 1005. [30] Sankaranarayanan H., Master’s Thes is, University of South Florida, 1998.

PAGE 85

73 [31] Nakada T. and Mizutani M., IEEE, 2000. [32] Zhang S.B et al., Physics Rev. Letters, 78, 4059 – 4062(1997).


xml version 1.0 encoding UTF-8 standalone no
record xmlns http:www.loc.govMARC21slim xmlns:xsi http:www.w3.org2001XMLSchema-instance xsi:schemaLocation http:www.loc.govstandardsmarcxmlschemaMARC21slim.xsd
leader nam 2200397Ka 4500
controlfield tag 006 m d s
007 cr bn
008 040712s2004 flua sbm s000|0 eng d
datafield ind1 8 ind2 024
subfield code a E14-SFE0000368
035
(OCoLC)56137789
9
AJR7192
b SE
040
FHM
c FHM
090
TK145
1 100
Mohanakrishnaswamy, Venkatesh.
0 245
Processing and characterization of CIGS based solar cells
h [electronic resource] /
by Venkatesh Mohanakrishnaswamy.
260
[Tampa, Fla.] :
University of South Florida,
2004.
502
Thesis (M.S.E.E.)--University of South Florida, 2004.
504
Includes bibliographical references.
516
Text (Electronic thesis) in PDF format.
538
System requirements: World Wide Web browser and PDF reader.
Mode of access: World Wide Web.
500
Title from PDF of title page.
Document formatted into pages; contains 85 pages.
520
ABSTRACT: The goal of this research was to understand the role of the glass substrate and molybdenum (Mo) back contact on the performance of Copper Indium Gallium diselenide (CIGS) / Cadmium Sulphide (CdS) based photovoltaic devices, and to improve the performance of these devices. The CIGS absorber layer was fabricated in a 2 stage process. In this process the metal precursors were deposited at 275oC followed by a high temperature selenization step. The advantage of the 2 stage process is that it is manufacturing friendly. The first step in fabrication of solar cells is to clean the substrate which is necessary to obtain good device performance. A variety of environmentally friendly solvents were evaluated, to determine the optimal cleaning agent. At elevated temperatures of processing sodium tends to diffuse out of Soda lime glass (SLG) and enter the semiconductor. The presence of this sodium during CIGS fabrication is necessary to obtain high efficiency CIGS based solar cells. A silicon nitride barrier layer was sputtered onto the SLG substrates, and this substrate was used to make complete devices. The CIGS absorber layer was deposited by the Type I recipe in two different vacuum systems.These devices were compared with standard devices the SiN barrier layer, to understand the role of sodium on the devices fabricated from both of the systems. Furthermore, the influence of molybdenum processing parameters, such as thickness and rate of sputtering, on device performance were studied. The Voc of devices fabricated using the Type I process was limited to 460mV. In order to improve the Voc's a new absorber recipe (Type IV) was developed. Voc's of upto 490mV, Jsc's of upto 37.4mA/cm and FF of 64%, were obtained. This improvement in performance was due to incorporation of gallium in the space charge region. Techniques such as I-V measurements, spectral response, SEM and EDS measurements were used to characterize the devices.
590
Adviser: Morel, Don L.
653
molybdenum.
sodium.
backcontact.
gallium.
690
Dissertations, Academic
z USF
x Electrical Engineering
Masters.
773
t USF Electronic Theses and Dissertations.
949
FTS
SFERS
ETD
TK145 (ONLINE)
nkt 7/26/04
4 856
u http://digital.lib.usf.edu/?e14.368