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Improved 1/f noise measurements for microwave transistors
h [electronic resource] /
by Clemente Toro Jr.
[Tampa, Fla.] :
University of South Florida,
Thesis (M.S.E.E.)--University of South Florida, 2004.
Includes bibliographical references.
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ABSTRACT: Minimizing electrical noise is an increasingly important topic. New systems and modulation techniques require a lower noise threshold. Therefore, the design of RF and microwave systems using low noise devices is a consideration that the circuit design engineer must take into account. Properly measuring noise for a given device is also vital for proper characterization and modeling of device noise. In the case of an oscillator, a vital part of a wireless receiver, the phase noise that it produces affects the overall noise of the system. Factors such as biasing, selectivity of the input and output networks, and selectivity of the active device (e.g. a transistor) affect the phase noise performance of the oscillator. Thus, properly selecting a device that produces low noise is vital to low noise design. In an oscillator, 1/f noise that is present in transistors at low frequencies is upconverted and added to the phase noise around the carrier signal. Hence, proper characterization of 1/f noise and its effects on phase noise is an important topic of research. This thesis focuses on the design of a microwave transistor 1/f noise (flicker noise) measurement system. Ultra-low noise operational amplifier circuits are constructed and used as part of a system designed to measure 1/f noise over a broad frequency range. The system directly measures the 1/f noise current sources generated by transistors with the use of a transimpedance (current) amplifier. Voltage amplifiers are used to provide the additional gain. The system was designed to provide a wide frequency response in order to determine corner frequencies for various devices. Problems such as biasing filter networks, and load resistances are examined as they have an effect on the measured data; and, solutions to these problems are provided. Proper representation of measured 1/f noise data is also presented. Measured and modeled data are compared in order to validate the accuracy of the measurements. As a result, 1/f noise modeling parameters extracted from the measured 1/f noise data are used to provide improved prediction of oscillator phase noise.
Adviser: Dunleavy, Lawrence P.
x Electrical Engineering
t USF Electronic Theses and Dissertations.
Improved 1/f Noise Measurements for Microwave Transistors by Clemente Toro, Jr. A thesis submitted in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering Department of Electrical Engineering College of Engineering University of South Florida Major Professor: Lawrence P. Dunleavy, Ph.D. Thomas Weller, Ph.D. Horace Gordon, Jr., M.S.E., P.E. Date of Approval: June 25, 2004 Keywords: low, frequency, flicker, model, correlation Copyright 2004, Clemente Toro, Jr.
DEDICATION This thesis is dedicated to my father, Clemente, and my mother, Miriam. Thank you for helping me and supporting me throughout my college career!
ACKNOWLEDGMENT I would like to acknowledge Dr. Lawrence P. Dunleavy for proving the opportunity to perform 1/f noise research under his supervision. For providing software solutions for the purposes of data gathering, I give credit to Alberto Rodriguez. In addition, his experience in the area of noise and measurements was useful to me as he generously brought me up to speed with understanding the fundamentals of noise and proper data representation. I appreciate Bill Graves, Jr. from TRAK Microwave for his useful insight: TRAK provided funding for the research as well as test devices and the motivation for this work. For their help in the area of providing device models, test boards, and professional experience, I also want to acknowledge Modelithics, Inc. For providing test equipment for education purposes related to this work, I thank Agilent Technologies. And for being there for me and helping me in many ways, I thank my family.
i TABLE OF CONTENTS LIST OF TABLES iv LIST OF FIGURES v ABSTRACT ix CHAPTER 1 INTRODUCTION 1 1.1 Foreword 1 1.2 Objective of This Thesis 3 1.3 Summary of Contributions 3 1.4 Thesis Summary 4 CHAPTER 2 LOW FREQUENCY NOISE THEORY 6 2.1 The Random Nature of Noise 6 2.2 Proper Calculation and Representation of Noise 6 2.3 Low Frequency Noise Sources 8 2.4 1/f Noise (Flicker Noise) 9 2.4.1 1/f Noise in Bipolar Transistors 10 2.4.2 1/f Noise in FETs 11 2.4.3 1/f Noise in Resistors 12 2.5 Shot Noise 12 2.5.1 Shot Noise in Bipolar Transistors 13 2.5.2 Shot Noise in FETs 13 2.6 Thermal Noise 14 2.6.1 Thermal Noise in Bipolar Transistors 15 2.6.2 Thermal Noise in FETs 15 2.7 Burst Noise 16 2.8 Chapter Summary 17 CHAPTER 3 1/f NOISE MEASUREMENT SYSTEM 19 3.1 Introduction 19 3.2 Overview of Measurement System 20 3.3 System Characterization 21 3.3.1 DC Supply Filters 21 3.3.2 Transimpedance (Current) Amplifier 27 3.3.3 Voltage Amplifier 30 3.3.4 DC Blocks 32 3.4 Software Control and Measurement Analyzers 33
ii 3.5 Performing a 1/f Noise Measurement 36 3.6 Advantage Over Commercially Available System 38 3.7 Advantage Over Direct Voltage Measurements 41 3.8 Chapter Summary and Conclusions 44 CHAPTER 4 1/f NOISE MEASUREMENTS 45 4.1 Introduction 45 4.2 SiGe HBT 46 4.3 BJT 47 4.4 GaAs MESFET 48 4.5 pHEMT 49 4.6 HJFET 50 4.7 Chapter Summary and Conclusions 51 CHAPTER 5 EXTRACTION OF 1/f NOISE MODELING PARAMETERS 54 5.1 Introduction 54 5.2 Modeling Parameters 54 5.3 Parameter Extraction for Bipolar Devices 55 5.4 Parameter Extraction for FET Devices 60 5.5 Chapter Summary and Conclusions 64 CHAPTER 6 CORRELATION OF 1/F NOISE TO PHASE NOISE 65 6.1 Introduction 65 6.2 Measurement of Oscillator Phase Noise 65 6.3 Simulation of Oscillator Phase Noise 69 6.4 Correlation of 1/f Noise to Phase Noise 73 6.5 Chapter Summary and Conclusions 77 CHAPTER 7 CONCLUSIONS AND RECOMMENDATIONS 78 7.1 Conclusions 78 7.2 Recommendations 81 REFERENCES 82 APPENDICES 86 Appendix A: MathCAD Noise Modeling 87 A.1 MathCAD Noise Modeling for Bipolar Transistors 87 A.2 MathCAD Noise Modeling for FETs 89 Appendix B: Maxim-IC MAX4106 Operational Amplifier Circuit Simulations 92 B.1 Maxim-IC MAX4106 Op-Amp as a Transimpedance Amplifier 92 B.2 Maxim-IC MAX4106 Op-Amp as a Voltage Amplifier 95 Appendix C: Oscillator Design Using The SiGe LPT16ED HBT 97 C.1 Introduction 97 C.2 Transistor Measurements and Simulations 97
iii C.3 Determination of Oscillator Networks 101 C.4 Oscillator Design Results and Measurements 107
iv LIST OF TABLES Table 4.1 Corner Frequencies Extracted from Figure 4.6 Measured Data 53 Table 5.1 Bias Conditions for SiGe LPT16ED HBT 57 Table 5.2 Modeling Parameters Summarized for SiGe LPT16ED HBT 58 Table 5.3 Bias Conditions for pHEMT 61 Table 5.4 Modeling Parameters Summarized for pHEMT 62 Table C.1 Measured 2.5 GHz S-parameters for Common-Emitter Transistor 98 Table C.2 Translated S-Paramters for Common-Base Transistor 99 Table C.3 Models Used in the Final Oscillator Circuit 106
v LIST OF FIGURES Figure 1.1 Typical 1/f Noise Spectrum and Corner Frequency 2 Figure 2.1 Example of Root-mean-square for Random Voltages at One Frequency 7 Figure 2.2 Basic Small-signal Bipolar Model Including Noise Sources 10 Figure 2.3 Basic Small-signal Model for FET Including Noise Sources 11 Figure 3.1 Complete Measurement System 20 Figure 3.2 Comparison of DC Supply Noise 22 Figure 3.3 Filtered Supply Compared with Battery (Measured using HP3561) 23 Figure 3.4 General Filter Structure and its Application 23 Figure 3.5 Bipolar Base Supply Filter and Approximate Base Termination Impedance 24 Figure 3.6 Bipolar Base Filter Calculated and Measured Frequency Response 25 Figure 3.7 Calculated FET Gate Filter Frequency Response 26 Figure 3.8 Collector/Drain Filter Calculated and Measured Frequency Response 27 Figure 3.9 Transimpedance (Current) Amplifier Schematic 28 Figure 3.10 Measured and Simulated Transimpedance Over Frequency 30 Figure 3.11 Voltage Amplifier Schematic 31 Figure 3.12 Measured and Simulated Voltage Gain of Voltage Amplifiers 32 Figure 3.13 Measured and Simulated DC Block Frequency Response 33
vi Figure 3.14 DSA Labview Program (Developed By Alberto Rodriguez, USF) 34 Figure 3.15 HP 3585 Labview Program (Developed By Alberto Rodriguez, USF) 35 Figure 3.16 Amplified Noise Voltage for SiGe HBT Measured Using Analyzers 36 Figure 3.17 Combined Voltage Gain of Voltage Amplifiers 37 Figure 3.18 Amplified Noise Voltage at V1 for SiGe HBT Measured Using Analyzers 37 Figure 3.19 Calculated Input Noise Current (Noise Current Generated by SiGe HBT) 38 Figure 3.20 Comparison of Measurements Using Developed and Commercial Method 39 Figure 3.21 SR570 Gain (-3dB @ 1MHz for Highest Bandwidth) 40 Figure 3.22 Noise Floor of Developed System 40 Figure 3.23 Direct Noise Voltage Measurement (no amplifiers used) 41 Figure 3.24 Direct Noise Voltage Measurement and Node Impedances 42 Figure 3.25 Noise Current Measurement Compared to Noise Voltage Measurement 43 Figure 4.1 1/f Noise Measured for SiGe HBT with Variable Collector DC Current 47 Figure 4.2 1/f Noise Measured for BJT with Variable Collector DC Current 48 Figure 4.3 1/f Noise Measured for MESFET with Variable Drain DC Current 49 Figure 4.4 1/f Noise Measured for a p-HEMT with Variable Drain DC Current 50 Figure 4.5 1/f Noise Measured for a HJFET with Variable Drain DC Current 51 Figure 4.6 Various Devices Measured Using the Same DC Output Bias Current (10 mA) 52 Figure 5.1 Typical 1/f Noise and Shot Noise Curve Referred to the Base Noise Sources 56
vii Figure 5.2 Plotted Noise Spectral Density of Base Noise Current Sources 58 Figure 5.3 Measured and Modeled Noise Current Sources 59 Figure 5.4 Typical Curve for 1/f Noise and Thermal Noise Measured at the Drain 61 Figure 5.5 Plotted Noise Spectral Density of Drain and Gate Noise Sources 62 Figure 5.6 Measured and Modeled Noise Current Sources 63 Figure 6.1 Injection Locked Phase Noise Measurement System 66 Figure 6.2 Measured Phase Noise for 1.4 GHz SiGe LPT16ED HBT Oscillator 67 Figure 6.3 Measurement and Limit for Valid L(fm) 68 Figure 6.4 Oscillator Screen Capture 69 Figure 6.5 SiGe Semiconductor LPT16ED HBT Transistor Model for ADS 70 Figure 6.6 SiGe Semiconductor LPT16ED HBT Transistor Schematic for ADS 71 Figure 6.7 1.4 GHz Oscillator Model Based on SiGe LPT16ED HBT 71 Figure 6.8 Harmonic Balance Simulation Using ADS 72 Figure 6.9 Simulation of 1.4 GHz Oscillator Phase Noise with 1/f Noise Parameters 73 Figure 6.10 Phase Noise for Devices with Low 1/f Noise and Higher 1/f Noise 74 Figure 6.11 Phase Noise Measured and Simulated 75 Figure 7.1 Complete Measurement, Modeling, and Simulation Flow Graph 80 Figure A.1 Modeled and Measured Bipolar Noise Sources Plotted with MathCAD 87 Figure A.2 MathCAD File used for Modeling Bipolar 1/f and Shot Noise Sources 88 Figure A.3 Modeled and Measured FET Noise Sources Plotted with MathCAD 90 Figure A.4 MathCAD File used for Modeling FET 1/f and Shot Noise Sources 91 Figure B.1 2-Port Network Representation of S21 Op-Amp Circuit Measurement 93
viii Figure B.2 S-parameter Simulation of MAX4106 Transimpedance Amplifier 93 Figure B.3 Measured and Simulated Transimpedance Over Frequency 94 Figure B.4 S-parameter Simulation of MAX4106 Voltage Amplifier Circuit 95 Figure B.5 Measured and Simulated Voltage Gain of Voltage Amplifier 96 Figure C.1 S-parameters Measured for LPT16ED HBT Packaged Part 98 Figure C.2 S-parameter File Simulated for Common-Emitter and Common-Base 99 Figure C.3 Stability Factor of Common-Base Transistor 100 Figure C.4 Input and Output Impedances and Reflection Coefficients 102 Figure C.5 Ideal Oscillator with Input and Output Matching Networks 102 Figure C.6 Actual Simulation of Input Matching Network Including Models 103 Figure C.7 Actual Simulation of Output Matching Network Including Models 104 Figure C.8 Complete Oscillator Network 104 Figure C.9 Sweep of S21 Over Frequency 105 Figure C.10 Final Oscillator Circuit Layout 105 Figure C.11 1.4 GHz Oscillator Simulation Based on SiGe LPT16ED 107 Figure C.12 Harmonic Balance Simulation Using ADS 108 Figure C.13 Oscillator Screen Capture 109
ix IMPROVED 1/f NOISE MEASUREMENT S FOR MICROWAVE TRANSISTORS Clemente Toro, Jr. ABSTRACT Minimizing electrical noise is an increasingly important topic. New systems and modulation techniques require a lower noise threshold. Therefore, the design of RF and microwave systems using low noise devices is a consideration that the circuit design engineer must take into account. Properly measuring noise for a given device is also vital for proper characterization and modeling of device noise. In the case of an oscillator, a vital part of a wireless receiver, the phase noise that it produces affects the overall noise of the system. Factors such as biasing, selectivity of the input and output networks, and selectivity of the active device (e.g. a transistor) affect the phase noise performance of the oscillator. Thus, properly selecting a device that produces low noise is vital to low noise design. In an oscillator, 1/f noise that is present in transistors at low frequencies is upconverted and added to the phase noise around the carrier signal. Hence, proper characterization of 1/f noise and its effects on phase noise is an important topic of research. This thesis focuses on the design of a microwave transistor 1/f noise (flicker noise) measurement system. Ultra-low noise operational amplifier circuits are constructed and used as part of a system designed to measure 1/f noise over a broad frequency range. The system
x directly measures the 1/f noise current sources generated by transistors with the use of a transimpedance (current) amplifier. Voltage amplifiers are used to provide the additional gain. The system was designed to provide a wide frequency response in order to determine corner frequencies for various devices. Problems such as biasing filter networks, and load resistances are examined as they have an effect on the measured data; and, solutions to these problems are provided. Proper representation of measured 1/f noise data is also presented. Measured and modeled data are compared in order to validate the accuracy of the measurements. As a result, 1/f noise modeling parameters extracted from the measured 1/f noise data are used to provide improved prediction of oscillator phase noise.
1 CHAPTER 1 INTRODUCTION 1.1 Foreword This thesis introduces an improved broadband 1/f noise measurement system and examines various transistors for 1/f noise. The measurement system is used to determine the 1/f noise of transistors and their corner frequencies. 1/f noise, also known as flicker noise, is basically the noise that exists from DC until the corner frequency for any arbitrary device such as a resistor or a transistor. It overtakes as the largest noise source at low frequencies. However, at high enough frequencies, it fades into white thermal noise and becomes virtually undetectable. The corner frequency is where 1/f noise and white thermal noise meet, as can be seen in figure 1. This corner frequency depends on the material or device used as well as the bias conditions. For example, a GaAs MESFET, or Silicon MOSFET or JFET generally have higher 1/f noise corner frequencies than Si bipolar (BJT) or SiGe heterojunction bipolar (HBT) transistors.
2 Figure 1.1: Typical 1/f Noise Spectrum and Corner Frequency Interest in 1/f noise has become an increasingly important topic in radio frequency and microwave oscillator design. Oscillator phase noise is affected by the low frequency noise performance for a given transistor. In an oscillator, the flicker noise that is present at baseband is up-converted and contributes to the overall phase noise offset from the carrier. However, interest in 1/f noise expands to other areas such as astronomy, audio, computer logic applications, music, and video illumination thresholds. In addition, 1/f noise is not solely an active device phenomenon. Passive devices such as carbon resistors, quartz resonators, SAW devices, and ceramic capacitors are among devices that show presence of this phenomenon when used as part of low-noise electronic systems . Generally, 1/f noise is present in most physical systems and many electronic components .
3 1.2 Objective of This Thesis It is the focus of this thesis to present the design of a system for measuring 1/f noise and examine various bipolar and FET microwave transistors for 1/f noise and corner frequencies. In order to achieve this, it was essential to design the system with the widest bandwidth possible (an improvement from what is commercially available). Challenges in providing data independent of biasing networks and measurement equipment are an important task: solutions for these issues are presented as part of the measurement system. The thesis also presents the modeling and parameter extraction of 1/f noise for both transistor types. From this data, 1/f noise is correlated to phase noise. Low frequency noise theory and proper representation of noise data and noise sources are offered. 1.3 Summary of Contributions A 1/f noise measurement system that is able to directly measure the 1/f noise current sources of transistors was developed. The system provides significant gain in order to measure transistor noise current sources that may exists below the noise floor of the spectrum and signal analyzers that are used to gather 1/f noise data. The system was designed to provide a wide frequency measurement that is able to determine the corner frequencies of transistors. Bias filter networks were developed to clean DC supply noise that may distort the actual 1/f noise current sources of interest; as a result, these networks simplify the actual measurement procedure by avoiding the use of batteries and potentiometers as biasing supplies (these are usually bulky and prone to picking up external noise from the surrounding environment). The
4 filtered DC supplies also provide better control and monitoring of DC bias currents and voltages used to bias the transistors that are being measured for 1/f noise. A survey of various transistors was performed in order to understand their 1/f noise levels and coner frequencies. Selected bipolar and FET based transistors were used for the modeling and parameter extraction aspect of this work. In closing this thesis, an oscillator was designed from a Silicon-Germanium heterojunction bipolar transistor. The design and a transistor model that was provided by the manufacturer were used to link and correlate to 1/f noise to oscillator phase noise. As a result, a better prediction of phase noise is achieved due to correct 1/f noise parameter extraction that was achieved using the 1/f noise measurement system that was developed as a result of this work. 1.4 Thesis Summary An introduction to 1/f noise and the relevancy of this and other types of low frequency noise is provided in Chapter 1. Dominant low frequency sources of noise are presented through mathematical models in Chapter 2. General theory of 1/f noise and other low frequency noise definitions are also shown in Chapter 2. The 1/f noise measurement system that was developed is explored in chapter 3. A description of each component that was used in the system is provided. Each part of the measurement system was characterized over frequency. Measurement procedures and calculations are discussed. A comparison between a commercially available system and the system developed
5 as a result of this work is performed; and, advantages of the developed system are provided. In addition, a comparison is also made against a direct noise voltage measurement system and the benefits of the developed system are discussed. Chapter 4 examines various microwave transistors for 1/f noise. The measurements are taken at the output of the devices. Each device was biased with the same output DC bias current in order to relatively compare them. Existing information on various transistor types is provided in order to correlate measured noise to expected results. Chapter 5 discusses the modeling aspects of 1/f noise for FET and bipolar transistors. The modeling procedures for both transistor types are shown. Sample measurements and models for each are shown as well. The tasks of referring the measurements to their original sources of noise for each type of transistor are discussed and presented. Measured and modeled 1/f noise, parameter extraction, and corner frequencies are offered. Correlation of 1/f noise and phase noise is made in chapter 6. This includes a discussion of the 1/f noise effect on the noise modulated carrier. An oscillator based on a transistor that was characterized for 1/f noise is used along with a model that was provided by the manufacturer in order to achieve a more accurate prediction of phase noise. Simulated and measured phase noise is presented with the use of extracted 1/f noise parameters. Chapter 7 summarizes and discusses results, and recommendations.
6 CHAPTER 2 LOW FREQUENCY NOISE THEORY 2.1 The Random Nature of Noise The type noise of interest in this work is intrinsic noise; that is, noise that is generated due to random motion of charges in an electronic device such as a transistor. This type of noise is considered a random signal. That is to say, the signal does not have a repeatable period. Since the behavior cannot be predicted using a periodic function, there must be a way to model its behavior mathematically. For random signals, the Gaussian distribution model is used. The Gaussian distribution model is a probability density function that is used to determine the average value of a random variable (random voltage or current measurement). Therefore, a number of measurements are performed for a particular variable and a rootmean-square average is determined using the Gaussian probability function. Most of the signals resulting from the random fluctuations of currents or voltages follow this model . 2.2 Proper Calculation and Representation of Noise In the case of the Dynamic Signal Analyzer (DSA) and Spectrum Analyzer (SA) that are used to measure the noise spectrum in this work, each random voltage value is squared, the
7 squared values are added, the total is divided by the number of measurements, and the square root of the result is taken . The resulting data is an average value in terms of Vrms. The number of measurements is set by the user. Therefore, this type of averaging produces better (cleaner) looking results if the number of measurements points is increased. Since data is normalized to 1 Hz bandwidth, the data can be represented as Hz Vrmsor Hz V2 rms. The square root of Hz on the bottom results from the averaging function performed by the DSA. Figure 2.1: Example of Root-mean-square for Random Voltages at One Frequency
8 Noise sources shown in the models have an alternate notation. Whether it is a noise voltage or a noise current, the alternate representation in each case is shown in along with their logarithmic counterparts (2.1-2.2). Hz dBV Hz v Hz v2 2 rms= =, where dbV=10*log(vrms 2) (2.1) Hz dBA Hz i Hz i2 2 rms= =, where dBA=10*log(irms 2) (2.2) Usually, measured data is expressed in terms of dBV or dBA. 2.3 Low Frequency Noise Sources Dominant sources of noise that are greater than the always-present thermal (white) noise, usually become active when DC current is applied to the device or component of interest. Although low frequency noise is usually referred to as 1/f noise or flicker noise, there are other types of noise at low frequencies which may affect the 1/f noise slope. In the transistor models described in this chapter, shot noise and 1/f noise are generally lumped into one particular source since their contribution is at low frequencies. However, 1/f noise usually dominates at low frequencies.
9 2.4 1/f Noise (Flicker Noise) There are many different theories about 1/f noise (flicker noise or pink noise). While it is still a topic of research and debate (depending on device technology and process), 1/f noise is generally understood to be caused by a variation or instability in the conductivity of the material. Experimental results point to lattice scattering in the crystal as the source . Damage of the crystal structure also has a significant effect on the boost of 1/f noise. Traps due to defects in the semiconductor crystal and contamination in the crystal are also credited as sources of 1/f Noise . Theories developed have lead to the suggestions that 1/f noise is a surface effect and a bulk effect. A paper by van der Ziel provides a unification of the different theories . 1/f noise is linked with direct current. A spectral current density equation is available that applies to most devices [4, 6]: f K if B f Af I f 2 = (2.3) f = bandwidth at frequency f (1 Hz bandwidth is used to define spectral noise) I = direct current Kf = slope of the noise current (constant) Af = exponential relationship of DC current to Noise Current (constant) Bf = 1 for 1/f noise
10 This equation relates the spectral current density for a particular device or material as a function of DC current flow over a frequency range. Since we are measuring 1/f noise, b=1, and the spectral density fundamental slope is 1/f. 2.4.1 1/f Noise in Bipolar Transistors Figure 2.2: Basic Small-signal Bipolar Model Including Noise Sources For a bipolar device, the current I, in equation (2.3) is the base direct current. There is noise is generated near the base-emitter junction. There is also a 1/f noise source associated with the collector-base junction: the reason that it is not usually included is that the 1/f noise source of the collector-base junction virtually has no contribution to the total 1/f noise . Therefore, the total 1/f noise generated near the base-emitter junction is included in 2 bi, in figure 2.2. The model shows that 1/f noise at the base-emitter junction is amplified and is a dominant source of 1/f when measured at the output of the device (usually the collector). This model described in figure 2.2 applies to Homojunction (BJT) and Heterojunction (HBT)
11 transistors. The reason for this is that the HBT retains the same configuration and function of a BJT except for added Germanium at the base to maximize Ft (transition frequency) . 2.4.2 1/f Noise in FETs Figure 2.3: Basic Small-signal Model for FET Including Noise Sources For a FET device, the current I, in equation 2.3 is the drain direct current. In FETs, the noise is induced in the channel under the gate. Since the effect takes place in the channel between the drain and the source, the 1/f noise current generator is included in 2 di. 1/f noise in SiMOSFET devices usually exceeds the noise level of bipolar devices. This may be due to the behavior of surface effects since the current path is near the s ilicon surface . In general, FETs generate higher noise at lower frequencies than Bipolar Devices [7, 8]. The FET model in figure 2.3 is applicable to all MOS Devices , HEMT Devices [2, 9], and GaAs FET and JFET devices [8, 10].
12 2.4.3 1/f Noise in Resistors Carbon resistors exhibit 1/f noise due to the physical properties of the carbon composition . Therefore, these types of resistors should be avoided when used as part of a 1/f noise measurement system or in any low-noise circuit that requires them to be used in the path of current conduction. Metal film resistors on the other hand have much lower 1/f noise . These types of resistors are used as part of biasing networks in 1/f noise measurement systems: especially since DC current is driven through them. Wire-wound potentiometers have even lower 1/f noise than metal film resistors . These types of resistive devices can also be used as part of a 1/f noise measurement system. In general, the resistor noise current is modeled using the general equation 2.3. In this case, the current I, is the direct current through the resistor. 2.5 Shot Noise Shot Noise exists in FETs, bipolar transistors, and diodes. Random movements of the carriers across a junction cause the current, I, to fluctuate . This fluctuation also depends on bias conditions . Shot noise sources cause a noise current that is concentrated around low frequencies. Similarly to 1/f noise, it transforms to thermal noise at higher frequencies. The general shot noise equation is the following [4, 6]: f qI 2 i2 = (2.4)
13 q= 1.6 x 10-19 C f = bandwidth at frequency f (1 Hz bandwidth is used to define spectral noise) I= DC current for a MOS, bipolar, or diode. 2.5.1 Shot Noise In Bipolar Transistors Shot noise in bipolar devices is present at the base and the collector. Using the model in figure 2.1, the effects of this type of noise are included in the noise current generators, 2 bi and 2 ci,respectively. In the base-emitter junction, the shot noise that contributes to the noise current source 2 bi is generally due to recombintation of minority carriers generated at the base. In the collector-base junction, shot noise is due to the minority carriers generated at the emitter and base [1, 4]. The shot noise in this junction contributes to the noise source 2 ci. In both cases, the effects of shot noise take place in the depletion region of each junction. 2.5.2 Shot Noise In FETs The shot noise in FETs is attributed to the gate leakage current [4, 6]. This behavior has been recently examined experimentally . With respect to figure 2.3, the shot noise for the FET is contained in the noise current source 2 gi.
14 2.6 Thermal Noise Thermal noise (Johnson Noise or White Noise) is the noise that is present at all frequencies. The frequency response of thermal noise is flat . In a device such as a bipolar transistor the thermal noise is caused by the thermal motion of the carriers at the resistance of each port . Therefore, we can think of it as a thermal exitation of the carriers in a resistor. In contrast to 1/f noise or shot noise, thermal noise is always present and does not require a direct current to be applied. It is the dominant source of noise at frequencies above the corner frequency of a transistor or resistor. Thermal noise can be expressed as a spectral noise current density and noise voltage density by the use of the following equations, respectively [4, 6]: f R kT 4 i2 = (2.5) f kT R 4 v2 = (2.6) k= BoltzmanÂ’s Constant (1.38 x 10-23 J/K) T= 300K (Room Temperature) R= resistance value f= bandwidth at frequency f (1 Hz bandwidth is used to define spectral noise) 2V= noise voltage density (Used in the bipolar model)
15 2.6.1 Thermal Noise In Bipolar Transistors Since thermal noise is present wherever there are physical resistances, the model in figure 2.2 incorporates the thermal noise as a noise voltage, 2 bV, due to the base resistor. In this case the noise voltage is used across the resistor for simplicity of the model. In the bipolar model, the collector impedance, rc, is a physical resistance and it is also a source of thermal noise; however, it usually neglected since its contribution is minimal . 2.6.2 Thermal Noise In FETs Thermal noise exists due to the physical resistance of the channel between the drain and the gate . Since the channel is induced only when a voltage is applied at the gate, the physical resistance is present when the channel is on and conducting current. This is included into the noise current source 2 di An equation relating the thermal noise current generated by the device due to the channel resistance is available . f kTK 4 id 2 = (2.7) k= BoltzmanÂ’s Constant (1.38 x 10-23 J/K) T= 300K (Room Temperature) Kd= approximately .67 (Kd=[1/(Rgm)] (R=channel resistance, gm=transconductance) f= bandwidth at frequency f (1 Hz bandwidth is used to define spectral noise)
16 Although the thermal noise of the FET is shown in equation 2.7 as part of a drain current noise source, gate thermal noise may also be present. From the small signal model (figure 2.3), it is seen that a thermal noise that is present at the gate due to a physical resistance is amplified and is present at the drain of the device as a noise current. The thermal noise that is amplified is calculated using equation 2.8 (R is the physical resistance). f kTRg 4 im 2 = (2.8) Therefore, the thermal noise floor of a FET is limited by the channel resistance as a result of current conduction in the channel. However, if a physical resistor is present at the gate for purposes such as biasing, it produces thermal noise that is amplified by the device and represented in the drain current noise source ( 2 di ) shown in figure 2.3. 2.7 Burst Noise Burst Noise, alternatively known as RTS (Random Telegraph Signals) Noise or Popcorn noise, also has a low frequency response. Experimentally, it has been known to cause humps in the 1/f noise curve . This is mostly a noise seen in MOSFETs. However, experimental work on selected Silicon Bipolar and Silicon-Germanium HBTÂ’s has shown RTS noise responses for selected fabrication processes . Burst noise has also been associated with devices that are Gold-Doped . The noise models available for both FETs and bipolar transistors do not explicitly include burst noise. However, if the presence of this type of noise
17 arises from experimental measurements, the 1/f and burst noise current sources can be combined into one source in order to provide a complete noise response where 1/f noise is normally present. The spectral current density equation for burst noise is shown below : f f f 1 I K i2 c A f 2f ! # $ $ % & + = (2.9) Kf = slope of noise current (constant) Af = esponential relationship of DC current to noise current (constant) fc = cutoff frequency where behavior of noise drops by a factor of 1/f2 f = bandwidth at frequency f (1 Hz bandwidth is used to define spectral noise) At frequencies beyond fc, the frequency response of this type of noise takes on a Brownian Type of 1/f2 behavior . 2.8 Chapter Summary Although thermal noise is present throughout the frequency spectrum, 1/f noise is dominant at frequencies below the corner frequency. At frequencies above the noise corner, thermal noise usually dominates. Shot noise and burst noise can be significant as well and at times effect changes in the 1/f slope. This is especially true when dealing with devices such as MOSFETs. Shot noise is usually a noise that is associated with the junctions of a transistor or a diode and
18 also has a similar response to 1/f noise.
19 CHAPTER 3 1/f NOISE MEASUREMENT SYSTEM 3.1 Introduction Low frequency noise measurements can be challenging. The measurements require complete isolation of external factors such as DC and AC supply noise (including 60 Hz noise). Outside interference such as cell phone signals disturb the measurements significantly. Traditionally, batteries are used along with noiseless potentiometers in order to bias a device. However, measurement setups that use batteries do not provide the ease and control of a system that uses a commercial power supply. Additional problems such as noise floor limitations of the equipment can result in faulty measurement data that may be interpreted as a noise corner frequency. Also, incorrect bias networks can short the noise current source of interest, and again lead to misinterpretation of data. These are some of the main challenges in measuring low frequency noise. The system developed in this work tackles these issues and provides solutions to these problems. In addition, some significant improvements are achieved over commercially available sytems and direct noise voltage measurements while providing cleaner noise data.
20 3.2 Overview of Measurement System The system uses bias filters to supply the device-under-test (DUT) with clean DC bias as in figure 3.1. A transimpedance amplifier (alternatively known as a current amplifier) is used to generate a noise voltage from an input short-circuit noise current. This voltage is amplified using two stages of voltage amplifiers. For lower frequency measurements, the output is measured using a HP 3561 Dynamic Signal Analyzer; for the higher frequency measurements (up to 10 MHz), the output is measured using a HP3585A Spectrum Analyzer. Custom Labview programs are used to gather the data with a computer. Figure 3.1: Complete Measurement System The DUT sits on a probe station or within a coaxial test fixture. In order to set the correct bias, the DC voltages are monitored at the DUT using multimeters. Low frequency DC blocks are used to AC-couple the output signal for measurement.
21 3.3 System Characterization The low frequency response of each network was measured using an Agilent 4395 Network/Signal/Impedance Analyzer and the 87512A 50 Ohm Transmission/Reflect Test Set. Each network was measured from 10 Hz to 100 MHz. In each case, the data was measured over small bands and combined to produce the total response. The HP 3561A Dynamic Signal Analyzer was used to measure supply noise up to 100 kHz. 3.3.1 DC Supply Filters When biasing a transistor using an AC-powered DC supply, it is important to avoid supply noise from distorting the actual 1/f noise that we are interested in measuring. Commercially available supplies, especially digitally controlled supplies, usually have a very noisy output near baseband. The noise that may be introduced to the transistor can be from spurious signals such as 60 Hz and its harmonics. The supply noise floor may also be well above or near the 1/f noise floor. Figure 3.2 compares the frequency response from 1 Hz to 100 KHz for various DC supplies. This is important since 1/f noise is practically defined from 1Hz until the corner frequency of a device and is usually modeled between 10 Hz and 100 Hz.
22 Figure 3.2: Comparison of DC Supply Noise The supply filters provide significant suppression by suppressing supply noise to ground. This is evident in figure 3.3 where the measurement shows that a properly filtered supply and a battery are comparable. This is valuable information as it simplifies the measurement by allowing for the noise cleanliness of a battery with the control and ease of a commercially available supply.
23 Figure 3.3: Filtered Supply Compared with Battery (Measured using HP3561) There are three variations of the supply filter. There is a filter that is used to bias the base of a bipolar device. There is a different filter that is used to bias the gate of a FET. And, there is a filter that is used to bias the collector or the drain of a bipolar or a FET, respectively. The load impedance of the filter, RL, varies depending on the device being measured. Figure 3.4: General Filter Structure and its Application
24 For the bipolar device, a large R2 is required in order to keep the 1/f and shot noise sources that are generated near the base of the device from being shorted to ground . Figure 3.5: Bipolar Base Supply Filter and Approximate Base Termination Impedance In order to understand the suppression of noise from the input to the output of the filter, the transfer function is determined. The voltage transfer function, T(f), is determined using a 50 Ohm load impedance in order to correlate the calculation to the measurement. A value of 100 kOhm is used for R2; and, 100 Ohm is used for R1. () () () () () ! # $ $ % & + ! ! # $ $ $ $ $ % & ( ) + + + + ( ) + + + + = =L 2 L 1 c L 2 c L 2 c L 2 c L 2 in outR R R R Z R R Z R R Z R R Z R R f V f V f T (3.1)
25 Figure 3.6: Bipolar Base Filter Calculated and Measured Frequency Response The measured frequency response shows, for the most part, the noise floor of the Agilent 4395 Vector Network Analyzer. Therefore, the filter shows good performance at the frequency range of the measuremement system. However, it should be noted that the filter is measured using 50 Ohm input and output terminations; therefore, the frequency response is not the actual response when the filter is used in the 1/f noise measurement system. The reason is that the transistors have input and output impedances that are usually larger than 50 Ohms. Therefore, in the actual application the filters are not terminated using 50 Ohms. The measurement is taken in a 50 Ohm system in order to verify the rejection of supply noise; and, the calculation is performed using a 50 Ohm termination for correlation. For A FET, R2, shown in figure 3.4, is traded out with a 50 Ohm resistor. This is due to the fact that we need the source gate bias to be a voltage supply. In addition, we are not
26 interested in the gate noise current source being shorted since the 1/f noise generated in the FET occurs near the drain . The frequency response of the FET gate filter is described on Figure 3.7. In some cases, it may be necessary to add a parallel resistor to ground at the output of this filter if it is used to bias a transistor that requires larger DC bias currents since DC current from the supply needs a path to ground. Figure 3.7: Calculated FET Gate Filter Frequency Response For the bipolar collector and the FET drain, the same filter is used. In this case, R2 is replaced with 500 Ohms in figure 3.4. This impedance only needs to be large enough to avoid 1/f noise from taking the wrong path to ground. That is, a small impedance value for R2 would shunt a small amount of 1/f noise back towards the supply instead of allowing it to take the path of the short-circuit input provided by the current amplifier. The calculated and measured frequency response of the filter is described in figure 3.8.
27 Figure 3.8: Collector/Drain Filter Calculated and Measured Frequency Response 3.3.2 Transimpedance (Current) Amplifier The transimpedance amplifier is used to convert the noise current source from the device to a noise voltage that is measured at the output of the amplifier. The amplifier essentially provides an AC short-circuit that allows the noise to follow the path to the virtual ground. However, since the impedance at the differential input of the operational amplifier that is used is very large, the current takes the path of the feedback resistor. Therefore, an output voltage is generated due to the noise current flow through the resistor. The noise voltage produced at the output of the amplifier is related to the input by the use of equation (3.2). r V iout in=, where r = 100 Ohm (3.2)
28 Figure 3.9: Transimpedance (Current) Amplifier Schematic If the data at the output of the transimpedance amplifier is presented in the form of dBV/Hz, the process described by the following set of equations is used to correlate the output voltage in dBV to the input Current in dBA. outV is short for Hz Vout(All noise voltage and current measurements and calculations in this work are performed using 1 Hz Bandwidth). # $ % & = # $ % & ÂŠ2 outV 10 Hz dBV Xlog (3.3) -X is the measured rms noise voltage in dBV/Hz at the output of the amplifier. 10 X out10 VÂŠ= (3.4) r V iout in= (3.5)
29 ! # $ $ $ % & ! # $ $ % & = # $ % & = # $ % & ÂŠ2 out 2 inr V 10 i 10 Hz dBA X log log (3.6) -X is the calculated rms noise current in terms of dBA/Hz at the input of the amplifier. However, this set of equations only works if the amplifier has a linear response with respect to frequency. That is, if the transimpedance of the amplifier is flat across the frequency band of interest, then the correlation of output noise voltage to input noise current is correct. If the response is not flat across the frequency band of interest, it is required to determine the variation of transimpedance in order to correctly calculate the input noise current. In order to determine whether the amplifierÂ’s transimpedance is flat from DC to 10 MHz, the transimpedance was measured. Figure 3.10 shows a flat frequency response for the total measurement system bandwidth (DC to 10 MHz). Therefore, from the plotted data, a measured and simulated average value of 100 V/A is achieved. This value is the correlation between the output noise voltage and the input noise current. To realize the transimpedance amplifier, a MAXIM 4106 Ultra Low-Noise Op-Amp was used . This is among the lowest in noise performance available in the market. The circuit also uses leaded metal-film resistors since they do not generate 1/f noise. A broadband measurement was performed over small bands and the complete transimpedance of amplifier was plotted with frequency in figure 3.10.
30 Figure 3.10: Measured and Simulated Transimpedance Over Frequency 3.3.3 Voltage Amplifier Since the output noise voltages produced by the transimpedance amplifier are very low and most likely below the noise floor of the spectrum/signal analyzers, it is essential that noise voltages are amplified above the noise floor. This is achieved by the use of voltage amplifiers. This amplifier is also realized using the MAXIM 4106 Ultra Low-Noise Op-Amp. Leaded Metal-film resistors are also used in this circuit.
31 Figure 3.11: Voltage Amplifier Schematic For the ideal amplifier, a large resistance is used at the input: for this amplifier, 10 kOhms was used. The voltage gain of the amplifier is the ratio of the feedback resistance over the input resistance (-R2/R1). The amplifier was designed to provide flat gain from DC until 10 MHz. In order to achieve this, the feedback resistance was minimized. It was found experimentally that values R2=50 kOhm and R1=10 kOhm provided a gain of 14 dB for the complete bandwidth of the system(DC to 10 MHz) and a 3 dB bandwith of 17 MHz (Figure 3.12). () # $ % & ÂŠ # $ % & = ! # $ $ % & = Hz dBV V Hz dBV V V V 20 dB Gin out in outlog (3.9) G(dB) is the voltage gain of the voltage amplifier in terms of dB. Therefore, if an output noise voltage in terms of dBV is presented, the input noise voltage is calculated using the voltage gain of the amplifier G(dB).
32 Figure 3.12: Measured and Simulated Voltage Gain of Voltage Amplifiers ()()()dB G dBV V dBV Vout inÂŠ = (3.10) 3.3.4 DC Blocks In order AC-couple the noise of interest, DC blocks were developed to operate at the low and high frequencies. This was done by using a Hitano 2200 uF electrolytic radial capacitor in parallel with a .15uF Presidio chip capacitor. This combination provided a lossless DC block that operates from 1Hz to 10 MHz and beyond. Figure 3.13 shows 2 dB of loss at 1 Hz and a lossless DC block between 10 Hz and 10 MHz.
33 Figure 3.13: Measured and Simulated DC Block Frequency Response 3.4 Software Control and Measurement Analyzers The analyzers used for the purposes of measuring noise are the HP3561A Dynamic Signal Analyzer (DSA) and the HP3585 Spectrum Analyzer. The DSA is used to measure from 1 Hz until 100 kHz. The HP 3585 Spectrum Analyzer is used to measure from 300 Hz to 10 MHz. These analyzers are used in combination to determine the wide-band low frequency response of noise for a given device. Both analyzers are computer controlled using custom Labview programs written by USF graduate student Alberto Rodriguez.
34 Figure 3.14: DSA Labview Program (Developed By Alberto Rodriguez, USF) The DSA Labview program gathers data from the analyzer in terms of Vrms ( V ). This data is normalized to 1 Hz bandwith. That is, each data point is divided by the bandwidth of the measurement range. In order to avoid measurements from crowding at the end of the plot when converting the data to log format, the measurement is split into 4 ranges (the ranges are shown in figure 3.14). The reason this happens is that the analyzer has a linear frequency step size. Therefore, each band is measured; then, each point is normalized to 1 Hz bandwidth and converted to dBV/Hz.
35 Figure 3.15: HP 3585 Labview Program (Developed By Alberto Rodriguez, USF) The HP3585 Labview program also gathers data from the analyzer in terms of Vrms ( V ). The data is taken over small ranges and normalized to 1 Hz bandwidth. The program provides the data in terms of dBV/Hz.
36 3.5 Performing a 1/f Noise Measurement Implementing the use of the 1/f noise measurement system, a sample measurement is performed in the following order. A 1/f noise voltage measurement was performed using the the HP 3561A and the HP 3585A for a SiGe LPT16ED HBT (Figure 3.16). Figure 3.16: Amplified Noise Voltage for SiGe HBT Measured Using Analyzers In order to trace back the measurement through both voltage amplifiers, equation 3.10 is used. Since each amplifier has 14 dB of voltage gain, the input voltage to both stages is calculated by substracting 28 dB from the dBV measured data. The combined simulated and measured voltage gain of the amplifiers in cascade is shown in figure 3.17.
37 Figure 3.17: Combined Voltage Gain of Voltage Amplifiers Figure 3.18: Amplified Noise Voltage at V1 for SiGe HBT Measured Using Analyzers
38 The voltage calculated at the input of the first voltage amplifier is the voltage that is produced by the current amplifier due to the noise current generated by the device. The correlation of the output noise voltage to input noise current is performed by using equations 3.4 to 3.8, where r is 100 (V/A). The noise current shown in figure 3.19 is the noise current that is generated by the device. Figure 3.19: Calculated Input Noise Current (Noise Current Generated by SiGe HBT) 3.6 Advantage Over Commercially Available System The system developed as a result of this work provides noise data from 1 Hz to 10 MHz. The commercially available method uses a Low Noise Stanford Research Current Amplifier. This
39 amplifier has a 3dB bandwidth of 1 MHz. Whereas the amplifier developed here has a 3 dB bandwith of 17 MHz. Therefore, this allows for proper determination of noise corner frequency over a wide bandwidth. The plotted data in figure 3.20 shows the extended measurement to 10 MHz using the developed method. The method using the commercially available amplifier results in faulty data after 1 MHz. This drop in gain is verified by figure 3.21. Figure 3.20: Comparison of Measurements Using Developed and Commercial Method
40 Figure 3.21: SR570 Gain (-3dB at 1MHz for the Highest Bandwidth)  Figure 3.22: Noise Floor of Developed System
41 3.7 Advantage Over Direct Voltage Measurements Noise voltage across a load impedance at the output of a transistor can be measured directly using spectrum analyzers. However, measuring noise voltage in order to calculate noise current sources may not be as accurate as a direct noise current measurement since all impedances that are present at the measurement node must be accounted for: this includes the low frequency output impedance of the device which may not always be easily calculated. Such a measurement setup is shown in figure 3.23. Figure 3.23: Direct Noise Voltage Measurement (no amplifiers used) Since the noise voltage measurement is taken at the collector/drain node, the impedance of the collector/drain supply filter acts as a load that is in parallel with the output impedance of the supply and with the 1 MOhm impedance of the Dynamic Signal Analyzer or the Spectrum Analyzer. Figure 3.24 shows the measurement node in more detail.
42 Figure 3.24: Direct Noise Voltage Measurement and Node Impedances As can be seen in figure 3.24, a noise current source generated by the transistor produces a noise voltage across the impedances that are present at the measurement node (including the output impedance of the transistor). If a direct noise voltage measurement is performed, the noise current generated by the device should be caculated by the use of equation 3.10. ! # $ $ $ % & ! # $ $ % & = # $ % & ÂŠ2 out L outMOhm 1 R R V 10 Hz dBA X log (3.10) -X=the calculated noise current RL=the bias network output load impedance Rout=low frequency output impedance of the transistor Vout=measured noise voltage at the measurement node
43 Figure 3.25: Noise Current Measurement Compared to Noise Voltage Measurement Figure 3.25 compares a noise current measurement taken with the measurement system developed as a result from this work to the calculated noise current from the direct noise voltage measurement. Both measurements were performed using the same transistor DC bias current (collector current is 10 mA). The red dotted line is the predicted shot noise that results from the DC current. It is clearly seen from figure 3.25 that the shot noise matches well with the measurement that was taken using the noise current measurement system. From this figure, it is seen that for higher frequencies up to 10 MHz, the noise floor of the analyzer distorts the actual shot noise produced by the transistor when the noise voltage is measured directly with no amplifiers used. In addition, the overall 1/f noise curve using the direct noise voltage measurement is lower due to unaccounted impedances such as the output impedance
44 of the transistor which is unknown in this case. In contrast, the noise current measurement system does not require one to know the output impedance of the device in order to perform a noise current measurement. Therefore, this is also an advantage over the direct noise voltage measurement. 3.8 Chapter Summary and Conclusions A system for measuring 1/f noise for microwave transistors was developed. This system incorporates the use of bias filters in the DC supply lines to provide clean bias to the transistor. Careful consideration of load impedances that are used in these biasing networks was taken in order to avoid 1/f noise from being shunted back to the DC supplies. The use of these biasing networks allowed for a better controlled bias arrangement that would otherwise be bulky using batteries and potentiometers. It also allowed for better monitoring of supply voltages and currents. The Maxim 4106 Ultra Low-Noise Op-Amps implemented as current and voltage amplifiers allowed for the noise current generated by the device to be measured directly and to be amplified as noise voltage above the noise floor of the system. The configuration of the amplifiers allowed for the bandwidth of the measurement to be extended above what the commercial system currently provides. In addition, the system developed here also simplifies measurement error that may result from a direct noise voltage measurement that requires the user to know all of the impedances that are present at the measurement node where the noise voltage is measured. It also avoids noise floor distortion seen in voltage measurements.
45 CHAPTER 4 1/f NOISE MEASUREMENTS 4.1 Introduction 1/f noise was measured for various devices. These devices include a Silicon-Germanium Heterojunction Bipolar Transistor (SiGe HBT), a Bipolar Junction Transistor (BJT), a Gallium-Arsenide Metal-Semiconductor Field-Effect Transistor (GaAs MESFET), a Ga lliumArsenide Heterojunction Field-Effect Transistor (GaAs HJFET), and a Pseudomorphic High Electron Mobility Transistor (pHEMT). The measurements provide an overall understanding on 1/f noise levels produced by various devices. The noise is measured using the 1/f noise measurement system that was developed as a result of this work (see chapter 3). The measurements were taken at the output of the devices: for bipolar devices, the output was measured at the collector; and, for FET devices, the output noise was measured at the drain. All data is represented in terms of dBA/Hz. This is the form that is used for expressing the 1/f noise of the devices since the origin of this type of noise is usually represented as a noise current source.
46 4.2 SiGe HBT The SiGe HBT selected for 1/f noise evaluation is the LPT16ED from SiGe Semiconductor. The manufacturer specifies the device as a low phase noise and 1/f noise transistor for use in oscillator applications up to 16 GHz . Low 1/f noise is one of the good traits of bipolar devices such as the SiGe HBT. Figure 4.1 shows 1/f noise for a variation of collector DC current. The measured 1/f noise for the SiGe HBT shows a corner frequency of 100 kHz. The increase of DC current leads to increased 1/f noise. Since the 1/f noise current is generated at the near the base emitter region and is dependent upon DC base current, higher DC base current injected into the device causes higher levels of 1/f noise . For the purposes of RF circuit design, bias conditions are expressed as collector DC current and DC voltage.
47 Figure 4.1: 1/f Noise Measured for SiGe HBT with Variable Collector DC Current 4.3 BJT The NEC NE685 BJT was measured for 1/f noise. This device is used for osc illator applications. Similar to the SiGe HBT, it is a bipolar device and typically produces lower 1/f noise than a FET device. Figure 4.2 shows 1/f noise measured for a variation of collector DC current. The BJT shows a corner frequency of 10 kHz. Similar to the SiGe HBT, the injected base DC current generates 1/f noise due to possible imperfections in the material. It has been proven experimentally that SiGe and Si transistors can produce 1/f noise that is similar for the same value of base current when they are developed using the same technology . This plot shows that for the BJT a smaller amount of base DC current is required to
48 operate the device; whereas, the SiGe requires a higher level of base DC current. Therefore, the level of 1/f noise shown here for the BJT is lower than the SiGe. This deviceÂ’s corner frequency is lower by a decade when compared to the SiGe HBT. Figure 4.2: 1/f Noise Measured for BJT with Variable Collector DC Current 4.4 GaAs MESFET The MwT GaAs MESFET was measured for 1/f noise. FETs usually exhibit higher noise at lower frequencies than bipolar devices . This leads to higher noise corner frequencies. High noise corner frequencies, such as 6 MHz, have been measured on GaAs based FETs . Figure 4.3 shows 1/f noise measured for a variation of drain DC current. The
49 measurement shows a corner frequency of 1 MHz. This is a decade higher than the SiGe HBT and two decades higher than the BJT. Figure 4.3: 1/f Noise Measured for MESFET with Variable Drain DC Current 4.5 pHEMT A pHEMT was measured for 1/f noise. Since it is a FET device, it exhibits higher levels of 1/f noise than a bipolar device (see Chapter 2) . Figure 4.4 shows 1/f noise measured for a variation of drain DC current (increase of DC current shows increase in noise). The measurement shows a corner frequency that is approximately 3 MHz. This is an increase of 2 MHz compared to the MESFET; and, much higher corner frequency than bipolar devices.
50 Figure 4.4: 1/f Noise Measured for a pHEMT with Variable Drain DC Current 4.6 HJFET A NEC HJFET was measured for 1/f noise. Like the MESFET and the pHEMT, it is a FET device and produces higher 1/f noise than the bipolar devices . Figure 4.5 shows 1/f noise measured for a variation of drain DC current. The measurement shows a corner frequency about 3 MHz. This is similar to the pHEMT measurement.
51 Figure 4.5: 1/f Noise Measured for a HJFET with Variable Drain DC Current 4.7 Chapter Summary and Conclusions From the measured data, it was noticed that FETs produce significantly higher 1/f noise than bipolar devices. It was also noticed that higher levels of DC bias current produced higher 1/f noise levels for all devices. In order to undertand how 1/f noise may vary from device to device, all devices were plotted in figure 4.6 with the same DC bias output current.
52 Figure 4.6: Various Devices Measured Using the Same DC Output Bias Current (10 mA) The measured data is consistent with general knowledge that bipolar devices have lower 1/f noise corner frequencies than FET devices. However, at higher frequencies FET devices often have lower noise than bipolar devices. That is, the thermal noise produced for FET devices after the corner frequency is below that of bipolar devices. It is generally understood that bipolar devices have better noise performance at low frequencies than FET devices; while, the inverse is true at higher frequencies . Therefore, the types of noise curves displayed in figure 4.6 are expected from theory and previous work [8, 23]. The corner frequencies were extracted from data shown in figure 4.6: these are presented in table 4.1.
53 Table 4.1: Corner Frequencies Extracted from Figure 4.6 Measured Data Device BJT SiGe HBT GaAs MESFET p-HEMT HJFET Corner Frequency 10 kHz 1.5 MHz 2.0 MHz 90 KHz 600 kHz
54 CHAPTER 5 EXTRACTION OF 1/f NOISE MODELING PARAMETERS 5.1 Introduction 1/f noise modeling allows for the improvement of phase noise prediction in RF oscillator design. In order to model 1/f noise and extract the modeling parameters, 1/f noise was first measured at the output of the devices. The output measurements were then referred to their orginal source of noise. This noise source may be either at the input or the output for a given device. Once the data was referred to its source, the modeling parameters were extracted. The technique used in this chapter is described in the IC-CAP 2002 Non-linear Devices Manual . For simplicity, MathCAD was used to extract the modeling parameters. 5.2 Modeling Parameters The modeling parameters of interest are known as Kf, Af, and Bf (from equation 5.1) . f K if B f Af I f 2 = (5.1)
55 Af is the exponential parameter than correlates DC current to a particular noise current level. Kf is constant for the device being measured; and, it depends on the manufacturing process and device. Bf is defined as 1 since we are measuring [1/(f 1)] noise. All values are found experimentally from measured data. In all cases, the models and measurements were a close fit: this allowed for correct extraction of the parameters. 5.3 Parameter Extraction for Bipolar Devices In chapter 4, 1/f noise was measured for bipolar devices. These measurements were taken at the output of the device (the collector). However, in order to properly model 1/f noise, it is necessary to refer the measurements to their sources. In bipolar devices, the 1/f noise and shot noise sources are generated near the base region. The input noise current sources were determined using the following equation : 2 2 c 2 bi i = (5.2) !2 is the small-signal gain that is determined from the DC current gain . Therefore, if a measurement is given in terms of dBA/Hz and measured at the collector, the following set of equations is used to refer the measurement from the collector to the base: # $ % & = # $ % & ÂŠ2 c Ci 10 Hz dBA X log (5.3)
56 2 2 c 2 bi i = (5.4) # $ % & = # $ % & ÂŠ2 b bi 10 Hz dBA X log (5.5) Xb is the noise current produced by the base noise current source. Correct calculation of base noise current source from measured data leads to the plot shown in figure 5.1 . Figure 5.1: Typical 1/f Noise and Shot Noise Curve Referred to the Base Noise Sources The SiGe LPT16ED HBT was used to illustrate 1/f Noise modeling and parameter extraction. MathCAD was used to plot the data and extract the modeling parameters for the HBT. The bias conditions for this device are shown in table 5.1. The device was measured at two bias conditions. The DC current was varied while keeping collector voltage fixed. was calculated using equation 5.2.
57 Table 5.1: Bias Conditions for SiGe LPT16ED HBT 3V3V 10 mA15 mA 120 uA180 uA 83.3383.33 Collector Voltage Collector Current Base Current SiGe LPT16ED HBT Bias Conditions The dotted red lines in figure 5.2 are modeled 1/f noise. The dotted black lines in figure 5.3 are modeled shot noise. The intersection of these lines is the corner frequency which falls at around fa1=45 KHz for the 150 uA bias current and fa2=70 kHz for the 180 uA bias current. The values of Kf, Af, and Bf are determined by using equation 5.1. In this work, the fitting of the curves was done visually with some guidelines such as keeping Af between .5 and 2 . However, in the use of IC-CAP, where the software extracts the parameters between 10 Hz and 100 Hz using linear interpolation, equation 5.6 is used . This is equation 5.1 in log format. ()()b f f 2 bI A K i f log log log + = # $ % & (5.6)
58 Figure 5.2: Plotted Noise Spectral Density of Base Noise Current Sources From the measured data, the modeling parameters are summarized in table 5.2. While the corner frequency may increase with increasing DC current, the modeling parameters remain the same for each measured 1/f noise curve. Table 5.2: Modeling Parameters Summarized for SiGe LPT16ED HBT Ib=150uAIb=180uA 22 1.30E-101.30E-10 11 SiGe LPT16ED Modeling Parameters Bf Bias Conditions Af Kf
59 The curves were modeled by combining the independent noise sources into a complete equation that describes the noise sources that are present at the base of the device . ! # $ $ % & + =Bf Af b f b 2 bf I K I q 2 i (5.7) Equation 5.7 represents the 1/f noise and shot noise sources that are present at the base of the device. Figure 5.3 shows the measured and modeled noise. It is important to ensure that 1/f noise measurement and model is properly matched between 10 Hz to 100 Hz; this is the frequency range that 1/f noise is usually modeled for . Figure 5.3: Measured and Modeled Noise Current Sources
60 5.4 Parameter Extraction for FET Devices In chapter 4, 1/f noise was measured for FET devices. These measurements were taken at the output of the device (the drain). Unlike the bipolar devices, 1/f noise is generated near the drain region. However, the thermal noise that is present in the measurement is the thermal noise that is produced at the gate node due to the 50 Ohm resistance that is used at the input of the device. Therefore, in order to properly model the noise measured at the drain of the device, this thermal noise voltage generated by the resistance is considered. It is also properly converted to a noise current by the devices transconductance. Thermal noise of resistor is represented by equation 5.8 . kTR 4 v2= (5.8) The thermal noise current at the drain that is generated by the thermal resistance at the gate is represented by equation 5.9 . m 2kTRg 4 i = (5.9) k=BoltzmanÂ’s Constant (1.38 x 10-23 J/K) T=300 K R=Resistance value
61 A typical curve for 1/f noise measured for FET device is shown in figure 5.4. The noise floor after the corner frequency of the device is defined by thermal noise. Figure 5.4: Typical Curve for 1/f Noise and Thermal Noise Measured at the Drain A pHEMT was used for modeling and parameter extraction. MathCAD was used to plot the data and extract the modeling parameters for the pHEMT. The bias conditions for this device are shown in table 5.1. The device was measured at two bias conditions. The DC current was varied while keeping drain voltage fixed. A typical gm was determined from the manufacturer datasheet. Table 5.3: Bias Conditions for pHEMT 3V3V 20 mA60 mA .410 mho.410 mho pHEMT Bias Conditions Drain Voltage Drain Current gm
62 The dotted red lines in figure 5.5 are modeled 1/f noise. The dotted black line in figure 5.5 is modeled thermal noise. The intersection of these lines is the corner frequency which falls at around fa1=500 KHz for the 20 mA bias current and fa2=2 MHz for the 60 mA bias current. The values of Kf, Af, and Bf are determined by using equation 5.1. Figure 5.5: Plotted Noise Spectral Density of Drain and Gate Noise Sources Table 5.4: Modeling Parameters Summarized for pHEMT Id=20mAId=40mA 1.21.2 1.80E-111.80E-11 11 pHEMT Modeling Parameters Bf Bias Conditions Af Kf
63 From the measured data, the modeling parameters are summarized in table 5.4. While the corner frequency may increase with increasing DC current, the modeling parameters remain the same for each measured 1/f noise curve. The curves shown in figure 5.6 were modeled by combining the independent noise sources into a complete equation that describes the noise sources measured at the drain of the device . Equation 5.10 represents the 1/f noise and thermal noise that are present at the drain of the device. Figure 5.6 shows the measured and modeled noise. m Bf Af d f 2 dkTRg 4 f I K i + ! # $ $ % & = (5.10) Figure 5.6: Measured and Modeled Noise Current Sources
64 5.5 Chapter Summary and Conclusions A comparison of measurements and modeled data was made in this chapter. For bipolar devices, the noise was referred to the base where it is generated. The noise floor after the corner frequency for bipolar devices is governed by shot noise generated at the base. A SiGe was measured for 1/f noise and chosen for modeling purposes. The 1/f noise modeling parameters were extracted from the measured curves. Measured and modeled noise had a close fit for the SiGe device. For FET devices, the noise was measured at the drain where amplified thermal gate noise and 1/f noise sources exist. The noise floor of this device after the corner frequency is governed by the gate resistance that was used to bias the device. A pHEMT was chosen for modeling purposes. The modeling parameters were determined from measured data. Measured and modeled noise had a close fit.
65 CHAPTER 6 CORRELATION OF 1/f NOISE TO OSCILLATOR PHASE NOISE 6.1 Introduction Oscillator phase noise usually results from the noise modulation of the carrier signal. The noise sources attributed to this event are present due to passive components such as resistors and internal noise sources from the active device that the oscillator circuit is based on. The nonlinear behavior of the oscillator causes noise sources to modulate the carrier signal [8, 27, 34]. These noise sources include low frequency noise sources, such as 1/f noise, and higher frequency noise sources such as white thermal noise. 6.2 Measurement of Oscillator Phase Noise A 1.4 GHz common-base oscillator based on the SiGe LPT16ED HBT device was measured for phase noise. The design of this oscillator is described in Appendix C. Since the oscillator is free-running, the method of injection locking was used to measure it: the system used in this work was developed by USF graduate student Alberto Rodriguez (Figure 6.1) [28, 29]. The method works by injecting a known reference signal (1.4 GHz) to the output of the freerunning oscillator through a directional coupler. The oscillator signal is then mixed with the
66 90 phase-shifted reference signal using an RF mixer. Then, the baseband output is fed to a Dynamic Signal Analyzer [28, 29]. Since the Dynami Signal Analyzer used to measure the phase deviations at baseband only has a limit of 100 KHz, the measurement that is taken is limited to this frequency. Figure 6.1: Injection Locked Phase Noise Measurement System  Figure 6.1 shows S(fm) as the phase noise measurement data that results from this measurement system. S(fm) is the spectral density of phase fluctuations and it is defined by equation 6.1. It can be described in logarithmic terms as equation 6.2. The phase detector (the mixer in figure 6.1) used in the system senses the frequency deviations in the oscillator as phase deviations . The measurement data resulting from this system is shown in figure 6.2. () ' ( ) * + =Hz rad B f f S2 m 2 rms m) ( (6.1)
67 () ( ) + ! # $ $ % & =Hz dBrad B f 10 f Sm 2 rms mlog ) ( (6.2) "(fm) = Fourier transform of phase deviation in time domain "(t) B= 1 Hz (Normalization of 1 Hz Bandwidth) Figure 6.2: Measured Phase Noise for 1.4 GHz SiGe LPT16ED HBT Oscillator The measurement data presented in figure 6.2 is in terms of S(fm): this is a valid measurement for phase noise (even at close-in frequencies such as 1 Hz offset). It is important to note that this measurement is not a power spectral density and that the measurement is a one-sided phase noise measurement in terms of phase deviation; and, a carrier signal is not presented .
68 Although a common way to report phase noise is in terms of L(fm) [dBc/Hz] for Single Sideband Phase Noise (SSB) with respect to a carrier, care must be taken when presenting such data. In the case of the oscillator measured in this work, the reported phase noise is of such magnitude that displaying phase noise data in terms of L(fm) is invalid for most of the measurement range. L(fm) is approximated from the measured S(fm) by equation 6.3 and has a limitation that starts at -30 dBc/Hz with a 10 dB/d ecade drop . This limitation is shown in figure 6.3; and, the measurement is only valid below that limit. In this case, the representation of the measurement in terms of L(fm) is only valid after approximately 50 KHz. ( ) + ! # $ $ % & =Hz dBc 2 f S 10 f Lm m) ( log ) ( (6.3) Figure 6.3: Measurement and Limit for Valid L(fm)
69 Figure 6.4: Oscillator Screen Capture 6.3 Simulation of Oscillator Phase Noise A transistor model for the LPT16ED SiGe bipolar transistor was provided by SiGe Semiconductor (figures 6.5 and 6.6). The model is for use with AgilentÂ’s Advanced Design System (ADS) . The transistor model incorporates 1/f noise parameters Af and Kf. Since these parameters are typically extracted from measured data, the model was provided with default values, Af=1.0 and Kf=0 (Figure 6.5). The transistor model was implemented in the design and simulation of the 1.4 GHz oscillator. A harmonic balance simulation was performed for the oscillator. A phase noise simulation was also included as part of the harmonic balance simulation. In order to get a more accurate simulation, the complete circuit
70 layout was used including passive component models: ideal components were avoided whenever possible and measurement based modeled components were used instead (Figure 6.7). Figure 6.5: SiGe Semiconductor LPT16ED HBT Transistor Model for ADS
71 Figure 6.6: SiGe Semiconductor LPT16ED HBT Transistor Schematic for ADS Figure 6.7: 1.4 GHz Oscillator Model Based on SiGe LPT16ED HBT
72 Figure 6.8: Harmonic Balance Simulation Using ADS The harmonic balance simulation shows a fundamental frequency at 1.393 GHz (Figure 6.8): this frequency was chosen for the simulation since the frequency of oscillation that was measured for phase noise was approximately 1.393 GHz. For the purposes of phase noise, two simulations were performed. One simulation included 1/f noise parameters from measured data (See Chapter 5: Af=2.0 and Kf=1.3e-10): the other simulation was performed using the default values (Af=0 and Kf=1.0). The comparison of these simulations is shown in figure 6.9: the variation due to the flicker noise parameters is easily noticed. The simulation that was run in ADS is a Frequency Sensitivity Analysis and it is determined as part of the large-signal (Harmonic Balance) simulation. The simulator gathers data in terms spectral density of frequency fluctuations and determines phase noise from this data .
73 Figure 6.9: Simulation of 1.4 GHz Oscillator Phase Noise with 1/f Noise Parameters 6.4 Correlation of 1/f Noise and Phase Noise It is generally understood that 1/f noise produced by a transistor that is used in an oscillator circuit modulates the carrier signal of the oscillator. The low frequency noise that has a 1/f amplitude characteristic is upconverted to phase noise with a 1/f3 amplitude characteristic [27, 31]. That is, a -10 dB/decade drop of 1/f noise at baseband is upconverted and becomes a -30 dB/decade drop at the carrier signal [23, 30]. This is true for the frequency range where 1/f noise occurs. In general, oscillator phase noise may vary depending on the amplitude level of 1/f noise at baseband and corner frequency. Figure 6.10 shows how a device with low 1/f noise and a device with higher 1/f noise and corner frequencies relate to oscillator phase noise [30, 31].
74 Figure 6.10: Phase Noise for Devices with Low 1/f Noise and Higher 1/f Noise  Using the 1/f noise parameters, the SSB phase noise was simulated using ADS and compared to the measurement. Since the measurement is taken in terms of S(fm), the data from the simulator is properly converted from the L(fm) simulation. Figure 6.11 shows that when 1/f noise parameters are included into the phase noise simulation, a better prediction of phase noise is achieved. As discussed above, the measured and modeled phase noise both follow the -30dB/decade drop that is expected due to the -10dB/decade drop of 1/f noise at baseband.
75 Figure 6.11: Phase Noise Measured and Simulated The correlation between 1/f noise and phase noise can be explained by the use of LeesonÂ’s Single Sideband oscillator phase noise equation. This equation (6.5) contains a 1/f noise corner frequency which is determined from the Af and Kf 1/f noise parameters. The 1/f noise corner frequency, as it relates to the SiGe HBT transistor used in the oscillator that was measured on figure 6.11, is determined by equation 6.4. The corner frequency is the place where the 1/f noise equation and the shot noise equation meet. () q K I 2 1 fF 1 A b cF =ÂŠ (6.4)
76 q=1.6e-19 C Ib=Base DC current Af=2.0 (Determined from 1/f Noise Measurement of SiGe HBT) Kf=1.3e-10 (Determined from 1/f Noise Measurement of SiGe HBT) fc=corner frequency Once the corner frequency is determined, it can be entered into LeesonÂ’s equation (6.5) as fc in order to determine the more accurate representation of phase noise which includes the contribution of the 1/f noise slope . () ()Hz dBc 1 f f Q f f 1 Q 4 f f f 1 P 2 FkTB f Lm c 2 L o 2 m 2 L c 2 o 3 m AVS m/ ' ( ) * + + + ! # $ $ % & + = (6.5) F=Amplfier Noise Figure k= BoltzmanÂ’s Constant (1.38 x 10-23 J/K) T= 300K (Room Temperature) B=Bandwidth (1 Hz) Ps=Amplfier Input Power Level PAVS=Available Power from Source fm=Sideband frequency being measured fo=Fundamental Frequency of Oscillation fc= 1/f noise corner frequency (determined by equation 6.2) QL=Resonator Loaded Q (QL=fo/B)
77 If this calculation needs to be expressed in terms of Spectral Density of Phase Fluctuations, S(fm), it can be calculated by using equation 6.6. This equation says that the Single Sideband Phase Noise in terms of L(fm) can be approximated by half of the S(fm) value . Therefore, using this equation, S(fm) can be solved for and plotted as was in figure 6.11. ( ) + ! # $ $ % & =Hz dBc 2 f S 10 f Lm m) ( log ) ( (6.6) 6.5 Chapter Summary and Conclusions A 1.4 GHz oscillator based on the SiGe LPT16ED HBT was measured for phase noise using the injection locking method. An ADS transistor model developed and provided by SiGe Semiconductor was used to simulate the oscillator circuit. The model included 1/f noise parameter options, Af and Kf. A harmonic balance and phase noise simulation was performed using these parameters which were found experimentally through measurement. The simulated phase noise was compared with the measured phase noise and a very good agreement was reached.
78 CHAPTER 7 CONCLUSIONS AND RECOMMENDATIONS 7.1 Conclusions In order to understand how 1/f noise is a limiting factor in phase noise performance of oscillators, it is n ecessary to have a system that can accurately measure the noise current sources that are attributed to the generation of 1/f noise in transistors. This thesis introduced the design of a 1/f noise measurement system that allowed for the noise current sources produced by a transistor to be measured directly. Careful design of operational amplifier circuits that are used in the system allowed the bandwidth of the system to be extended in order to provide a measurement bandwidth from DC to 10 MHz: this is an improvement in bandwidth from the conventional system bandwidth and the direct noise voltage measurement system. In addition, the 1/f noise current measurement system developed and shown in this thesis avoids external circuitry from distorting the measurement of the noise current sources of interest. The measurement system was also improved by the development of DC biasing (filter) networks which allowed for commercially available DC supplies to be used while avoiding DC supply noise from distorting the transistor noise source measurements. By implementing bias filters into the measurement system, batteries and potentiomenters normally used for low noise measurement setups were avoided.
79 Each section of the 1/f noise measurement system was measured and simulated with respect to frequency in order to provide a complete characterization of its performance within the desired frequency range. This included the DC blocks, the bias filters, the transimpedance amplifier, and the voltage amplifiers. As a result of the development of the 1/f noise measurement system described in this thesis, a survey of various microwave transistors was performed. The noise sources of these transistors were examined as DC current was varied. The microwave transistors that were measured for 1/f noise included a BJT, a SiGe HBT, a MESFET, a pHEMT, and a H-JFET. These were biased at the same output current in order to provide a relative understanding of 1/f noise levels for a variation of devices and technologies. Techniques and mathematical calculations were discussed that allowed for the noise sources that were measured to be traced back to their original location within the transistor. Consistent with the prior literature, it was noticed that in general bipolar devices have lower 1/f nose than FET devices. However, above the corner frequencies, FETs measured on this work show a lower noise floor than the bipolar devices. Selected microwave transistors were used for the purposes of modeling and parameter extraction. A SiGe HBT and a pHEMT were measured and their 1/f noise and shot or thermal noise sources were modeled. From this measured data, 1/f noise parameters Af and Kf were extracted. Measured and modeled noise sources were in very good agreement in both cases. The LPT16ED HBT from SiGe Semiconductor was used for the purposes of oscillator design and phase noise measurements and simulation. 1/f noise modeling
80 parameters, Af and Kf, that were previously extracted from measured data were included in the phase noise simulations in order to predict phase noise more accurately. As a result, the measured and modeled phase noise had a very good agreement. Therefore, it was found that the 1/f noise measurement system accurately measured the noise that is present at the output of the SiGe HBT transistor. Figure 7.1 describes the complete procedure from measurement of 1/f noise to the accurate phase noise simulation. Figure 7.1: Complete Measurement, Modeling, and Simulation Flowgraph
81 7.2 Recommendations In order to reduce external noise from being coupled into the measurement system, board space used for the operational amplifiers could be min imized. That is, the current and voltage amplifiers could be implemented into a single board design. Careful design of bias network should simplify the system so that a single DC dual supply may be used instead of three dual supplies as it is currently being done. Implementing the smaller board size should also make it easier to shield the board. The addition of a third or even a fourth voltage amplifier stage could be significant in providing the additional bandwidth if needed. This would be done in conjunction with lowering the feedback resistance of each voltage amplifier stage. Therefore, complexity of the system would be sacrificed for measurement bandwidth while achieving the same gain or possibly higher gain, if a fourth voltage amplifier is used. By doing this, a measurement system that is capable of measuring up to 40 MHz in conjunction with the available 40 MHz analyzer may be achievable. Most measurements showed an up-turn near 10 MHz. A detailed study of the biasing networks and possible improvements may play a role in removing this up-turn. From the measurement of each amplifier, it was not determined that the amplifiers may be the cause of this up-turn; but, in fact, the amplifiers may play a role in amplifying possible supply noise that may have not been removed by the filters that are currently part of the system. Furthermore, the amplifiers that were used did not show an increase in gain near the up-turn.
82 REFERENCES  Aldert Van der Ziel, Noise: Sources, Characterization, Measurement. New Jersey: Prentice Hall, 1970.  Fazal Ali, Aditya Gupta, HEMTs and HBTs: Devices, Fabrication, and Circuits. Boston, Artech House, Inc., 1991.  F.N. Hooge, Â“1/f Noise Sources,Â” IEEE Transactions on Electron Devices, Vol. 41, No. 11, November 1994.  Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer, Analysis and Design of Analog Integrated Circuits, Fourth Edition. New York: Wiley & Sons, 2001.  Aldert Van der Ziel, Â“Unified Presentation of 1/f Noise Sources,Â” Proceedings of the IEEE, Vol. 76, No. 3, March 1988, pp 233-258.  Peter J. Fish, Electronic Noise and Low Noise Design. New York: McGraw-Hill, Inc., 1994.  Guillermo Gonzalez, Microwave Transistor Amplifiers: Analysis and Design, Second Edition. New Jersey: Prentice Hall, 1997.  George D. Vandelin, Anthony M. Pavio, Ulrich L. Rohde, Microwave Circuit Design Using Linear and Nonlinear Techniques. New York: John Wiley and Sons, 1990.  Aldert van der Ziel, Noise in Solid State Devices and Circuits. New York: John Wiley and Sons, 1986.  Robert A. Pucel, Daniel J. Masse, Charles F. Krumm, Â“Noise Performance of Gallium Arsenide Field-Effect Transistors,Â” IEEE Journal of Solid-State Cirucuits, Volume: SC-11, No. 2, April 1976, pages 243-255.
83  A.J. Scholten, L.F. Tiemeijer, R. van Langevelde, R.J. Havens, V.C. Venezia, A.T.A. Zegers-van Duijnhoven, B. Neinhs, C. Jungemann, and D.B.M. Klaassen, Philips Research Laboratories, University of Bremen, ITEM, Â“Compact Modeling of Drain and Gate Current Noise for RF CMOS,Â” Electron Devices Meeting, 2002, IEDM Â’02 Digest, International, 811 Dec. 2002, pages 129-132.  Petri Kuittinen, Noise in Man-generated Images and Sound, 1999. Http://www.mlab.uiah.fi/~eye/mediaculture/noise.html.  Petr Vasina, Zeynep elik-Butler, Nuditha Vibhavie Amarasinghe, Southern Methodist University, Department of Electrical Engineering, Â“Investigation of 1/f noise in Sub-micron MOSTETs,Â” Quantum 1/f Noise and Other Low Frequency Fluctuations in Electron Devices: Seventh Symposium, pp 84-91, P. H Handel and A. L. Chung, The American Institute of Physics, 1999.  Lakshmi S. Vempati, John D. Cressler, Jeffrey A. Babcock, Richard C. Jaeger, David L. Harame, Â“Low-Frequency Noise in UHV/CVD Epitaxial Si and SiGe Bipolar Transistors,Â” IEEE Journal Of Solid State Circuits, Volu me: 31, Issue: 10, Oct. 1996, pages 1458-1467.  Alfred Blaum, Olivier Pilloud, Giacomo Scalea, James Victory, Franz Sischka, Motorola Inc., Agilent Technologies. Â“A New Robust On-Wafer 1/f Noise Measurement and Characterization System,Â” IEEE 2001 Int. Conference on Microelectronic Test Structures, Vol. 14, March 2001.  A. Balandin, S. V. Morozov, S. Cai, R. Li, K. L. Wang, Fellow IEEE, G. Wijeratne, Member IEEE, and C. R. Viswanathan, Life Fellow IEEE, Â“Low Flicker-Noise GaN/AlGaN Heterostructure Field-Effect Transistors for Microwave Communications,Â” IEEE Transactions on Microwave Theory and Techniques, Vol. 47, No. 8, August 1999.  Brett Ninness, Member IEEE, Â“Estimation of 1/f Noise,Â” IEEE Transactions on Information Theory, Vol. 44, No. 1, January 1998.  Rene D. Martinez, Daniel E. Oates, and Richard C. Compton, Â“Measurement and Model for Correlating Phase and Baseband 1/f Noise in an FET,Â” IEEE Transactions on Microwave Theory and Techniques, Vol. 42, No. 11, November 1994.
84  Julio C. Costa, Dave Ngo, Robert Jackson, Dave Lovelace, Natalino Ca milleri, Semiconductor Products Sector, Motorola Inc., James Jaffee, Paging Products Group, Motorola Inc., Â“Modeling and Measurement of 1/f Noise Characteristics of Silicon BJTÂ’s,Â” IEEE Microwave Theory and Tec hniques Symposium Digest, 1994.  Peter H. Handel, Alma L. Chung, Sixth Quantum 1/f Noise and Other Low Frequency Fluctuations in Electronic Devices Symposium, St. Louis, MO, May 1994, AIP Conference Proceedings, 371. Woodbury, New York, American Institute of Physics, 1996.  The Fundamentals of Signal Analysis, Application Note 23, Hewlett Packard, February 1985, page 34.  Guofo Niu, Zhenrong Jin, John D. Cressler, Rao Rapeta, Alvin J. Joseph, and David Harame, Â“Transistor Noise in SiGe HBT RF Technology,Â” IEEE Journal of Solid-State Circuits, Vol. 36, No. 9, September 2001.  Randall W. Rhea, Oscillator Design and Computer Simulation. Atlanta: Noble Publishing, 1995.  Agilent Technologies, IC-CAP 2002 User Manual: 1/f Extraction Toolkit, 2001-2002.  Maxim 350 MHz Ultra-Low Noise Operational Amplifiers, http://www.maxim-ic.com, Maxim Integrated Products, 2004.  LPT16ED 30 GHz Bipolar Transistor Product Information Datasheet, SiGe Semiconductor, 2001.  Jeremy Everard, Fundamentals of RF Circuit Design with Low Noise Oscillators. Chichester: John Wiley and Sons, LTD, 2001.  Alberto Rodriguez, Â“Injection-Locked Phase Noise Measurements,Â” MasterÂ’s Thesis, University of South Florida, May 2002.  Alberto Rodriguez, Lawrence P. Dunleavy, and Ali Boudiaf, Â“Use of Induced Noise to Calibrate Injection-Locked Phase Noise Measurements,Â” IEEE Microwave and Wireless Components Letters, Vol. 11, No. 3, March 2001.
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87 Appendix A: MathCAD Noise Modeling A.1 MathCAD Noise Modeling For Bipolar Transistors In order to extract the noise modeling parameters, two sets of measurements were required. The measurements are dependent upon DC base current. The measuremements are in the form of a text file: MathCAD was used to read in these files (Figure A.2). Then, the 1/f noise and shot noise models were fitted to the measurement. The 1/f noise model includes the parameters Kf, Af, and Bf. Using both curves, these values were determined. The shot noise was easily modeled with the value of base DC current. The modeled noise sources were combined and plotted along with the measured data. Figure A.1 shows modeled and measured noise sources plotted with MathCAD. Figure A.1: Modeled and Measured Bipolar Noise Sources Plotted with MathCAD
88 Appendix A: (Continued) fc2 = fc1 = fc11 2 Ib AF1 ÂŠ()Kf q := fc21 2 Ib2 AF21 ÂŠ()Kf2 q := Corner Frequencies: Total_noise_2f ()Kf2Ib2 AF2fBF & $ $ % # 2q Ib2 + := Total_noise_1f ()KfIb AFfBF & $ $ % # 2q Ib + := Combined Noise Sources: I_shot_22q Ib2 := I_shot2q Ib := Shot Noise Model: I_noise_2f ()Kf2Ib2 AF2fBF & $ $ % # := I_noisef ()KfIb AFfBF & $ $ % # := 1/f Noise Model: Noise_Meas_4READPRN"SiGe_3V_180uA_dBA_2.txt" () := Noise_Meas_3READPRN"SiGe_3V_180uA_dBA_1.txt" () := Noise_Meas_2READPRN"SiGe_3V_120uA_dBA_2.txt" () := Noise_Meas_1READPRN"SiGe_3V_120uA_dBA.txt" () := Files From Measured Noise: f1100 10000000 .. := Ib2180106 ÂŠ := Ib120106 ÂŠ := q1.61019 ÂŠ := Shot Noise Parameters: AF22 := Kf21.31010 ÂŠ := BF1 := Kf1.31010 ÂŠ := AF2 := Flicker Noise Parameters: Figure A.2: MathCAD File used for Modeling Bipolar 1/f and Shot Noise Sources
89 Appendix A: (Continued) A.2 MathCAD Modeling For FETs Two sets of noise measurements were also required to extract 1/f noise for FET devices. The two sets of data were dependent upon drain DC current. Noise measurements in the form of a text files were read in by MathCAD and plotted. Once the data was imported into the program, the 1/f noise and thermal noise models were fitted to the measurement. The 1/f noise model includes the parameters Kf, Af, and Bf. Using both curves, these values were determined. Thermal noise generated at the gate due to the bias resistor was determined and properly referred to the drain where 1/f noise source exists. The modeled noise sources were combined and plotted along with the measured data. Figure A.3 shows modeled and measured noise sources plotted with MathCAD. Figure A.4 shows the actual MathCAD file that was used.
90 Appendix A: (Continued) Figure A.3: Modeled and Measured FET Noise Sources Plotted with MathCAD
91 Appendix A: (Continued) Noise_Meas_2READPRN"Vd_3V_Id_20mA_SA.txt" () := Noise_Meas_3READPRN"Vd_3V_Id_60mA_DSA.txt" () := Noise_Meas_4READPRN"Vd_3V_Id_60mA_SA.txt" () := 1/f Noise Model: I_noisef ()KfId AFfBF & $ $ % # := I_noise_2f ()KfId2 AFfBF & $ $ % # := Noise Voltage Generated by 50 Ohm Resistor At Gate: v_gatef ()4k T 50 := I_thermal_drainf ()gmv_gatef () := Combined Noise Sources: Total_noise_1f ()I_noisef ()I_thermal_drainf () + := Total_noise_2f ()I_noise_2f ()I_thermal_drainf () + := Corner Frequencies: fcKfId AF 4k T 50 gm := fc2Kf2Id2 AF2 4k T 50 gm := fc = fc2 = Flicker Noise Parameters: AF1.2 := Kf1.81011 ÂŠ := BF1.0 := Kf21.81011 ÂŠ := AF21.2 := Thermal Noise Parameters: T300 := k1.3741023 ÂŠ := P1.1 := Vgs.58 := gm.410 := f1100 10000000 .. := Id.020 := Id2.060 := Files From Noise Measurements: Noise_Meas_1READPRN"Vd_3V_Id_20mA_DSA.txt" () := Figure A.4: MathCAD File used for Modeling FET 1/f and Shot Noise Sources
92 Appendix B: Maxim-IC MAX4106 Operational Amplifier Circuit Simulations B.1 Maxim-IC MAX4106 Op-Amp As A Transimpedance Amplifier The gain of the amplifier circuits that were used for detecting 1/f noise was measured using a vector network analyzer: the Agilent 4395 and the HP 8753 vector network analyzers were used in combination. An S-parameter SMA calibration and measurement was performed in order to determine the transducer power gain of the transimpedance amplifier in terms of S21. An ADS S-parameter simulation was also performed in order to verify the measured data. Since the amplifierÂ’s purpose is to take an input current and produce an output voltage, S21 data (measured and simulated) was converted to transimpedance with information about the port impedances, source power, and gain of the amplifier. The transducer power gain equation (B.1) is used to determine the output voltage (V2) . Once V2 is determined, ETH and Z01 (known values) are used to determine the input current (iin). Therefore, transimpedance (equation B.2) is calculated with knowledge of V2 and iin. Figure B.1 is a 2port network that describes the measurement system used to determine S21. 01 2 TH 02 2 2 2 21Z 8 E Z V 2 1 S = / / (B.1) in 2i V ance Transimped = (B.2)
93 Appendix B: (Continued) Figure B.1: 2-Port Network Representation of S21 Op-Amp Circuit Measurement S_Param SP1 Step=250 Hz Stop=10 MHz Start=1 Hz S-PARAMETERS Term Term2 Z=50 Ohm Num=2 Term Term1 Z=50 Ohm Num=1 R R3 R=100 Ohm OpAmp AMP2 VCC=5 V VEE=-5 V Vnoise=.75e-9 V Inoise=2.5e-12 A Zero1= Pole1= BW=65e+6 Hz VOS=.250e-3 V IOS=.05e-6 A SlewRate=275e+6 CCom=1e-12 F RCom=1 MOhm CDiff=.5e-12 F RDiff=1 MOhm Rout=0.7 Ohm CMR=100 dB Gain=100 dB Figure B.2: S-parameter Simulation of MAX4106 Transimpedance Amplifier
94 Appendix B: (Continued) The simulation shown in figure B.2 was performed using AgilentÂ’s Advanced Design System (ADS). The general differential input and single ended output Op-Amp model was used in order to Simulate S-parameters. The parameters for the MAX4106 Op-amp were put into the general ADS model. These parameters were determined from the datasheet that was provided by the manufacturer . The transimpedance calculated from measurement and simulation is shown in figure B.3. Figure B.3: Measured and Simulated Transimpedance Over Frequency
95 Appendix B: (Continued) B.2 Maxim-IC Max4106 Op-Amp As A Voltage Amplifier The gain of the voltage amplifiers that were used for detecting 1/f noise was measured using the Agilent 4395 Vector Network Analyzer. Since the analyzer measured transducer power gain (S21), equation B.1 was used to solve the voltage gain (V2/V1). An S-parameter simulation was performed in order to verify measured data. A general ADS differential input and single ended output Op-Amp model was used to simulate the voltage amplifier circuit. Datasheet information about the amplifier was entered into this model . Figure B.4 shows the S-parameter circuit simulation that was performed using ADS. Figure B.5 shows the voltage gain that was calculated from the measured and simulated data. S_Param SP1 Step=250 Hz Stop=100 MHz Start=1 Hz S-PARAMETERS Term Term1 Z=50 Ohm Num=1 R R4 R=9960 Ohm Term Term2 Z=50 Ohm Num=2 R R3 R=50800 Ohm OpAmp AMP2 VCC=5 V VEE=-5 V Vnoise=.75e-9 V Inoise=2.5e-12 A Zero1= Pole1= BW=65e+6 Hz VOS=.250e-3 V IOS=.05e-6 A SlewRate=275e+6 CCom=1e-12 F RCom=1 MOhm CDiff=.5e-12 F RDiff=1 MOhm Rout=0.7 Ohm CMR=100 dB Gain=100 dB Figure B.4: S-parameter Simulation of MAX4106 Voltage Amplifier Circuit
96 Appendix B: (Continued) Figure B.5: Measured and Simulated Voltage Gain of Voltage Amplifier
97 Appendix C: Oscillator Design Using The SiGe LPT16ED HBT C.1 Introduction The SiGe LPT16ED HBT was selected for implementation in a 2.5 GHz oscillator circuit. The oscillator was designed using the packaged LPT16ED SiGe HBT on 5mil FR4 substrate. It is designed as a common-base negatve resistance oscillator. Lumped inductors, capacitors, and resistors are used for the matching networks. Significant considerations such as high frequency performance and available values are important factors in successfully designing the oscillator. Therefore, modeled components are used in the matching networks. These components take into accout the subtrate and frequency effects that may result at the frequencies of interest. All measured data is based on a collector bias of 3 Volts and 20 millamps collector current. The choice of bias is based on manufacturer information: these bias conditions are used to design the oscillator. C.2 Transistor Measurements and Simulations S-parameter measured data was used to design the input and output matching networks of the oscillator. This data was taken on a wafer probing station. Thru-Reflect-Line standards were used along with test boards in order to perform S-parameter calibration and measurements. The S-parameters are plotted in Figure C.1. Table C.1 summarizes the S-parameters at 2.5 GHz.
98 Appendix C: (Continued) Figure C.1: S-parameters Measured for LPT16ED HBT Packaged Part Table C.1: Measured 2.5 GHz S-parameters for Common-Emitter Transistor MagPhase S110.15171.23S216.26349.522S120.06743.087S220.385-68.724
99 Appendix C: (Continued) Since S-parameter data is determined from a common-emitter measurement, the data must be transformed so that S-parameters reflect a common-base configuration. The most convenient way of converting common-emitter S-parameter data to common-base S-parameter data is to use Agilent ADS and change the reference port accordingly. Figure C.2 shows how to extract the common-base S-parameters from the common-emitter measured data using ADS. Common-EmitterCommon-Base Collector Base Base Emitter Collector Emitter Term Term3 Z=50 Ohm Num=1 Term Term4 Z=50 Ohm Num=2 Term Term2 Z=50 Ohm Num=2 Term Term1 Z=50 Ohm Num=1 S2P SNP5 2 1 Ref S2P SNP4 2 1 Ref Figure C.2: S-parameter File Simulated for Common-Emitter and Common-Base Table C.2: Translated S-parameters for Common-Base Transistor MagPhase S111.187163.96S212.409-18.56S120.187158.65S221.303-68.724
100 Appendix C: (Continued) Conveniently, ADS allows the reference port to be changed and automatically calculates common-base S-parameters. The stability factor, K, was plotted in ADS (K=-. 973): the simulation shown in figure C.3 shows that the transistor as a common base potentially unstable because it is less that one. m1 freq= our_k=-0.973 2.500GH z 1.52.02.53.03.5 1.04.0 -0.95 -0.90 -0.85 -0.80 -1.00 -0.75 freq, GHz o u r k m1 y() Figure C.3: Stability Factor of Common-Base Transistor
101 Appendix C: (Continued) C.3 Determination of Oscillator Networks The equations relating the input to the output of the transistor are shown below [7, 8]. 1= L IN (C.1) T T INS S S S ÂŠ + = 22 21 12 111 (C.2) 1 = T OUT (C.3) L L OUTS S S S ÂŠ + = 11 21 12 221 (C.4) The design approach is narrowed down to 3 major requirements . Start the design procedure with a potentially unstable transistor. This is defined by the stability factor less than one: K<1. This may require the use of external feedback or configuring the device as a common-base transistor. Choose a Terminating Network that allows | IN| > 1. That is, the proper choice for T will generate a | IN| > 1. The most convenient way to do this is to map many choices of T over the unstable regions of the Smith Chart.Choose a Load Network (Resonant Network) that resonates the input impedance ZIN: XL( 0)=-XIN( 0). Note that ZIN=RIN+jXIN and ZL=RL+jXL. Also for maximum power transfer, RL = | RIN|/3. Following the previous steps and guidelines, figure C.4 shows the derived network input and output impedances and reflections at each port. Figure C.5 is the netowork with ideal components.
102 Appendix C: (Continued) Figure C.4: Input and Output Impedances and Reflection Coefficients Figure C.5: Ideal Oscillator with Input and Output Matching Networks
103 Appendix C: (Continued) In the actual design, models were used that take into account parasitic and substrate effects. Each network was simulated individually and target impedances from figure C.4 were used in order to arrive at the correct impedances at the input of each port. All interconnecting lines, corners, pads, and via holes were simulated in order to arrive at the final design of each network. Figures C.6, C.7, and C.8 show the ADS simulations for the oscillator. Figure C.9 is the Simulation of S21: it shows gain near 2.5 GHz. Figure C.6: Actual Simulation of Input Matching Network Including Models
104 Appendix C: (Continued) Figure C.7: Actual Simulation of Output Matching Network Including Models Figure C.8: Complete Oscillator Network
105 Appendix C: (Continued) m1 freq= dB(S(2,1))=12.459 L=3.500000 2.500GHz 123456789 0 10 -50 -40 -30 -20 -10 0 10 20 -60 30 freq, GHz d B ( S ( 2 1 ) ) m1 Figure C.9: Sweep of S21 Over Frequency Figure C.10: Final Oscillator Circuit Layout
106 Appendix C: (Continued) The complete oscillator circuit layout is shown in figure C.10. Reference designators were included. The actual models that are used in figures C.8 and C.10 are included in table C.2: these are listed by reference designator. Table C.3: Models Used in the Final Oscillator Circuit Designator Modelithics Model Number Va lue Pad Width Pad Length Gap Length R1 RES_KOA_0402_001_MDLXCLR1 51Ohm .5588 mm .4572 mm .2794 mm C1 CAP_MUR_0402_001_MDLXCLR1 2.7 pF .5588 mm .4572 mm .2794 mm C2 CAP_MUR_0402_001_MDLXCLR1 100 pF .5588 mm .4572 mm .2794 mm L1 IND_TDK_0402_001_MDLXCLR1 2.7 nH .5004 mm .3988 mm .3988 mm C3 CAP_MUR_0402_001_MDLXCLR1 1.3 pF .5588 mm .4572 mm .2794 mm C4 CAP_MUR_0402_001_MDLXCLR1 100 pF .5588 mm .4572 mm .2794 mm L3 IND_CLC_0402_001_MDLXCLR1 40 nH .6604 mm .4572 mm .3556 mm L4 IND_CLC_0402_001_MDLXCLR1 40 nHz .6604 mm .4572 mm .3556 mm
107 Appendix C: (Continued) C.4 Oscillator Design Results and Measurements Although the oscillator was designed to oscillate at 2.5 GHz and with a collector voltage of 3V and 20 mA of collector current, the measurement did not show a solid oscillation at that frequency and bias condition. Therefore, the DC current was increased while keeping the voltage relatively close to the original setting in order to determine where a good frequency of oscillation could be found. It was found experimentally that a collector bias of 2.25 V and collector current of 72 mA produced a solid oscillation frequency at 1.4 GHz. This was verified by a harmonic balance simulation based on a transistor model that was provided by SiGe Semiconductor. The physical measurement was repeated as a simulation using ADS. Figure C.11: 1.4 GHz Oscillator Simulation Based on SiGe LPT16ED HBT
108 Appendix C: (Continued) Figure C.12: Harmonic Balance Simulation Using ADS
109 Appendix C: (Continued) Figure C.13: Oscillator Screen Capture