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Effect of sno2 roughness and cds thickness on the performance of cds/cdte solar cells

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Title:
Effect of sno2 roughness and cds thickness on the performance of cds/cdte solar cells
Physical Description:
Book
Language:
English
Creator:
Nemani, Lingeshwar
Publisher:
University of South Florida
Place of Publication:
Tampa, Fla.
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Subjects

Subjects / Keywords:
Textured tco
Cdcl2 treatment
Interdiffusion
Light-trapping
Thin-films
Dissertations, Academic -- Electrical Engineering -- Masters -- USF   ( lcsh )
Genre:
government publication (state, provincial, terriorial, dependent)   ( marcgt )
bibliography   ( marcgt )
theses   ( marcgt )
non-fiction   ( marcgt )

Notes

Abstract:
ABSTRACT: Textured SnO2 films as TCO have been investigated to determine the effect of surface roughness on the performance of CdS/CdTe solar cells. Film roughness was controlled by varying the substrate temperature. Characterization of the SnO2 films has also carried out using AFM measurements. It was found that increase in substrate temperature results in increased roughness of the film. A series of cells were fabricated with different CdS thicknesses to determine the combined effect of SnO2 roughness and CdS thickness. As a part of fabrication process, cells were subjected to different post deposition treatments. It was observed that roughness seems to be critical when CdS remained in the final device is thin. The performance of CdS/CdTe devices fabricated was characterized using J-V and spectral response measurements. It was found that cells with initial CdS thickness of 1000 showed better performance than those with thicker CdS for the same roughness of SnO2.
Thesis:
Thesis (M.S.E.E.)--University of South Florida, 2005.
Bibliography:
Includes bibliographical references.
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System requirements: World Wide Web browser and PDF reader.
System Details:
Mode of access: World Wide Web.
Statement of Responsibility:
by Lingeshwar Nemani.
General Note:
Title from PDF of title page.
General Note:
Document formatted into pages; contains 76 pages.

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aleph - 001681022
oclc - 62587582
usfldc doi - E14-SFE0001106
usfldc handle - e14.1106
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ABSTRACT: Textured SnO2 films as TCO have been investigated to determine the effect of surface roughness on the performance of CdS/CdTe solar cells. Film roughness was controlled by varying the substrate temperature. Characterization of the SnO2 films has also carried out using AFM measurements. It was found that increase in substrate temperature results in increased roughness of the film. A series of cells were fabricated with different CdS thicknesses to determine the combined effect of SnO2 roughness and CdS thickness. As a part of fabrication process, cells were subjected to different post deposition treatments. It was observed that roughness seems to be critical when CdS remained in the final device is thin. The performance of CdS/CdTe devices fabricated was characterized using J-V and spectral response measurements. It was found that cells with initial CdS thickness of 1000 showed better performance than those with thicker CdS for the same roughness of SnO2.
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Effect of SnO 2 Roughness and CdS Thickness on the Performance of CdS/CdTe Solar Cells by Lingeshwar Nemani A thesis submitted in partial fulfillment of the requirements for the degree of Master of Science in Electrical Engineering Department of Electrical Engineering College of Engineering University of South Florida Major Professor: Christos S.Ferekides, Ph.D. Don L.Morel, Ph.D. Yun L.Chiou, Ph.D. Date of Approval: March 21, 2005 Keywords: Textured TCO, CdCl 2 Treatment, Interdiffusion, Light-trapping, Thin-films Copyright 2005, Lingeshwar Nemani

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DEDICATION To my parents and brothers for their love and support

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ACKNOWLEDGEMENTS I would like to express my gratitude in first place to my major professor, Dr. Chris Ferekides for his guidance and support during the course of this work. His enthusiasm and encouragement has been of gr eat inspiration. I also thank Dr. Don Morel for all his timely suggestions. I would also like to thank Dr. Chiou for being my committee member. I would also like to express special tha nks to Vishwanath Kumar, Dr. Harish Sankaranarayana, Hehong Zhao, and Sridevi for their invaluable help in operating the laboratory equipment. I wish to thank fellow researchers and friends Sudhakar, Prashant Matesh and Srilatha for their cooperation. Sp ecial thanks to my roommates and other friends who made my stay at USF very memorable. I also thank Bob, Tom and Jamie (Machine shop team) and Mike (electrical shop) for their help.

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TABLE OF CONTENTS LIST OF TABLES iii LIST OF FIGURES iv LIST OF SYMBOLS vii ABSTRACT ix CHAPTER 1 INTRODUCTION 1 1.1 Brief History of Thin-Film CdTe Solar Cells 3 CHAPTER 2 SOLAR CELL DE VICE PHYSICS 5 2.1 Photovoltaic Effect 5 2.2 P-N Junction Operation 5 2.2.1 Thermal Equilibrium 6 2.2.2 Forward Bias 7 2.2.3 Reverse Bias 8 2.2.4 Under Illumination 9 2.3 Solar Cells 10 2.3.1 Theory of Operation 10 2.3.2 Current-Voltage Characteristics 10 2.3.3 Losses 12 2.3.3.1 Optical Losses 12 2.3.3.2 Recombination 13 2.3.3.3 Series and Shunt Resistance Losses 13 2.4 Heterojunctions 14 CHAPTER 3 MATERIALS AND LITERATURE REVIEW 17 3.1 Materials 17 3.1.1 SnO 2 as Transparent Conducting Oxide 17 3.1.2 CdS as Window Layer 18 3.1.3 CdTe as Absorber Layer 18 3.2 Literature Review 19 3.2.1 Qualitative Description of Light Trapping Phenomenon 20 3.2.2 CdS Consumption 27 3.2.2.1 CdS/CdTe Intermixing 28 3.2.3 Issues Regarding Thin-Film CdTe/CdS Devices 33 i

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CHAPTER 4 EXPERIMENTAL DETAILS 33 4.1 Tin Oxide 33 4.2 CdS 34 4.3 CdTe 35 4.4 CdCl 2 Treatment 36 4.5 Contacting 37 4.6 Solar cell Measurements 37 CHAPTER 5 RESULTS AND DISCUSSION 39 5.1 Characterization of SnO 2 Films 39 5.2 Effect of Increased Roughness of SnO 2 Films 42 5.2.1 Device Analysis 45 5.2.2.1 Collection 49 5.3 Effect of Increased Starting CdS Thickness 55 5.3.1 Comparison of Cells with Same Spectral Response 57 CHAPTER 6 CONCLUSIONS AND RECOMMENDATIONS 59 REFERENCES 61 ii

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LIST OF TABLES Table 1 Notable Events in the History of Photovoltaics 2 Table 2 EDS Analysis of CdTe Deposited at 625 o C 30 Table 3 Variation in Roughness with S ubstrate Temperature 39 Table 4 Parameters of Cells with Ra=10.64nm 44 Table 5 Parameters of Cells with Ra=13.74nm 45 Table 6 Parameters of Cells with Ra=19.74nm 45 Table 7 Shunt and Series resistan ces for Ra=10.64nm 46 Table 8 Shunt and Series resistances for Ra=13.74nm 48 Table 9 Shunt and Series resistances for Ra=19.74nm 52 Table 10 Effect of Annealing Time and CdTe Substrate Temperature 54 Table 11 Effect of Increased CdS Thickness 56 Table 12 Summary of Processing Conditions of Cells with Same Spectral Response 57 Table 13 Parameters of Cells with Same Spectral Response 57 iii

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LIST OF FIGURES Figure 1 Fermi Level Positions in Se miconductor Materials 6 Figure 2 Energy Band Diagram of a p-n Junction Under Thermal Equilibrium 7 Figure 3 Energy Band Diagram of a p-n Juncti on Under Forward Bias 8 Figure 4 Energy Band Diagram of a p-n J unction Under Reverse Bias 9 Figure 5 Dark and Light I-V Characteristics of an Ideal Solar Cell 11 Figure 6 I-V Characteri stics Indicating Maximum Power R ectangle 12 Figure 7 Equivalent Circuit of a Solar Cell 13 Figure 8 Effect of Series Resistance 14 Figure 9 Effect of Shunt Re sistance 14 Figure 10 Energy Band Diagram of Two Semiconductors Prior to Hetrojunction Formation 15 Figure 11 Energy Band Diagram of a Heterojunction 16 Figure 12 Light Trapping Phenomenon 20 Figure 13 Effect of SnO 2 Grain Size 22 Figure 14 Specular Reflectivity vs. J sc 22 Figure 15 Transmission Spectra of SnO 2 Films Deposited by APCVD 23 Figure 16 Transmission Spectra of 0.6 m CdTe Layer 23 iv

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Figure 17 Spectral Response and Re flectance of CdTe Cells with Different TCOs 24 Figure 18 SR of CdTe Cells Fa bricated with Thin and Thick CdTe Films 25 Figure 19 3-D Graph of V oc as a function of SnO 2 Roughness and QE @ 450 nm 25 Figure 20 3-D Graphof the FF as a Function of SnO 2 roughness and QE @ 450nm 26 Figure 21 Transmission of SnO 2 Films with Different Roughnesses 26 Figure 22 SR of CdTe Cells Fabricated on SnO 2 Substrates with Different Roughnesses 27 Figure 23 SR of Cells with Different CdS Thicknesses 29 Figure 24 EDS Analysis of Sample Deposited at 450 o C 30 Figure 25 CL Linescan Superimposed on SEM Images (a) As-deposited CdTe (b) After CdCl 2 Treatment 31 Figure 26 MOCVD Setup for SnO 2 Deposition 33 Figure 27 CBD Setup for CdS Deposition 35 Figure 28 CSS Setup for CdTe Deposition 36 Figure 29 Device Configuration of CdS/ CdTe Solar Cell 37 Figure 30 AFM Image of SnO 2 Surface with Roughness R a = 10.637nm 40 Figure 31 AFM Image of SnO 2 Surface with Roughness R a = 10.637nm 40 Figure 32 AFM Image of SnO 2 Surface with Roughness R a = 10.637nm 41 Figure 33 Dependence of Voc on Ra and QE @ 450nm 42 Figure 34 Dependence of FF on Ra a nd QE @ 450nm 43 Figure 35 SR of the Cells with Ra = 10.64nm 43 v

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Figure 36 SR of the Cells with Ra = 13.74nm 44 Figure 37 SR of the Cells with Ra = 19.74nm 44 Figure 38 Light J-V Charac teristics of Cells with Ra=10.64nm 46 Figure 39 Light J-V Charac teristics of Cells with Ra=10.64nm 47 Figure 40 Dark J-V Characterist ics of Cells Annealed at a) 405 o C b) 410 o C 47 Figure 41 Light J-V Data for Cells with Ra=13.74nm 48 Figure 42 FF Vs. Wavelengt h for Cells Annealed at 390 o C 49 Figure 43 Monochromatic JV for Cells Annealed at 390 o C with Ra=10.64nm 50 Figure 44 Monochromatic JV for Cells Annealed at 390 o C with Ra=13.74nm 50 Figure 45 a) FF vs. Waveleng th for Cells annealed at 410 o C; Monochromatic J-V Data for Cells Annealed at 410 o C with Ra b) 10.64nm c) 13.74nm 51 Figure 46 Light J-V Data for Cells with Ra=19.74nm 52 Figure 47 Dark J-V Data for Cells Annealed at 410 o C 53 Figure 48 SR Curves of Samples Processed under Conditions Listed in Table 11 54 Figure 49 Dark J-V of the cells Processed under Conditions Listed in Table 11 55 Figure 50 J-V curves of Two High Effi ciency Cells 56 Figure 51 SR of Two High Efficiency Cells 57 Figure 52 Comparison of Cells with Same Spectral Response 58 vi

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LIST OF SYMBOLS A Diode quality factor c Speed of light (3 x 10 10 cm/s) E Energy (eV) E c Energy of conduction band edge (eV) E f Fermi-level energy (eV) E g Band-gap energy (eV) E v Energy of valence band edge (eV) ff Fill factor h Plancks constant (6.626 x 10 -34 J-s) I Current (A) I L Light generated current (A) I m Current at maximum power point (A) I sc Short circuit current (A) I 0 Reverse saturation current (A) Jn Electron current density (A/cm 2 ) Jp Hole current density (A/cm 2 ) J sc Short circuit current density (A/cm 2 ) k Boltzmanns constant (1.38066 x 10 -23 J/K) ln Natural logarithm vii

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P in Incident power (W/cm 2 ) q Electron charge (1.602 x 10 -19 C) R s Series resistance ( -cm 2 ) R sh Shunt resistance ( -cm 2 ) T Temperature ( o C) t Depth from surface of material (m) V Voltage (V) V a Bias voltage (V) V bi Built-in voltage (V) V d Built-in voltage (V) V m Voltage at maximum power point (V) V oc Open circuit voltage (V) Optical absorption coefficient (cm -1 ) E c Conduction band discontinuity (eV) E v Valence band discontinuity (eV) n Energy difference between E f and conduction band edge (eV) p Energy difference between E f and valence band edge (eV) Efficiency Wavelength (nm) Work function (V) Electron affinity (eV) viii

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EFFECT OF SnO 2 ROUGHNESS AND CdS THICKNESS ON THE PERFORMANCE OF CdS/CdTe SOLAR CELLS Lingeshwar Nemani ABSTRACT Textured SnO 2 films as TCO have been investigated to determine the effect of surface roughness on the performance of Cd S/CdTe solar cells. Film roughness was controlled by varying the substrate temp erature. Characterization of the SnO 2 films has also carried out using AFM measurements. It was found that increase in substrate temperature results in increased roughness of the film. A series of cells were fabricated with different CdS thicknesses to determine the combined effect of SnO 2 roughness and CdS thickness. As a part of fabrication process, cells were subjected to different post deposition treatments. It was observed that roughness seems to be critical when CdS rema ined in the final device is thin. The performance of CdS/CdTe devi ces fabricated was characteri zed using J-V and spectral response measurements. It was found that ce lls with initial CdS thickness of 1000 showed better performance than those with thicker CdS for the same roughness of SnO 2 Conversion efficiency of 13.37% was achieved by increasing the SnO 2 roughness and depositing thicker CdS initially. ix

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CHAPTER 1 INTRODUCTION Fossil fuels like coal, oil and natural gas are non-renewable, that is, they cannot be replenished and will eventually dwindle. They also contribute to environmental pollution. In contrast, renewable energy sources such as wind, solar, geothermal, hydrogen, and biomass are constantly replenishe d and are infinite. The usage of these has the advantages of lower environmental imp act and absolutely no investment on energy imports. As the concern for environmental polluti on and the demand for long lasting power sources increases, focus has been shifted to make use of our natural resource, the SUN. The advantages of solar power include an absence of environm ental pollution and a virtually inexhaustible energy supply. Extensive research is being done in developing the technologies that take advantage of th e clean abundant energy of the SUN. Photovoltaics is one such technology which converts sunlight directly into electricity. Although discovered in 1839 by Henri Becquerel, the first practical solar cell was fabricated at Bell Labs in 1954 [1]. Silicon is the most abundant element in the Earths crest and is the most extensively used solar cell material. Single crystalline silicon is an indirect band gap material and has a low absorption coefficient which requires larger thickness to absorb most of the sunlight. Hence, production and material costs are high. This has led to the development of th in film technology which is cost-effective. 1

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Table 1 Notable Events in the History of Photovoltaics [2] 2

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Most of the thin films used in solar cells are direct band gap semiconductors which effectively absorb sunlight within a few micr ons. This ensures low material costs. While being cost effective, thin-film solar cells are not as efficient as solar cells based on silicon because of the grain boundary effects associ ated with compound semiconductors that are polycrystalline in nature. Table 1 shows some of the notable events in the history of photovoltaics. 1.1 Brief History of Thin Film CdTe Solar Cell Development The first efficient CdTe thin film solar ce ll was fabricated as ea rly in 1968 [3]. In this work a thin layer of p-Cu 2-x Te is grown on the surface of n-CdTe film. These early Cu 2-x Te/CdTe thin film sola r cells showed conversion efficien cies of ~6%. In the process of developing new device structures, the first all thin film CdTe/CdS heterojunction solar cell was fabricated in 1969 [4]. The efficiency of the cell was report ed to be 1%. Bonnet and Robenhorst reported the first efficient (~5 %) all-thin film CdS/CdTe solar cell [5]. Thin film solar cells based on CdTe have pr oven to be very promising in the photovoltaic industry and have reached conversion efficienci es of around 16 %. The highest efficiency reported to date is 16.5% by NREL research laboratory [6]. The main objective of this work carried out at University of South Florida is to study the effect of structural properties of Tin Oxide used as a front contact on the performance of CdS/CdTe solar cells. This thes is is organized into five chapters. Chapter1 deals with the history of photovoltaics. Chapter-2 discusses the basic device operation of solar cell devices. A brief di scussion of the material proper ties and a detailed review of the literature are carried out in Chapter-3. Processing techniques used to fabricate cells in this work are described in detail in Chapter4. A detailed discussion of results is carried 3

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out in Chapter-5 and the conclusions drawn along with recommendations are discussed in Chapter-6. 4

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CHAPTER 2 SOLAR CELL DEVICE PHYSICS 2.1 Photovoltaic Effect A Solar cell is a p-n junction diode, which operates on the principle of the photovoltaic effect. When light is incident on a solar cell, photons having energy higher than the band gap are absorbed and electron-hole pairs (EHPs) are generated. These electron-hole pairs that are generated are sepa rated by the internal el ectric field across the depletion region and finally collect ed at the external contacts. This internal electric field can be generated by A Homojunction a junction formed between a single semiconductor material doped n & p A Heterojunction a junction formed between two different semiconductor materials. The following sections discuss these two junctions in detail. 2.2 P-N Junction Operation The band structures of intr insic, p-type, and n-type semiconductors are shown below. E f is the energy of the Fermi-level. The Fermi energy is the energy at which the probability of occupation by an electron is exact ly one-half. As shown in the figure 1, for intrinsic materials the Fermi level is in the center of the band gap (E g ). For n-type materials it is shifted up towards conduction band ; for p-type materials, it is shifted down 5

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E c E c E c E f E g E v E v E v E f E f Intrinsic n-type p-type Extrinsic Figure 1 Fermi Level Positions in Semiconductor Materials towards the valence band. A p-n junction is formed when two p-type and n-type semiconductor materials are joined. At the instance of junc tion formation, a dffusion current J diff flows from the p-type semiconductor to the n-type semiconductor, as a result of the concentration gradient. The diffusion of mobile carriers in the region around the p-n junc tion leaves behind immobile (fixed) charges. This region is called the de pletion region. As the name suggests, this region is depleted of charge carriers. The charged regions result in an electric field (directed from n to p) that opposes furthe r diffusion of holes fr om p-region and the electrons from n-region. The operation of the simple p-n junction is discussed next in detail with the help of energy band diagrams. 2.2.1 Thermal Equilibrium The energy band diagram at thermal equilibrium is illustrated in Figure 2. Under thermal equilibrium conditions (applied bias V a =0 and no illumi nation), since E f should be constant, band bending is observed in th e depletion region, wh ich represents the 6

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Figure 2 Energy Band Diagram of a PN Junction Under Thermal Equilibrium potential barrier of energy qV bi where V bi is the built-in potential. Those majority carriers (holes on p-side) with energies greater than qV bi can diffuse from the p-region into the n-region as a result of the difference in the carrier concentrations and constitute the diffusion component of the hole current (J p diff ). On the other hand, the minor ity carriers in the n-region drift down the potential barrier to the p-region. This constitutes the drift co mponent of hole current (J p drift ) which is negative. Since both the component s are equal and opposite in direction, J p = J p diff + J p drift = 0 Similarly, the net electron current Jn is also equal to zero. Thus, under equilibrium the net current flow is zero. 2.2.2 Forward Bias A p-n junction is said to be forward bias ed if the p-region is made positive with respect to the n-region. The energy band diagra m illustrated in Figure 3 clearly explains the effect of forward bias. 7

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Figure 3 Energy Band Di agram of a P-N Junction Under Forward Bias If V a is the applied bias, then the energy barrier is reduced to q(V bi -V a ). This reduction in the barrier results in an increase in the number of majority carriers having energies greater than q(V bi -V a ). Hence more holes diffuse into the n-region and also more electrons into the p-region resulting in la rger diffusion current components than their thermal equilibrium values. Since the change in the barrier does not affect the minority carriers in both regions, no change is observe d in the drift components when compared to their thermal equilibrium values. Therefore, the net effect of forward bias is an increase in the diffusion current components while the drift components remain unchanged from their thermal equilibrium values. 2.2.3 Reverse Bias A p-n junction is said to be reve rse biased when the p-regi on is made negative with respect to the n-region. The effect of reverse bias (V a < 0) on the energy band diagram is 8

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Figure 4 Energy Band Diagram of a P-N Junction Under Reverse Bias illustrated in Figure 4. It can be observed that the energy barrier is increased to q(V bi + V a ), which decreases the number of majority carriers that possess an energy greater than q(V bi + V a ). As a result there is a reduction in the diffusion current components in both p and n regions when compared to their ther mal equilibrium values. However, the drift current components of both n and p regions rema in at their thermal equilibrium values. It is clearly evident that the reverse current is low and negative and a further increase in the amount of reverse bias has no e ffect on minority carrier supply. The net result is a constant reverse saturation current I o 2.2.4 Under Illumination When the p-n junction is subjecte d to illumination, a photocurrent I L results from the generation of excess electron-hole pairs be ing acted upon by the electric field across the depletion region. 9

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2.3 Solar Cells 2.3.1 Theory of Operation The basic operation of a solar cell involves the absorpti on of photons, the subsequent generation of carri ers and their diffusion, carrier separation by the electric field acting across the depletion region and the collection of the carriers. The absorption of light in a semiconducto r depends on the energy of the incident photon and the band gap of the semiconductor. Absorption is achieved only when the energy of the incident photon (E = hc/ ) is greater than the ba ndgap of the semiconductor (E g ) where h is Plancks constant, c is the speed of light in vacuum and is the wavelength of the incident radiation. The absorption of light by a semic onductor is governed by the equation I = I o e t Where I o is the intensity of the light incident on the semiconductor, is the absorption coefficient, and t is the depth into the materi al from the surface of incidence. However, in solar cells most of the incident light is abso rbed in the absorber and hence most of the photocurrent is a result of the electrons from the absorber. A few electron-hole pairs are generated in the window layer, but their contribution to the photocurrent is negligible. 2.3.2 Current Voltage Characteristics The dark and light I-V characte ristics of an ideal solar cell are shown in Figure 5. The behavior in the dark is governed by the equation I = I o [ e qV/AkT 1] The total current under illumination is given by I = I o [ e qV/AkT 1] I L 10

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Figure 5 Dark and Li ght I-V Characteristics of an Ideal Solar Cell Where I o is the reverse saturation current, A is the diode quality factor, k is the Boltzmanns constant and T is the temperature. The value of A lies between 1 and 2. Although these are the fundamental parameters of the solar cell, the usual description of efficiency is in terms of open-circuit voltage (V oc ), short-circuit density (I sc) and fill factor (FF). The V oc is the output voltage at the device terminals when they are open, which is given by V oc = AkT/q ln [I L /I o + 1] The maximum value of V oc is obtained when Io is mini mum and when A is 1. However, an increase in A does not lead to an increase in V oc as suggested by above equation, since increasing A leads to an increase in I o thus hurting the V oc Figure 6 shows the inverted IV curve of solar cell in the fourth quadrant indicating the maximum power rectangle. The cell can be operated at a bias point (V m ,I m ) where the IV product is maximum for maximum power output. 11

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The FF of an I-V curve is defined by FF = V m *I m /V oc *I sc Finally, the conversion efficiency is given by = V oc I sc FF / P in where P in is the incident power. Figure 6 I-V Charact eristics Indicating the Maximum Power Rectangle 2.3.3 Losses Practical solar cells are less effici ent owing to certain loss mechanisms. The different loss mechanisms are Optical loss Recombination Loss due to Series and Shunt resistances. 2.3.3.1 Optical Loss When light is incident on the surface of a semiconductor material, a certain amount of it is reflected, whic h results in transmission loss The use of anti-reflective coatings reduces the reflection losses. 12

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2.3.3.2 Recombination Recombination is a process of annihila tion of electron-hole pairs. Recombination in the bulk and at the surf ace is the basic cause for I sc loss. The carrier s generated well away from the junction have a high probabili ty of recombining before they reach the device terminals. 2.3.3.3 Series and Shunt Resistance Losses Practical solar cells have finite series and shunt resistances associated with them. Owing to these resistances, the total cu rrent in the solar cell is given by I = I o [e q (V IRs)/AkT 1] + (V-IR s ) / R sh I L The bulk resistance of the semiconductor, resi stance of metallic contacts, and the contact resistance between the semiconductor and the me tallic contacts cause series resistance R s Shunt resistance R sh is caused by leakage paths. Both of them affect the devices performance by reducing its FF. Figure 7 shows equivalent circuits of both ideal and Figure 7 Equi valent Circuit of a Solar Cell (a) Ideal (b) Practical practical solar cells. The effect of series a nd shunt resistances on I-V characteristics is illustrated in Figures 8 and 9. 13

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Figure 8 Effect of Series Resistance Figure 9 Effect of Shunt Resistance 2.4 Heterojunctions A heterojunction is a junction formed between two different semiconductors. Figure 10 shows the energy band diagram of the two semiconductors prior to junction formation. E g1 and E g2 are the band gaps of the two semiconductors, m1 and m2 are 14

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their work functions, and 1 and 2 are the electron affinities. E c and E v represent the conduction band and valence band discontinui ties respectively and are given by [7] E c = 1 2 E v = E g2 E g1 E c Figure 10 Energy Band Diagram of Tw o Semiconductors Prior to Hetro j unction Formation Adopted from [8] When these two semicondutors are brought toge ther to form a junction, the resultant energy band diagram appears as shown in the Figure 11. It can be observed that, discontinuities in the conduc tion and valence bands are a re sult of different bandgaps and electron affinities. These discontinuities, whic h act as barriers, impe de the current flow. Hence, an appropriate junction pa rtner for the absorber layer mu st be chosen such that the discontinuities are minimized. 15

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Figure 11 Energy Band Diagram of a He terojunctionAdopted from [8] Both heterojunctions and homojuncti ons have their own advantages and disadvantages. Heterojunction devices suffer from the problems of lattice mismatch and differences in electron affinities resulting in interface states which act as recombination centers, whereas homojunctions are free from such problems. Heterojunctions are a solution in overcoming surface recombination problems faced in homojunction solar cells. Use of direct band gap semic onductors helps in reducing costs. Enhanced short-wavelength spectral response, which le ads to an increase in short-circuit current densities, is an advantage that heterojunctions enjoy over homojunctions. 16

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CHAPTER 3 MATERIALS AND LITERATURE REVIEW 3.1 Materials 3.1.1 Tin Oxide as Transparent Conducting Oxide Transparent Conducting Oxides (TCOs) are used as front contacts in the heterojunction solar cells. As the name sugge sts, they are largel y transparent. For a material to be used as a TCO it should have a band gap greater than 3.0 eV for successful optical transmission [9]. It should also have high optic al transmission (> 90%). The two other optical mechanisms re lated to the TCO are absorption and reflection. As discussed earlier in chapte r-2, photons having energi es higher than the band gap are absorbed. Since TCOs are wide band gap semiconductors, such energies are in the UV region. In general, there are two pos sibilities of reflecti on: one is that the photon can be reflected from th e surface of the material and the second from the bulk of the material. In general these reflection losses have to be minimized. Different oxides used as TCOs for solar cells are In 2 O 2 Indium Tin Oxide (ITO), SnO 2 and ZnO etc. The present work uses SnO 2 It is to be noted that SnO 2 was used as the TCO layer in the fabrication of the CdTe/CdS solar cell that had a record efficiency of 15.8% [10]. SnO 2 has a tetragonal rutile structure. The unit cell consists of 2 tin atoms and 4 oxygen atoms. Each cation is at the cente r of six oxygen atoms forming a regular 17

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octahedron, and each oxygen atom is surrounded by three tin atoms forming an equilateral triangle. Conduction in SnO 2 is a result of oxygen vacancies. The use of fluorine as a dopant also increases the conductivity. SnO 2 used in the present work is in bilayer form, the bottom one being SnO 2 doped with fluorine and the top one being undoped. It has been shown that the incorporation of a high resistive la yer immediately after a low resistive layer improves th e device performance [11]. 3.1.2 CdS as Window Layer Although p-CdTe/TCO junctions with effi ciency > 10% have been demonstrated, these junctions are fundamenta lly inferior. A window layer, which is then introduced in the CdTe solar cells, simply put, is a tr ansparent conducting semiconductor material. The present work uses CdS as the window layer, which has n-type conductivity due to sulphur vacancies that act as donors. The n-type conductivity and band gap of 2.42 eV (ensuring transmission of la rge portion of VIS solar spectrum into CdTe) make it an excellent window layer. It is required that the CdS be c onductive, thin to allow high transmission and uniform to a void short circuit effects [12]. It has been shown that asdeposited CdS is highly resistive of the order of 10 6 -cm [8]. The resistivity can be decreased by annealing in H 2 (increases sulphur vacancies) and by dopant incorporation. On the other hand, annealing in O 2 increases the film density, reduces sulphur vacancies, and thus increases resistivity [13]. 3.1.3 CdTe as Absorber Layer As the name implies, the absorber layer absorbs 90% of the solar spectrum in the CdS/CdTe heterojunction solar cells for th e generation of photocurrent. CdTe, a II-VI 18

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semiconductor, is used as the absorber laye r for the present study. It has a band gap of 1.44eV, a near ideal requireme nt of 1.5 eV for the maximum conversion efficiency of solar cells [14]. Electron affi nity of CdTe is 4.2eV which results in discontinuities (discussed in earlier chapter) in the conduction band of the CdS/CdTe heterojunction. CdTe can be doped both p and n. The p-CdTe used for the present work has its ptype conductivity because of internal cadmium vacancies, which act as acceptors. For the maximum conversion efficiency to be obtained, it is required to form a low resistance contact to p-type CdTe. This is difficult because of its large work function of 5.8eV. Thus, a contact material with a work function greater than 5.9-6.0 eV is required. However, no metals have such a large work function. 3.2 Literature Review One of the issues with the conventional Cd Te device is that poly-CdS film has a bandgap of ~2.42eV which causes considerable absorption in the short-wavelength region. It is said that this absorption could lead to a current loss up to 7.5mA/cm 2 which is quite substantial considering that the maximum theoretical photocurrent for these devices is 30.5mA/cm 2 It has been shown that reduction in this J sc loss and, hence, increase in photocurrent can be achieved by decreasing the CdS thic kness [15]. However, V oc and FF decrease as the CdS thickness is reduced and it has been impractical to fabricate devices with CdS thicknesses less than 1000. One of the suspected reasons for this decrease in FF and V oc is the formation of TCO/CdTe micro junctions. These junctions are considered to be fundamentally inferior to the CdS/ CdTe heterojunctions. Hence, a significant challenge faced by the Cd Te research groups is to maintain high V oc s and FFs while utilizing thin CdS. The use of a high resistive (high) layer, also referred 19

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to as a buffer layer, at the front contact has been found to be an effective method [11]. Record efficiency (16.5%) cells, the highest to date, have been developed demonstrating the need for effective buffer layers and thin CdS [6]. Tin Oxide is the most common TCO used in CdTe/CdS solar cells. Its properties are critical to the solar ce ll performance, in particular, when CdS films of small thicknesses are utilized. Optical confinement at the front contact by the formation of textured TCOs is one of the provisions reported to cause an increase in J sc Textured TCOs are the films with increased roughness a nd grain-size. It has been demonstrated that an appropriately rough tin oxide film induces light trapping and it has become common practice to introduce this effect to improve the efficiency of most of the hydrogenated amorphous silicon (a-Si:H ) based solar cells. The idea of light trapping in a semiconductor device was proposed for the first time in 1968 [16]. 3.2.1 Qualitative Description of Light-Trapping Phenomenon It is said that amorphous Silicon based so lar cells have relativ ely poor QE in the red region and hence light trapping offers a mechanism by which the absorption of red light in the intrinsic a-Si:H layer is increased [17]. Figure 12 Light Trapping Phenomenon 20

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The light-trapping effect is evident in figure 12, which is a schematic crosssection of a solar cell grown on a rough tin oxide film. After passing through the SnO 2 the incident red light strikes the rough inte rface with the silicon, gets scattered at a distribution of angles, and impinges upon the b ack reflecting contact. Since the interface at the back contact is also r ough, the light gets reflected back diffusely. Some of the light that is reflected at the rear and scattered at angles greater than the critical angle will undergo total internal reflection at the SnO 2 /a-Si:H interface and so makes multiple passes through the silicon active layer. As a result, the effective path-length of the diffusely scattered light is increased and, hen ce, more of it is abso rbed. It is concluded that slightly rough surfa ce structures for the front electrod e give rise to solar cells with improved efficiency, and very rough films are prone to introduce shunting which degrades the cell performance. It was also observed that tin oxide films with increased roughness tend to produce cells wi th lower overall reflection losses. In another study, the surface of the SnO 2 film was found to have a close rela tion with the conversion efficiency of a-Si:H solar cel ls prepared on SnO 2 /glass substrates [18]. Figure 13 shows the evidence of this relation reported in this work. It can be observed that as the grain size increases, conversion efficien cy is increased while the V oc slightly decreases. J sc shows the most significant increase. Figure 14 proves that this increase in J sc is a result of a decrease in the specular reflectivity meas ured from the glass side of the cell. 21

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Figure 13 Effect of SnO 2 Grain Size Figure 14 Specular Reflectivity vs. J sc Figure 15 shows the transmittance spectra (total and diffused) as a function of wavelength in the range 400-800nm for three SnO 2 :F films deposited at different substrate temperatures by APCVD [19]. Cu rves a and c refer to fluorine doped SnO 2 deposited at 550 o C, b and e at 450 o C whereas curves c and f refer to undoped SnO 2 deposited at 400 o C. It can be observed that as the substrate temperature increases, the total and diffuse transmittance increase. For th e best transparent film (655nm thick) the 22

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average total transmittance reaches 94% and the average diffused transmittance is 24%. Figure 15 Transmission Spectra of SnO 2 Films Deposited by APCVD Figure 16 Transmission Spectra of 0.6 m Thick CdTe Layer Textured SnO 2 :F has been used as transparent electrode for less than 1 m thick CdTe solar cells to increase the incident light c onfinement and thus to achieve high conversion efficiency [20]. Solar cells with conversion efficiencies of 10.1%, 11.2% and 10.1% with SnO 2 :F haze ratios of 37%, 11% and 3% have been fabricated with a 90nm thick CdS layer and a 1 m thick CdTe absorber layer. Figure 16 shows the transmission spectra of 0.6 m thick layers on different TCOs as an example of optical confinement. The apparent decrease of transmission in the ra nge of 500-800nm is due to increased light 23

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scattering as the roughness of SnO 2 :F increased. It is reported that the values of optical transmission loss remain below 5% in the case of textured tin oxides. The effective optical confinement at the front contact results in higher absorption of the incident light. This is shown by the increase in QE between 500-800nm as shown in Figure 17. Figure 17 Spectral Response and Reflectance of CdTe Cells with Different Textured TCOs In an attempt to optimize CdS thickness it was observed that SnO 2 :F with haze ratios of 11% and 3% showed similar trends with respect to CdS thickness, whereas the performance of SnO 2 :F with 37% haze ratio showed de terioration below CdS thickness of 80nm. It is therefore suggeste d that CdS should be thicker in the case of r ougher films to contribute to V oc and J sc In the case of CdS/CdTe solar cells, the TCO (SnO 2 :F) properties have a greater influence on device performance [21] when the thickness of the CdS window layer is reduced (typically less than 1000). Figure 18 shows the SR of two cells exhibiting the characteristic of J sc -V oc /FF trade off. The Voc and FF for the cells with relatively thick 24

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and thin CdS were 844 and 820mV and 72% and 65% respectively. It is reported, in this work, that this J sc -V oc /FF trade off associated with Cd Te devices was minimized as the SnO 2 roughness/grain size increased. Figure 19 shows the 3-D graphs in which V oc and FF were plotted as a function of QE @ 450nm and SnO 2 roughness. Figure 18 SR of CdTe Cells Fabricated with Thin and Thick CdTe Films Which Exhibit J sc -V oc Trade-Off Figure 19 3-D Graphs of V oc as a Function of the SnO 2 Roughness and QE @ 450nm 25

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Figure 20 3-D Graphs of FF as a Function of the SnO 2 Roughness and QE @ 450nm. It was concluded that devices exhibit a decrease in V oc and FF as the QE @ 450nm increases, however this decrease is not substantial as the rou ghness increases. Hence, it is said that the role of SnO 2 is important in particular when CdS is extremely thin. Efforts have also been made to characterize SnO 2 films with different roughness. Figure 21 Transmission of SnO 2 Films With Various Roughness 26

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Figure 21 shows the transmission of thes e films deposited at different substrate temperatures. It is said that the apparent de crease in transmission is due to an increase in film thickness. Figure 22 show s the SR of four devices fa bricated on substrates with different SnO 2 roughness. It can be observed that the QE @ 450nm increases as the roughness increases suggesting that the CdS gets consumed with an increase in SnO 2 roughness. However, it is also said that the or igin of thickness variation is not explained properly due to CdS thickness reproducibility issues and due to CdS consumption during cell fabrication processes. Figure 22 SR of CdTe Cells Fabricated on SnO 2 Substrates with Different Roughness 3.2.2 CdS Consumption A considerable amount of work has been done on the development of CdS/CdTe solar cells over the past decade. It has beco me usual practice to employ high temperature deposition conditions during CdTe growth an d post-deposition treatments. It has been shown that a considerable amount of CdS is consumed during these two processes due to intermixing at the CdS/CdTe interface. It is, therefore, suggested that improved 27

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performance can be achieved by fabricating cells with relatively larger initial CdS thickness and promoting interdiffusion a nd thinning of the CdS layer using high temperatures during fabrication of the cell [23]. However, as it is known, there is a process dependent maximum limit to which Cd S can be thinned because very thin CdS films can adversely impact the device V oc and FF. Thus, in order to fabricate efficient CdS/CdTe solar cells it is necessary to optimize initial CdS thickness and high temperature treatments employed during the fabrication process. 3.2.2.1 CdS/CdTe Intermixing It has been shown that interdiffusion at th e CdS/CdTe interface (one of the critical device regions) forms a sulphur-rich CdTe y S 1-y and a Te-rich CdS x Te 1-x [2]. The stable crystallographic forms of the solid alloys are a zincblende structure for the Te-rich CdTe 1-x S x and a wurtzite structure for S-rich CdS 1-y Te y The compositional dependence of the CdTe 1-x S x bandgap is described by E g = 2.40x + 1.51(1-x) bx (1-x) where the bowing parameter b=1.8 [2, 23]. The reduced QE between 520nm and 580nm shown in Figure 23 [24] is attributed to Te diffusion into CdS, and the formation of CdS 1-y Te y alloy on the S-rich side of the junction reduces the bandgap and increases absorption. This effect is suppressed by annealing the CdS film prior to CdTe deposition to reduce crystallographic defects in the CdS. The ex tension of QE by 10 to 20 nm into the NIR region is attributed to sulphur diffusi on into CdTe, and the formation of CdS x Te 1-x alloy on the Te-rich side of the junction reduces the absorber layer bandgap due to the relatively large optical band bowing parameter of the CdTe-CdS alloy system. Overall, this has little effect on QE since the increa se in long wavelength QE typically increases photocurrent by ~0.5mA/cm 2 Other significant effects of alloy formation include 28

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spatially non-uniform consumption of CdS, penetration of CdS into CdTe film grain boundaries and the relaxati on of lattice strain between CdTe and CdS. Figure 23 SR of Cells With Different CdS Thicknesses The intermixing of CdS and CdTe is accelerated by CdCl 2 and O 2 chemical activity during post-deposition treatment, a necessary step in achieving higher efficiencies. At low junction temperatures the interaction between CdTe and CdS is minimal. Thus, CdCl 2 heat treatment is necessary to cause interdiffusion at the junctions formed at lower temperatures (~400 o C) [25]. The extent of the alloyed CdS x Te 1-x region has been the subject of previous studies by the NREL group [26] EDS analysis was performed on samples deposited at 425 o C and 625 o C with no heat treatment. 29

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Figure 24 EDS Analysis of Sample Deposited at 450 o C Cd, Te and S were analyzed and plotted as a function of position. Figure 24 shows such analysis for the sample deposited at 425 o C. Only small amounts of sulfur were detected in the CdTe films in the vicinity of the in terface. On the other hand, EDS analysis of CdTe films deposited at 625 o C (shown in Table 2) showed sulfur levels exceeding 10%. Table 2 EDS Analysis of CdTe Deposited at 625 o C Near interface 1.5um away Cd 51.45 % 52.29 % Te 38.31 % 46.65 % S 10.24 % 1.05 % Further interdiffusion occurs during the postdeposition heat treatments. However, the rate at which the CdS/CdTe solar cells conve rge on the alloyed structure will depend on factors such as S diffusion in CdTe and Te diffusion in CdS, which in turn depend upon deposition techniques and paramete rs like temperature and time. It is revealed that the grain boundaries and intragrain defects in Cd Te act as active non-radiative recombination sites. The CdCl 2 treatment lowers the recombination efficiency of these grain boundaries and intragrain defects, which clearly indicates the passivating effect of CdCl 2 treatment. Figure 25 shows the Cathodoluminescence (CL) linescan (performed to estimate carrier 30

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recombination efficiency at defect sites) superimposed on an SEM image. It can be concluded from the images that the CdCl 2 treatment results in a factor of two reduction in the recombination efficiency at grain boundaries and at intragrain defects. (a) (b) Figure 25 CL Linescan Superimposed on SEM Images (a) As-deposited CdTe (b) After CdCl 2 Treatment The other effects of CdCl 2 treatment on the structural properties of CdTe films include recrystallization, grain growth, and reduction in stress. It is reported that for these effects to take place, it is necessary that there is enough lat tice-strain energy in the film 31

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[27]. Hence, PVD deposited films treated at 400 o C showed complete recrystallization and grain growth while CSS deposited CdTe films did not. It is also reported that recrystallized cells have an increased shortcircuit current and an increased open-circuit voltage [28]. 3.2.3 Issues Regarding Thin-Film CdTe/CdS Devices For laboratory research, the key issues are reducing V oc sensitivity to window layer configuration and formi ng low resistance contacts to CdTe [29]. Even though the poly-CdS film has been used commonly as a wi ndow material, there are three main issues associated with it that limit the device performance. They are CdS 1-y Te y alloy with lower bandgap aff ects device performance [30] Poly-CdS has a bandgap of ~2.42eV cau sing considerable absorption in the short wavelength region. There is a nearly 10% lattice mismat ch between poly-CdTe and poly-CdS films which causes high defect density at the junction region. A novel window material, oxygenated nano -crystalline CdS (nano-CdS:O), is developed which is stated to have higher opt ical bandgap (2.5-3.1eV) than poly-CdS film and has a nano-structure. It is said that the use of this nano-CdS:O can significantly suppress Te diffusion into CdS [6]. Convers ion efficiency of 16.5% was achieved, the highest for CdS/CdTe reported to date. 32

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CHAPTER 4 EXPERIMENTAL DETAILS 4.1 Tin Oxide Tin oxide is deposited in the form of a bilayer onto a 7059 glass substrate by the MOCVD technique. The bottom layer is fluorine doped SnO 2 and the top one is undoped SnO 2 Figure 16 shows the MOCVD setup used in this work. It consists of Bubblers for the storage of the organometallic sources Quartz reactor containing graphite susceptor RF coils which derive the power fro m an RF power unit (not shown in figure) to heat the susceptor Mass flow controllers to control the gas flow. Figure 26 MOCVD Setup for SnO 2 Deposition Adopted From Ref [32] 33

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The glass substrates are first cleaned in dilute HF solution, then rinsed with DI water and blown dry with N 2 The samples are then loaded onto the graphite susceptor. High purity He (the carrier gas) is passed through the reactor mixed with O 2 and 13B1 (Halocarbon used as a source for fluorine). TMT is used as the source for Sn. The parameters involved in this process that control the deposition rate are substrate te mperature, oxygen flow rate, fluorine flow rate and partial pressure of gases. 4.2 CdS Several techniques that can be used for the deposition of the CdS layer are close spaced sublimation (CSS), vacuum evaporat ion, sputtering, chemical bath deposition (CBD), etc. The present work uses CBD t echnique. Some of the advantages of this process are uniform deposition, simplicity and low cost. A drawback is the generation of liquid Cd waste. As shown in Figure 17, the setup consists of a double walled beaker and a heating source that heats a solution which flows around the bath and heats the solution inside the beaker. The temperature is read directly by the thermometer immersed in the solution. The SnO 2 deposited samples are immersed in the beaker containing water at 85 o C 90 o C and the measured amounts of reactan ts are added every 10 minutes for required amount of time .The reactants used are Cadmium acetate (source for cadmium) Thiourea (source for Sulphur) Ammonium acetate Ammonium hydroxide. 34

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Figure 27 CBD Setup for CdS Deposi tion Adopted From Ref [32] 4.3 CdTe CdTe films, in this work, are deposited by Close Spaced Sublimation (CSS) technique. Figure 18 shows the setup in which a quartz tube is used as a reactor. The source and the substrate are separated by 1-2 mm thick quartz spacers. Both substrate and source holders are supported insi de the reactor with the help of quartz rods. Heating of the source and the substrate is provided by 2 kW halogen lamps. K-type thermocouples are used to measure the temperature of the graphite. Heating is controlled by a temperature controller and a so lid state relay. Powdered Cd Te of 99.999% purity is used to deposit a film approximately 300m thick on a 7059 glass substrate which serves as a source for subsequent CdTe depositions on CdS/SnO 2 :F/7059 glass substrates. 35

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Figure 28 CSS Setup for CdTe Depo sition Adopted From [32] The first step in the deposition of CdTe is pumping down the chamber to 0.5 Torr using Varian DS-402 vacuum pump. The Cham ber is then backfilled with H 2 Annealing of CdS is then done in the presence of H 2 at 390 o C for 10 min. The chamber is next purged with He for 3 times, the CdTe is deposited in the presence O 2 and He at the required substrate and source temperat ures. The thickness of the film s deposited varies from 5m to 8m depending on the deposition time. Para meters affecting the growth rate are substrate and source temperatur es, partial pressure of the ambient and the distance between the source and the substrate. 4.4 CdCl 2 Treatment CdCl 2 treatment involves deposition of CdCl 2 by evaporation and annealing at different temperatures in the presence of He and O 2 ambient. The substrates are loaded into an evaporation chamber. Prior to the deposition, the chamber is pumped down to 10 -5 Torr. Evaporation is started after reaching this pressure, and ~8000 of CdCl 2 is deposited. These substrates are then transf erred to another chamber where they are annealed in the presence of He and O 2 for a specific amount of time at required temperature. 36

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4.5 Contacting The CdCl 2 treated samples are first rinsed with methanol to remove the excess CdCl 2 and are then etched in bromine-methanol solution. The chemical etch is followed by the application of polyimide tapes (which define the cell areas) and graphite mixed with HgTe:Cu. After allowing the samples to air dry, they are annealed at 270 o C in He ambient for 25 min. A thin layer of silver is then applied on the cells. After annealing the tapes are removed and the CdTe around the cells is scribed off. Indium is applied to the SnO 2 : F surface exposed by the scribe. The complete structure of the CdS/CdTe solar cell thus fabricated is shown in Figure 30. Figure 29 Device Configuration of CdS/CdTe Solar Cell 4.6 Solar Cell Measurements Dark and light J-V measurements are done using a setup which consists of lamps to shine light on the device, which simulates AM1.5 conditions, and a source meter (Keithley 2410) interfaced to a computer. A Labview program runs the source meter that sweeps the voltage across the de vice and measures the current measured for different values of applied voltage. The program allows storage these values, a nd it also calculates 37

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the device parameters. The cell characteristics are then plotted using the stored data. A Silicon detector is used to calibrate the light source. Spectral response setup cons ists of a GE Quartz lamp rated 400 W/120V, which is used as a light source, an Oriel 74100 monochromator, and a computer. The light from the lamp passes through the monochromator, which consists of different gratings and mirrors to produce spot of light containing sh ort range of wavelengt hs that is focused onto the device through a narrow slit. The Labview program controls the wavelength of light that is incident on the sample. Differe nt values of current are measured for the required spectrum of wavelengths, and the program stores the data. The data is then plotted to give the QE and J sc at all the wavelengths. Atomic force microscopy (AFM) measurements were done on a Scan Probe Microscope Dimension 3000. A cantilever, sp ecially constructed for surface structure investigation, is held with the help of a piezohead. This cantile ver does the scanning above the sample surface (non-contact scanning) and the change in the vertical position reflects the topogra phy of the surface. 38

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CHAPTER 5 RESULTS AND DISCUSION 5.1 Characterization of SnO 2 Films Tin Oxide with varying degrees of roughness is used as TCO in this work. AFM measurements are used to characterize thes e films. Table 3 lists the roughness (Ra) of three films A, B & C deposited at th ree different temperatures. The SnO 2 used in this work is a bilayer, and both the la yers of film A ar e deposited at 465 o C. For film B, the bottom layer is deposited at 465 o C and the top layer is deposited at 495 o C. For film C both the layers are deposited at 495 o C. Table 3 Variation in Roughness with Substrate Temperature Sample SnO 2 T dep [ o C] Roughness, Ra [nm] A 465 10.64 B 465/495 13.74 C 495 19.74 It is found that higher depos ition temperatures cause an increase in the roughness of the films. On a visual observati on of these films, it is seen that the films with higher roughness turned milky white in nature. Figures 30-32 show the AFM images of the SnO 2 with the roughness listed in table 3. 39

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Figure 30 AFM Image of SnO 2 Surface with Ra = 10.64nm Figure 31 AFM Image of SnO 2 Surface with Ra = 13.74nm 40

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Figure 32 AFM Image of SnO 2 Surface with Ra = 19.74nm For the following discussion it must be noted that efforts ha ve been made to increase J sc by increasing the spectral response of the de vice. This is done by controlling the CdS thickness either by 1) directly controlling the CdS deposition time, or 2) indirectly by controlling a) CdCl 2 heat treatment (HT): Annealing at hi gher temperatures results in increased consumption of CdS and hence thin ner CdS in the finished device. b) CdTe deposition temperature: Higher substrate temperatures lead to thinner CdS in the finished device. 41

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5.2 Effect of Roughness of SnO 2 Films A series of cells are fabricated with the SnO 2 roughness listed in table 3 and an initial CdS thickness of 1000. After the CdTe deposition at a substrate temperature of 580 o C, the samples are annealed at 390 o C, 400 o C, 405 o C and 410 o C in the presence of CdCl 2 This section discusses the effect of SnO 2 roughness coupled with CdCl 2 annealing temperature. The QE @ 450nm is used as a measure of CdS thickness in the finished device. Figures 33 and 34 show the average V oc and the FF as a function of CdCl 2 annealing temperature (T ann ) and SnO 2 Ra. Averages are based on four cells. For a given Ra, the V oc and the FF decrease as the CdCl 2 T ann increases. Ra=13.74 seems to improve V oc in particular when the CdS remained is thin. However, there seems to be no significant effect on the FF. 700 720 740 760 780 800 820 840 380385390395400405410415420CdCl2 Tann [oC]Voc [mV] Ra = 10.64nm Ra = 13.74nm Ra = 19.74nm Figure 33 Dependence of V oc on Ra and CdCl 2 T ann 42

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40 45 50 55 60 65 70 75 385390395400405410415 CdCl2 Tann [oC]FF [%] Ra = 10.64nm Ra = 13.74nm Ra = 19.74nm Figure 34 Dependence of FF on Ra and CdCl 2 T ann Figures 35, 36 and 37 show the spectral response of eac h device with Ra 10.64nm, 13.74nm and 19.74nm respectively, and th e annealing temperatures are shown in the legend. The parameters of each device are listed in tables 4-6. 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 400450500550600650700750800850900Wavelength [nm]QE 8-15-A24-a (390 C) 8-15-A24-c (400 C) 10-6-A15-a (410 C) 11-14-A7-d (405 C) Figure 35 SR Curves of the Cells with Ra=10.64nm 43

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0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 400450500550600650700750800850900Wavelength [nm]QE 8-15-A23-a (390) 18-15-a23-c (400) 10-6-A18-b (410) 11-14-A10-b (405) Figure 36 SR Curves of the Cells with Ra=13.74nm 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 400450500550600650700750800850900Wavelength [nm]QE 10-6-A2-a (390 C) 10-6-A2-a (400 C) 10-6-A17-b (410 C) 11-14-A9-a (405 C) Figure 37 SR Curves of the Cells with Ra=19.74nm Table 4 Parameters of Cells with SnO 2 Ra=10.64nm Substrate # CdCl 2 T ann [ o C] V oc [mV] FF [%] J sc [mA/cm 2 ] QE@ 450nm 8-15-A24-a 390 830 68.4 22.49 0.42 8-15-A24-c 400 830 65.6 21.4 0.46 11-14-A7-d 405 740 59.7 23.79 0.68 10-6-A15-a 410 730 54.8 24.07 0.73 44

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Table 5 Parameters of Cells with SnO 2 Ra=13.74nm Substrate # CdCl 2 T ann [ o C] V oc [mV] FF [%] J sc [mA/cm 2 ] QE@ 450nm 8-15-A23-a 390 810 69.2 21.14 0.38 8-15-A23-c 400 830 69.6 21.15 0.39 11-14-A10-b 405 800 56.9 24.29 0.72 10-6-A18-b 410 810 59.1 23.98 0.8 Table 6 Parameters of Cells with SnO 2 Ra=19.74nm Substrate # CdCl 2 T ann [ o C] V oc [mV] FF [%] J sc [mA/cm 2 ] QE@ 450nm 10-6-A2-a 390 810 67.2 20.6 0.35 10-6-A2-a 400 830 68.9 20.32 0.35 11-14-A9-a 405 760 62.0 23.57 0.68 10-6-A17-b 410 750 51.1 23.14 0.69 5.2.1 Device Analysis For Ra = 10.64nm, the CdS is used up considerably, and possibly entirely consumed as expected, leading to lower V oc and FF at the two highest annealing temperatures (405 o C and 410 o C). This indicates degradation in the junction properties as CdS is thinned. The consistent decrease in shunt resistances shown in table 7 is believed to affect the device performance. However, the light J-V characteri stics shown in figure 38 suggest that this effect is small. The se ries resistances appear to be decreasing by a small amount for the devices annealed at hi gher temperatures. It can be observed from the response in the fourth quadrant that samples with higher annealing temperatures 45

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suffered from poor collection (discussed in section 5.2.2.1). This can be a part of the reason for the decrease in the performa nce of the devices annealed at higher temperatures. Table 7 Shunt and Series Resistances for Ra = 10.64nm CdCl 2 T ann [ o C] R sh [ -cm 2 ] R s [ -cm 2 ] 390 1266 2.5 405 805 1.92 410 763 2.3 -0.025 0 0.025 0.05 0.075 -0.250.250.751.25 Voltage [V]Current density [A/cm2] 390 405 410 Figure 38 Light JV Characteristics of Cells with Ra = 10.64nm 46

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1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 00.250.50.7511.251.5Voltage [V]Current density [A/cm2] 390 410 405 b Figure 39 Dark J-V Characteristics of Cells with Ra = 10.64nm Figure 39 shows the dark J-V data for these de vices. Based on this it can be said that the lower V oc s for the devices annealed at higher temperatures are due to higher dark currents. When Ra is increased to 13.74nm, V oc s increased primarily for the two higher annealing temperatures. However, there is li ttle effect on FFs. This increase in V oc can be explained as a result of the decrease in the dark current (see figure 40). 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 00.250.50.7511.251.5 Voltage [V]Current density [A/cm2] 10.64 13.74 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 00.250.50.7511.251.5 Voltage [V]Current density [A/cm2] 10.64 13.74 a b Figure 40 Dark J-V Charac teristics of Cells Annealed at a) 405 o C b) 410 o C 47

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Figure 41 shows the light J-V characteristics of the devices annealed at 390 o C, 405 o C, 410 o C. Again, the devices annealed at the two higher annealing conditions seem to be affected by inefficient colle ction (explained in secti on 5.2.1.1). -0.025 0 0.025 0.05 0.075 0.1 -0.2500.250.50.7511.25Voltage [V]Current density [A/cm2] 390 405 410 Figure 41 Light J-V Data for Cells with Ra = 13.74nm Table 8 Shunt and Series Resistances for Ra = 13.74nm CdCl 2 T ann [ o C] R sh [ -cm 2 ] R s [ -cm 2 ] 390 1458 2.247 405 944 1.485 410 1011 1.9084 The shunt resistance data shown in table 8 appears to have improved from previous set. It is not known at this moment what caused this The series resistance decreased for the two higher annealing temperatures. However, this decrease in series resistance does not seem to be affecting the device performance. 48

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5.2.1.1 Collection As discussed in the previous section, the devices fabricated at higher annealing temperatures suffered from poor collection in addition to lower V oc s and FFs. In order to discuss this issue, monochromatic J-V measurements were performed for four wavelengths (460nm, 520nm, 640nm and 700nm) Figures 43 and 44 show the J-V data for two devices with roughness of 10.64nm a nd 13.74nm that have the same annealing temperature (390 o C). The plots of FF dependence on wavelength are shown in figure 42. The dotted lines show the white light FF of the devices. In bo th cases, FFs are decreasing with wavelength indicating that the collection for deep carriers is not efficient. For the cell with Ra of 10.64nm the decrease in the FF at two long wavelengt hs when compared to the device with Ra of 13.74nm is believed to be caused by a barrie r at the front contact (see figure 43) and this is unique as this is no t seen in any other devices fabricated during this work. This effect seems to be eliminat ed as the roughness is increased (figure 44). 50 55 60 65 70 75 80 400 500 600 700 800 Wavelength [nm]FF [%] 10.64 13.74 Figure 42 FF vs. Wavelength for Cells Annealed at 390 o C 49

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-1.5 -1 -0.5 0 0.5 1 -1 -0.5 0 0.5 1 Voltage [V]Normalized current 460nm 520nm 640nm 700nm Figure 43 Monochromatic J-V for Cells Annealed at 390 o C with Ra=10.64nm -1.5 -1 -0.5 0 0.5 1 -1 -0.5 0 0.5 1 Voltage [V]Normalised current 460nm 520nm 640nm 700nm Figure 44 Monochromatic J-V for Cells Annealed at 390 o C with Ra = 13.74nm Monochromatic light J-V measurements were also performed on the cells annealed at 410 o C. Figure 45 shows the data in each case of roughness. For the device with Ra of 10.64nm (see figure a) it can be observed that the FF is almost constant with increase in the wavelength, but the white light FF for this device is much lower as shown by the dashed lines. The most likely reason can be given as increased recombination. For this 50

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device, when the roughness is increased to 13.74nm, it is found that the collection is improved for the two short wa velengths (see figure c) which improved the FF for these two wavelengths. This seems to be a part of the reason for improve ment in the device performance when the roughness is increased. 50 55 60 65 70 75 80 400500600700800 Wavelength [nm]FF [%] a -1.5 -1 -0.5 0 0.5 1 -1-0.500.51Voltage [V]Normalised current 460nm 520nm 640nm 700nm -1.5 -1 -0.5 0 0.5 1 -1-0.500.51 Voltage [V]Normalised current 460nm 520nm 640nm 700nm b c Figure 45 a) FF vs. Wavelength for the Cells Annealed at 410 o C; Monochromatic J-V data for cells annealed at 410 o C with Ra of b) 10.64nm c) 13.74nm When Ra is further incr eased to 19.74nm, the V oc and FF for the device annealed at the highest temperature (410 o C) decreased. Dark J-V data shown in figure 47 clearly explains that the decrease in V oc is due to higher dark current. Table 9 shows the shunt 51

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resistance data for each annealing condition. It can be observed that there is a decrease in the shunt resistance as the ann ealing temperature increases, wh ich can be given as a part reason for the decrease in device performance. However, this shunting effect is not seen clearly from the light J-V data for the same devices (see figure 46). Table 9 Shunt and Series Resistances for Ra = 19.74nm CdCl 2 Tann [ o C] R sh [ -cm 2 ] R s [ -cm 2 ] 390 1520 1.947 405 740 1.947 410 830 2.051 -0.025 0 0.025 0.05 0.075 0.1 -0.5-0.2500.250.50.7511.25Voltage [V]Current density [A/cm2] 390 405 410 Figure 46 Light J-V Data of Cells with Ra = 19.74nm 52

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1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 00.250.50.7511.251.5 Voltage [V]Current density [A/cm2] 13.74 19.74 Figure 47 Dark J-V Data for Cells Annealed at 410 o C Based on the above analysis the following conclusions can be made The CdS is consumed considerably, and possibly entirely, leading to thin CdS at the two highest annealing temperatures as expected (see figures 35-37). In general the V oc and the FF decrease while J sc increases, as the annealing temperature increases. As the roughness is increased to 13.74nm (s ee table 5), there is an increase in V oc for the samples annealed at the two higher annealing temperatures i.e., increased Ra seems to improve V oc for thin CdS. Hence it can be concluded that cells fabricated with increased roughness of SnO 2 can tolerate thinner CdS. Further increase in roughness to 19.74nm leads to a decrease in V oc and FF in the case of samples annealed at the highest temperature (see table 6). Hence it can be concluded that when CdS is thin certain amount of roughness appe ars to be critical. However, a further increase in roughness a ppears to deteriorate cell performance indicating that there exis ts an optimum roughness. Since Ra = 13.74nm is found to be optimum, it is chosen for further work. The following devices discuss the performance when 53

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the CdCl 2 HT time was reduced to 15 min at 405 o C while the CdTe T sub is 580 o C. the CdCl 2 HT time was reduced to 15 min at 405 o C while the CdTe T sub is increased to 600 o C. Table 10 shows performance characteristics of the cells. It can be seen that the V oc and FF increased for the sample 1-8-A8c, when compared to the cell annealed at 405 o C for 25mins (shown previous ly in table 5). The V oc is increased by 20 mV and the FF is higher by 10%; the J sc is decreased by 0.4mA/cm 2 Table 10 Effect of Annealing Time and CdTe Substrate Temperature Substrate # CdCl 2 T ann /time CdTe T sub V oc [mV] FF [%] J sc [mA/cm 2 ] [%] QE @ 450 nm 1-8-A8-c 405 o C/ 15min 580 o C 820 66.8 23.81 12.60 0.61 1-8-A12-c 405 o C/ 15min 600 o C 790 63.8 24.27 11.22 0.7 11-14-A10-b (from table5) 405 o C/ 25min 580 o C 800 56.9 24.29 11.56 0.72 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 400450500550600650700750800850900Wavelength [nm]QE 1-8-A8-c 1-8-A12-c Figure 48 SR Curves of the Cells Pr ocessed Under Conditions Listed in Table 11 54

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1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 00.250.50.7511.251.5 Voltage [V]Current density [A/cm2] 1-8-A8-c 1-8-A12-c Figure 49 Dark J-V of the Cells Pro cessed Under Conditions Listed in Table 11 This result clearly suggests that decreasing annealing time results in thick CdS (see figure 48), which increases the cell performance. Increasing the CdTe deposition temperature to 600 o C resulted in an increase in J sc while the V oc and the FF decreased. It seems that the CdS that remained in this de vice is thinner than the optimum, which leads to a decrease in the device performance. Figure 49 suggests that the dark current increased when the CdTe substrate temperature was increased to 600 o C affecting the junction properties. 5.3 Effect of Increased Starting CdS Thickness To better understand the effect of CdS thickness, thicker CdS (1100) is deposited initially on SnO 2 The high temperature treatm ent conditions and the cell parameters are listed in table 11. 55

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Table 11 Effect of Increased CdS Thickness Substrate # CdTe T sub CdCl 2 T ann /time V oc [mV] FF [%] J sc [mA/cm 2 ] [%] QE @ 450 nm 3-12-A6-b 580 o C 405 o C / 15min 830 69.8 23.08 13.37 0.51 8-15-A24-a (fromtable 4) 580 o C 390 o C / 25min 830 68.4 22.49 12.7 0.32 The V oc and the FF improved by depositing thicker CdS initially while J sc decreased by 0.73mA/cm 2 as expected. In fact, the efficiency of this device is higher when compared to that of cell 8-15-A24-a (V oc : 830mV, FF: 68.4%, J sc : 22.49mA/cm 2 : 12.7%), which was the highest of all the devices, discussed pr eviously. This increase in efficiency is achieved by depositing thicker CdS initially on SnO 2 films with increased roughness. It can, therefore, be concluded that improved performance can be achieved by fabricating cells with CdS films of larger initial th ickness on increased roughness of SnO 2 and promoting interdiffusion by thinning the CdS layer using high temperature treatments during the fabrication process. Figure 50 show s the light J-V curves of the cells. The SR curves are shown in Figure 51. -0.03 -0.01 0.01 0.03 0.05 0.07 0.09 -0.5-0.2500.250.50.7511.251.5 Voltage [V]Current density [mA/cm2] 8-15-A24-a 3-12-A6-b Figure 50 J-V Curves of Two High Efficiency Cells 56

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0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 400450500550600650700750800850900wavelength [nm]Q.E. 8-15-A24-a 3-12-A6-b Figure 51 SR Curves of Two High Efficiency Cells 5.3.1 Comparison of cells with same spectral response In the process of fabricating the above devices we achieved the same spectral response at all wavelengths (see figure 52) for two cells that differ in initial CdS thickness and post deposition heat treatments. Table 12 lists the conditions of the two cells. Table 13 shows the values of output parameters. Table 12 Summary of Processing Conditions of Cells With Same Spectral Response Substrate # V oc [mV] FF [%] J sc [mA/cm 2 ] [%] QE @ 450nm 1-8-A6-b 790 64.3 23.23 11.8 0.6 2-3-A11-b 760 61.3 22.77 10.61 0.59 Table 13 Parameters of Cells With Same Spectral Response Substrate # SnO 2 T dep Initial t CdS CdTe T sub CdCl 2 T ann /time 1-8-A6-b 465 o C 1000 580 o C 405 o C/15min 2-3-A11-b 465 o C 1100 600 o C 390 o C/25min 57

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0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 400450500550600650700750800850900wavelength [nm]Q.E. 1-8-A6-b 2-3-A11-b Figure 52 Comparison of Cells with Same Spectral Response When the CdS is thinned to the same extent by starting with larger thickness of CdS film, the performance of the device decreased. Hence, it can be concluded that 1000 thick CdS showed better performance than that with larger starting thickness when they are thinned to the same extent, which suggests that initial thickness is critical in improving the device performance. 58

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CHAPTER 6 CONCLUSIONS AND RECOMMENDATIONS The effect of SnO 2 roughness combined with CdS thickness on the performance of CdS/CdTe solar cells has been studied. Increased roughness of SnO 2 films has been found to improve V oc in particular when CdS is thin while the improvement in FF is not significant. This proves th at increased roughness of SnO 2 films can tolerate thin CdS. Further increase in roughness resulted in decreased performance suggesting that there exists an optimum roughness. Ra = 13.74nm was found to be optimum in this study. Solar cells were subjected to variation in CdS thickness and in each case different post-deposition heat treatment conditions were tried. It is revealed that for the same thickness of CdS, higher CdCl 2 annealing temperatures resulted in decreased V oc s and FFs. Spectral response observation reveals that almost all CdS is consumed at such high annealing temperatures leading to possible shun ts affecting the device performance. As a part of the work, solar cells with thicker starting CdS have also been fabricated. Improved device performance was achieve d by depositing thicker CdS films on increased roughness of SnO 2 films. Conversion efficiency of 13.37% was achieved by the combined application of rough SnO 2 and increased starting CdS thickness. On comparison of spectral response curves with the sa me response at all wavelengths, it can be concluded that the cells with 1000 Cd S starting thickness showed better output parameters than those w ith thicker initial CdS. It is recommended as 59

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a future work that solar cells with thin initial CdS (<1000 ) have to be fabricated and processed. Solar cells can also be fabricated with SnO 2 films of increased roughness but with the same thickness. This can be done by controlling the time of deposition. 60

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REFERENCES [1]D.M.Chapin, C.S.Fuller and G.L.Pear son, A New Silicon P-N Junction Photocell for Converting Solar Energy into Electrical Power, J.Appl.Phys. 25 (1954) 676. [2]McCandless, B.E.Sites, J.R., Handbook of Photovoltaic Scien ce and Engineering, John Wiley & Sons, Chichester, 2003. [3]D.A.Cusano, CdTe solar cells and P hotovoltaic Heterojunctions in II-VI Compounds, Solid State Electronics, 6(1963) 217. [4]E.I.Adirovich, Y.M.Yuabov and G.R.Yag udaev, Photoelectric Effects in Film Diodes with CdS-CdTe Heterojunctions, Sov.Phys. Semicond. 3 (1969) 61. [5]D.Bonnet and H.Robenhorst, IEEE PVSC, (1972) p.129. [6]Xuanzhi Wu, High Efficiency Polycrystalline CdTe Thin Film Solar Cells, Solar Energy 77 (2004) 803. [7]S.M.Sze, Physics of Semiconduc tor Devices, Wiley, Newyork, (1981). [8]Madan Raj Ramalingam, Masters Thesis Cadmium Zinc Tell uride Solar Cells by Close Spaced Sublimation, Univer sity of South Florida (2004). [9]R.Mamazza, Ternary Spinel Cd 2 SnO 4 CdInO 4 and ZnSnO 4 and Binary SnO 2 and In 2 O 3 Transparent Conducting Oxides as Front Contact Materials for CdS/CdTe Photovoltaic devices, Ph.D.D issertation, University of South Florida (2003). [10]C.S.Ferekides and J.Britt, Thin Film Cd S/CdTe Solar Cell with 15.8% Efficiency, Solar Energy Materials and Solar Cells 35 (1994) 255. 61

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[11]C.S.Ferekides, U.Balasubramanian, R.Mamazza, V.Viswanathan, H.Zhao, D.L.Morel, CdTe Thin Film Solar Cells: Device and Technology Issues, Solar Energy 77 (2004) 803. [12]K.Durose, P.R.Edwards, D.P.Halliday, M aterial Aspects of CdS/CdTe Solar Cells Journal of Crystal Growth 197 (1999) 733. [13]C.Ferekides, D.Marinskiy and D.L.Mo rel, CdS:Characterization and recent advances in CdTe solar cell performance, in: Proc. 26 th IEEE PVSC, Anaheim, CA (1997) p.339. [14]J.J.Loferski, Theoritical Considerati ons Governing the Choice of the Optimum Semiconductor for Photovoltaic Solar Energy Conversion, Journal of Applied Physics 27 (1956) 777. [15]J.E.Granata and J.E.Sites, Effect of CdS Thickness on CdS/CdTe Quantum Efficiency, in: Proc. 25 th IEEE PVSC, (1996) p.853. [16]A.E.St.John, U.S.Patent No.3,487,223 (December 30, 1969). [17]R.G.Gorden and J.Proscia, Texture d Tin Oxide Films Produced by Atmospheric Pressure Chemical Vapor Deposition from Tetramethyltin and their Usefulness in Producing Light Trapping in Thin F ilm Amorphous Silicon Solar Cells, Solar Energy Materials 18 (1989) 263. [18]H.Iida, N.Shiba, T.Mishuku, H.Karasawa, A.Ito, M.Yamanaka and Y.Hayashi IEEE Electron Devices Letters, 4 (1983) 157. [19]H.L.Ma, D.H.Zhang, Y.P.Chen, S.Y.Li, J.Ma, F.J.Zong, Large Scale Fluorine Doped Textured Transparent Conducting SnO 2 Films Deposited by Atmospheric Pressure Chemical Vapor Deposition, Thin Solid Films 298 (1997) 151. [20]Nowshad Amin, Takayuki Isaka, Akira Ya mada, Makoto Konagai, High Efficiency 1 m Thick CdTe Solar Cells with Textured TCOs, Solar Energy Materials and Solar Cells 67 (2001) 195-201. 62

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[21]C.Ferekides, U.Poosarla, and D.L.Morel, The Effect of SnO 2 Roughness on the Properties of CdTe/CdS Solar Cells, in: Proc. 26 th IEEE PVSC, Anaheim, CA (1997) p.427. [22]C.S.Ferekides, B.Tetali, D.Marinskiy, S.Marinskaya and D.L.Morel, Effects of Processing Temperature on th e Thickness of CdS and the Pe rformance of CdTe Solar Cells, 14 th NREL/SNL PV Program Review, (1996) p.631. [23]Keichii Ohata, Junji Saraie and Tetsur o Tanaka, Optical Energy Gap of the Mixed Crystal CdS x Te 1-x Japanese Journal of Applied Physics 12 (1973) 10. [24]A.D.Compaan, J.R.Sites, R.W.Birkmi re, C.S.Ferekides and A.L.Farenbruch, Critical issues and research needs for CdTe based solar cells. [25]C.S.Ferekides, D.Marinskiy, V.Visw anathan, B.Tetali, V.Paleki, P.Selvaraj, D.L.Morel, High Efficieny CSS CdTe solar cells, Thin Solid Films 361-362 (2000) 520. [26]M.M.Al-Jassim, R.G.Dhere, K.M.Jones, F.S.Hasoon and P.Sheldon, The Morphology, Microstructure and Luminescent Properties of CdS/CdTe films, National Renewable Energy Labor atory, Golden, Colorado, (1998). [27]H.R.Moutinho, M.M.Al-Jas sim, F.A.Abulfotuh, D.H.Le vi, P.C.Dippo, R.G.Dhere, and L.L.Kazmerski, Studies of Recrysta llization of CdTe Thin Films after CdCl 2 Treatment, National Renewable Energy Laboratory, Golden, Colorado, (1997). [28]K.D.Rogers, D.A.Wood, J.D.Painter, D.W. Lane, M.E.Ozsan, Novel Depth Profiling in CdS-CdTe Thin Films, Thin Solid Films 361-362 (2000) 234. [29]Brian E. McCandless and Kevin D. D obson, Processing Options for CdTe Thin Film Solar Cells, Solar Energy 77 (2004) 839. [30]McCandless, B.E., Hegedus, S.S., Influ ence of CdS Window Layers on Thin Film CdS/CdTe Solar Cell Performance, in: Proc. 22 nd IEEE PVSC Las Vegas, NV (1991) p.967. 63

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[31]N.Romeo, A.Bosio, V.Vanevari, A.Podesta, Recent Progress on CdTe/CdS Solar Cells, Solar Energy 77 (2004) 795. [32]Umamaheswari Balasubramanian, Mast ers Thesis, Indium Oxide as High Resistivity Buffer Layer for CdTe/CdS Thin Film Solar Cells, University of South Florida (2004). 64