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System level energy optimization for location aware computing

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Title:
System level energy optimization for location aware computing
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Book
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English
Creator:
Sankaran, Hariharan
Publisher:
University of South Florida
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Tampa, Fla.
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Subjects

Subjects / Keywords:
GPS
Power dissipation
Codec
Dynamic power management
System modeling
Dissertations, Academic -- Computer Engineering -- Masters -- USF   ( lcsh )
Genre:
government publication (state, provincial, terriorial, dependent)   ( marcgt )
bibliography   ( marcgt )
theses   ( marcgt )
non-fiction   ( marcgt )

Notes

Summary:
ABSTRACT: We present an energy conscious location-aware computing system that provides relevant information about the users current location. The location-aware computing system is initialized with a map (in the form of a graph) as well as audio files associated with several locations in the map. The system consists of: GPS receiver module, Serial port, Compact flash module, Stereo codec, Power manager module implementing three sub modules namely, GPS-to-real-world position conversion module (implements algorithm to convert GPS co-ordinates to graph nodes), Nearest-location-search module (implements modified Dijkstras algorithm), and User speed estimation module. The location-aware computing system receives the GPS co-ordinates for the current location from GPS receiver through the serial port. The system converts the GPS co-ordinates to map co-ordinates stored in the Compact Flash card.If the current location matches the landmarks of interest in the site, then the relevant audio details of the current location is played out to the user. The power manager sets the GPS co-ordinates update frequency to avoid keeping the system component on throughout the entire course of travel. The power manager implements an algorithm that works as follows: at any given location, the algorithm predicts the user speed by exponential average approach. The attenuation factor of this approach can be varied to account for the user speed history. The estimated speed is used to predict the time (say T) required to reach the next nearest location determined by Nearest-location-search module implementing modified Dijkstras algorithm. The subsystems are shut-down or switched to low-power mode for time T. After time T, the system will wake up and re-execute the algorithm.
Thesis:
Thesis (M.S.C.P.)--University of South Florida, 2005.
Bibliography:
Includes bibliographical references.
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System Details:
Mode of access: World Wide Web.
Statement of Responsibility:
by Hariharan Sankaran.
General Note:
Title from PDF of title page.
General Note:
Document formatted into pages; contains 78 pages.

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aleph - 001709556
oclc - 69345823
usfldc doi - E14-SFE0001343
usfldc handle - e14.1343
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SFS0025664:00001


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ABSTRACT: We present an energy conscious location-aware computing system that provides relevant information about the users current location. The location-aware computing system is initialized with a map (in the form of a graph) as well as audio files associated with several locations in the map. The system consists of: GPS receiver module, Serial port, Compact flash module, Stereo codec, Power manager module implementing three sub modules namely, GPS-to-real-world position conversion module (implements algorithm to convert GPS co-ordinates to graph nodes), Nearest-location-search module (implements modified Dijkstras algorithm), and User speed estimation module. The location-aware computing system receives the GPS co-ordinates for the current location from GPS receiver through the serial port. The system converts the GPS co-ordinates to map co-ordinates stored in the Compact Flash card.If the current location matches the landmarks of interest in the site, then the relevant audio details of the current location is played out to the user. The power manager sets the GPS co-ordinates update frequency to avoid keeping the system component on throughout the entire course of travel. The power manager implements an algorithm that works as follows: at any given location, the algorithm predicts the user speed by exponential average approach. The attenuation factor of this approach can be varied to account for the user speed history. The estimated speed is used to predict the time (say T) required to reach the next nearest location determined by Nearest-location-search module implementing modified Dijkstras algorithm. The subsystems are shut-down or switched to low-power mode for time T. After time T, the system will wake up and re-execute the algorithm.
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System Le v el Ener gy Optimization for Location A w are Computing by Hariharan Sankaran A thesis submitted in partial fulllment of the requirements for the de gree of Master of Science in Computer Engineering Department of Computer Science and Engineering Colle ge of Engineering Uni v ersity of South Florida Major Professor: Srini v as Katk oori, Ph.D. Nagarajan Ranganathan, Ph.D. Soontae Kim, Ph.D. Date of Appro v al: February 18, 2005 K e yw ords: GPS, Po wer dissipation, Codec, Dynamic po wer management, System modeling cCop yright 2005, Hariharan Sankaran

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DEDICA TION T o Krishna Chaitan ya, Nityananda, Sri Adv aita, Gadadhara, and Sri v asa.

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A CKNO WLEDGEMENTS I w ould lik e to thank Dr Srini v as Katk oori for his continuous support and encouragement throughout the course of the research. I w ould lik e to thank my committee members Dr Nagarajan Ranganathan and Dr Soonate Kim. I also con v e y my thanks to Daniel Prieto and his technical support staf f for e xtending their helping hands whene v er needed. I thank my parents and my sister for helping me in my quest to pursue Master' s de gree. I thank all my friends in the VCAPP group and outside, who ha v e encouraged and pro vided help in accomplishing this task.

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T ABLE OF CONTENTS LIST OF T ABLES iii LIST OF FIGURES i v ABSTRA CT vi CHAPTER 1 INTR ODUCTION 1 1.1 Location-a w are Computing 2 1.2 Challenges in Design of Location-a w are Computing System 3 1.3 Po wer Optimization: System Le v el vs T raditional Approach 4 1.3.1 T raditional Approach to Po wer Optimization 5 1.3.2 System-Le v el Approach to Po wer Optimization 7 1.4 Proposed Ener gy Conscious Location-a w are Computing System 9 CHAPTER 2 RELA TED W ORK 10 2.1 Location-a w are Mobile Computing Machines 10 2.1.1 Cyber guide: A Mobile Conte xt A w are T our Guide 10 2.1.2 Conte xt-a w are Electronic City T our Guide 11 2.1.3 Metronaut: A W earable Computer 12 2.1.4 Acti v e Badge Location System 13 2.1.5 W earable Remembrance Agent 13 2.1.6 Location-a w are Information Deli v ery with comMotion 14 2.1.7 Drishti: Na vigation System for V isually Impaired and Disabled 15 2.2 System Le v el Po wer Management Policies 15 2.2.1 T ime-out 17 2.2.1.1 Static T ime-out Polic y 17 2.2.1.2 Adapti v e T ime-out Polic y 18 2.2.2 Predicti v e Polic y 19 2.2.2.1 Prediction by Re gression Analysis and L-shaped Polic y 21 2.2.2.2 Prediction by Exponential-a v erage Approach 22 2.2.2.3 Prediction Miss Correction 23 2.2.2.4 Pre-w ak eup 24 2.2.2.5 Prediction by Adapti v e Learning T ree 25 2.2.3 Stochastic Control Polic y 26 2.2.4 Share Algorithm 27 i

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CHAPTER 3 LOCA TION-A W ARE COMPUTING SYSTEM N A VIFIND 29 3.1 Ov ervie w of Proposed Location A w are Computing System 29 3.1.1 GPS Recei v er 31 3.1.2 Compact Flash Card 34 3.2 System Le v el Modeling of ASIC N A VIFIND 37 3.2.1 Serial Port U AR T 37 3.2.1.1 Clock Generation Problems in B A UD Rate Generator 39 3.2.1.2 Resynchronization of T ransmitter and Recei v er Clocks to Achie v e Ideal Baud Rate Setting 41 3.2.2 F A T16 File System Dri v er 42 3.2.2.1 The Boot Sector 43 3.2.2.2 Root Directory Structure 44 3.2.2.3 File Allocation T able 45 3.2.2.4 Summary of Operations to Access a File in Compact Flash Card 46 3.2.3 Compact Flash Interf ace and Local Memory 46 3.3 Po wer Manager 47 3.3.1 Ov ervie w of Proposed Po wer Management Algorithm 47 3.3.1.1 GPS-to-real-w orld Position Con v ersion Module 51 3.3.1.2 Nearest-location-searc h Module 53 3.3.1.3 User Speed Estimation Using EA Approach 54 CHAPTER 4 EXPERIMENT AL RESUL TS 55 4.1 Location A w are Computing System N A VIFIND 55 4.2 Synchronization Protocol in Serial Port 56 4.3 System Le v el Ener gy Optimization Polic y 58 CHAPTER 5 CONCLUSIONS AND FUTURE W ORK 66 REFERENCES 67 ii

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LIST OF T ABLES T able 3.1 GPS Recei v er Pin Conguration 33 T able 3.2 Po wer Consumption Information of RFMD GPS Recei v er 34 T able 3.3 A T A Re gister Set 35 T able 3.4 Compact Flash Card Pin Description 36 T able 3.5 Signal Conguration for Re gister Access in T rue IDE Mode 36 T able 3.6 Clock Generation Problems Af fecting the B A UD Rate Settings 40 T able 3.7 Structure of Boot Record 43 T able 3.8 32 Byte Directory Entry Structure 45 T able 4.1 Random Graph Information 60 T able 4.2 Comparison of Ener gy Sa vings for Proposed Algorithm and One Minute T ime-out Polic y for V ariable User Speed 62 T able 4.3 Comparison of Ener gy Sa vings for Proposed Algorithm and One Minute T ime-out Polic y for Constant User Speed 63 T able 4.4 Comparison of Ener gy Sa vings for Proposed Algorithm and One Second Updates W ith No Po wer Polic y for V ariable User Speed 64 T able 4.5 Comparison of Ener gy Sa vings for Proposed Algorithm v ersus System W ith No Po wer Polic y for Constant User Speed 65 iii

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LIST OF FIGURES Figure 1.1 De vice-le v el Lo w Po wer Design Flo w [13 ] 6 Figure 1.2 System-le v el Lo w Po wer Design Flo w [13 ] 8 Figure 2.1 T w o Contrasting Scenarios in Shutdo wn Prediction (a)(b)17 Figure 2.2 Simulation Results Comparing Ener gy Consumption and Bumps, for Adapti v e T ime-out and Fix ed T ime-out [22 ] 20 Figure 2.3 L-shaped Scatter Plot fornrrv ersus r[23 ] 22 Figure 2.4 Prediction Miss Correction Using W atch Dog Scheme 23 Figure 2.5 Pre-w ak eup Scheme 25 Figure 3.1 Control and Data Flo w in the Proposed Location-a w are Computing System 30 Figure 3.2 RFMD GPS Recei v er Block Diagram [29 ] 33 Figure 3.3 Sampling in U AR T Recei v er Control 39 Figure 3.4 B A UD Rate Generator 40 Figure 3.5 Structure of an Attrib ute Byte 44 Figure 3.6 Block-le v el V ie w of Po wer Manager 49 Figure 3.7 Pseudocode for GPS-to-real-w orld Position Con v ersion Algorithm 50 Figure 3.8 Example for Con v erting GPS Data to Real-w orld Data (a) Original Map (b) Equi v alent Graph Representation 52 Figure 3.9 Pseudocode for Nearest-location-sear ch Algorithm 52 Figure 4.1 Arithmetic Error Af fecting the Baud Rate Setting Between ASICN A VIFIND T ransmitter and RFMD GPS Recei v er 57 Figure 4.2 Arithmetic Error Af fecting the Baud Rate Setting Between ASICN A VIFIND Recei v er and RFMD GPS T ransmitter 58 i v

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Figure 4.3 Resynchronization of Local T rasnmitter Clock to Compensate for Baud Rate V ariation due to Arithmetic Error 59 Figure 4.4 Resynchronization of Local Recei v er Clock to Compensate for Baud Rate V ariation due to Arithmetic Error 59 v

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SYSTEM LEVEL ENERGY OPTIMIZA TION FOR LOCA TION A W ARE COMPUTING Hariharan Sankaran ABSTRA CT W e present an ener gy conscious location-awar e computing system that pro vides rele v ant infor mation about the user' s current location. The location-a w are computing system is initialized with a map (in the form of a graph) as well as audio les associated with se v eral locations in the map. The system consists of: GPS recei v er module, Serial port, Compact ash module, Stereo codec, Po wer manager module implementing three sub modules namely GPS-to-real-w orld position con v ersion module (implements algorithm to con v ert GPS co-ordinates to graph nodes), Nearest-locationsearch module (implements modied Dijkstra' s algorithm), and User speed estimation module. The location-awar e computing system recei v es the GPS co-ordinates for the current location from GPS recei v er through the serial port. The system con v erts the GPS co-ordinates to map co-ordinates stored in the Compact Flash card. If the current location matches the landmarks of interest in the site, then the rele v ant audio details of the current location is played out to the user The po wer manager sets the GPS co-ordinates update frequenc y to a v oid k eeping the system component ”on” throughout the entire course of tra v el. The po wer manager implements an algorithm that w orks as follo ws: at an y gi v en location, the algorithm predicts the user speed by e xponential a v erage approach. The attenuation f actor of this approach can be v aried to account for the user speed history The estimated speed is used to predict the time (say T) required to reach the ne xt nearest location determined by Nearest-location-searc h module implementing modied Dijkstra' s algorithm. The subsystems are shut-do wn or switched to lo w-po wer mode for time T After time T the system will w ak e up and re-e x ecute the algorithm. vi

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CHAPTER 1 INTR ODUCTION Ubiquitous computing technology is a paradigm shift from personal desktop computing era to a technology that is embedded in the user en vironment. Mark W eiser [1 ], considered as f ather of ubiquitous computing denes ubiquitous computing as a technology opposite to virtual reality V irtual reality technique creates an en vironment around the user and forces the user to li v e in that en vironment. On the other hand ubiquitous computing forces the computer to li v e in the user' s natural habitat. Ubiquitous computing is a natural progression of mobile computing research due to the adv ancements in the eld of mobile communications and computing po wer The communication allo ws the system to share information among dif ferent portable de vices lik e sharing the status, sensing user location, en vironment etc., to re v eal the conte xt in which the y are operating. Conte xt-a w areness is the force that dri v es the research of ubiquitous computing. Conte xt can be broadly classied into four cate gories [2 ][3 ]: 1. Computing conte xt, based on communication cost, resource a v ailability and netw ork a v ailability 2. User conte xt, based on user location, user prole, and people nearby 3. Physical conte xt, based on temperature, noise le v el, and lighting intensity 4. T ime conte xt, based on time of the day week, month or year Se v eral authors in literature ha v e proposed dif ferent denitions for conte xt. De y [4 ] dened conte xt as information that characterizes the situation of the entity (person, location, or object). Schmidt [5 ] dened conte xt as the user and de vice states, lik e surroundings, situation etc., Ubiquitous computing applications adapts itself to dif ferent conte xts pro viding tailored functionality based 1

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on the conte xt. F or e xample, a conte xt-a w are application b uilt in a cell-phone can turn itself to vibrate mode on reaching a mo vie theatre without an y user interv ention, or remind the user about the list of books to be pick ed up when he/she is in a library An important distinction between a mobile de vice such as PD A, laptop etc., and a ubiquitous computing de vice is, a mobile de vice require an user to operate them in order to e xtract service from them. In these traditional mobile de vices, the de vices are the center of focus instead of tasks that needs to be accomplished. On the other hand, ubiquitous computing does not require human interv ention and the application changes it' s charactersitics based on the current conte xt. The ubiquitous computing de vices blends itself with the user en vironment similar to the e ye glasses, which acts as an e ye to a person. 1.1 Location-awar e Computing Adv ancements in the eld of mobile computing, location sensing, and wireless netw orking has created a ne w class of computing called location-a w are computing. Location-a w are computing de vices belongs to the class of conte xt-a w are computing based on the “primary” conte xt, the user location. The de vices of this class may inuence the beha vior of the application as the location changes or just display the change in conte xt to the user Chen et al [2 ] calls the former as acti v e conte xt-a w are de vices and latter as passi v e conte xt-a w are de vices. Location-a w are de vices requires location sensing technique to determine and adapt itself to changing locations. Location sensing techniques may gi v e absolute co-ordinates of locations such as GPS (Global Positioning System), GLON ASS (Global Na vigation and Surv eillance System), and GSM (Global System for Mobile communications) or relati v e co-ordinates such as cell based wireless communication broadcasting the location information. Location sensing element can be broadly classied into tw o cate gories: indoor position tracking elements and outdoor position tracking elements. Indoor position tracking elements may include technologies such as acti v e badge, infra red communication, RFID (radio frequenc y identication) technology etc., While outdoor position tracking elements include GPS, GLON ASS, and cell based wireless communication. 2

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1.2 Challenges in Design of Location-awar e Computing System The fundamental issues in the design and implementation of location-awar e computing system are [6]: 1. Hardw are: mobile elements are resource poor compared to stationary dektops due to size, po wer and weight. 2. Security: mobile communications are fraught with dangers of security violations due to communication through open (public) channels. 3. Netw ork: wireless connecti vity is highly v ariable in reliability and performance. 4. Ener gy Constraints: mobile elements ha v e to operate under limited ener gy b udget compared to stationary desktop applications. Research on reducing hardw are constraints focuses on making use of stationary hardw are resources that are a v ailable nearby to the user location. F or e xample, a location-a w are de vice could outsource computation intensi v e jobs to the nearest serv er through wireless communication. This allo ws the location-a w are de vices to be simple in design, rich in resources, less in weight, and lo w po wer consuming. But the location-a w are de vices becomes dependent on stationary de vices limiting the range of its use. Another hardw are resource that places constraints on location-a w are computing system is location sensing elements. The use of dif ferent location sensing elements has implications on f actors such as [7 ]: accurac y sensing modalities, ener gy orientation, and dynamic en vironments. Research on security focusses on de v eloping protocols and mechanisms to audit the release of location information to guard against the pri v ac y la wsuits. In a location-a w are computing system, there is an inherent friction between pri v ac y and location information requiring system design techniques to control the e xposure of location information, ef cient access control protocol to monitor e xposure of location information to right party and user interf ace techniques to inform user about the locations being monitored and precautionary measures to enhance trustw orthiness of monitoring process [6 ]. W ireless communications is the eld which has seen e xplosi v e gro wth in recent years, 3

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due to the wide spread use of mobile computing de vices and enormous commercial oppurtunity associated with ubiquitous computing. The main f actors inherent in netw orks (wired or wireless) that af fects the adv ancement are: frequenc y bandwidth, range, and po wer The ener gy constraint determines the success and longeti vity of mobile computing system. As it can be seen from the challenges described abo v e ener gy is the common thread that gets stretched to accomodate the need to meet desired results. Addition of hardw are resources to a mobile computing de vice increases the ener gy demand of the de vice: increasing the range of communication capabilities requires more transmission po wer tracking of user location requires frequent updates from location sensing elements increasing the bandwidth consumption and location-update processing cost are some e xamples illustrating the need for policies to tackle the ener gy b udget problem, which co-e xist in mobile computing de vices. In this thesis, we ha v e de v eloped an initial prototype of location-awar e computing system, N A VIFIND. N A VIFIND aids the tourist to nd the landmarks of interest of a gi v en site via audio output. The N A VIFIND uses GPS as the location tracking element and can be used an ywhere around the globe. In N A VIFIND, we address the problem of ener gy consumption in location-a w are computing system. W e ha v e proposed a system le v el ener gy optimization technique for reducing the ener gy consumption. As described earlier a location-a w are computing system pro vides tailored functionality only on reaching certain predetermined or dynamic en vironments. Our polic y predicts the time (say T) the user might tak e to reach these en vironments. The system components are switched OFF or to a lo w-po wer mode for time T where the e x ecution of the application is not needed hence reducing the ener gy consumption. 1.3 P o wer Optimization: System Le v el vs T raditional A ppr oach Before going into the details of de vice-le v el (traditional approach) and system-le v el po wer optimization policies it is neccessary to analyze the sources of po wer dissipation in CMOS circuits. The sources of po wer dissipation in CMOS circuits are: 4

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1. Static Po wer Dissipation 2. Dyanamic Po wer Dissipation Static Po wer Dissipation is due to leakage current between po wer supply and ground. The main sources of leakage currents are (i) Re v erse-biased p-n junction current; (ii) Subthreshold leakage currents; (iii) Punch-through; (i v) gate-induced drain leakage; (v) Gate-tunneling. Aggressi v e scaling of technology and reduction of threshold v oltage are the causes for increase in leakage current and static po wer dissipation. Dynamic po wer is consumed whene v er the circuit switches and an a v erage dynamic po wer is gi v en by rn! #"%$'&)(+*-,.&0/21 343 &05(1.1) where"%$is the load capacitance,('*-,is the switching acti vity ,/ 343is the supply v oltage, and f is the switching frequenc y The researchers ha v e attack ed each of the indi vidual term in dynamic po wer equation to reduce the dynamic po wer dissipation. T echniques proposed in the literature includes reducing capaciti v e load" $by transistor sizing and optimal placement and routing techniques. The switching acti vity is reduced by techniques such as in v ert b us encoding [8] and emplo ying gray code [9]. Scaling do wn the supply v oltage leads to signicant po wer sa vings. The equation 1.1 sho ws quadratic dependance of po wer on/ 343. As process technology shrinks more transistors are pack ed in the same die area, comple x design styles are emplo yed, and higher clock frequenc y resulting in signicant po wer consumption. 1.3.1 T raditional A ppr oach to P o wer Optimization The tr aditional appr oac h concentrates on po wer analysis and optimization at R TL or gate le v el. The lo w po wer design o w for traditional approach is sho wn in Figure 1.1. Until the recent past VLSI design community has spent most of the time e v olving ne w po wer optimization methodology at logic and R TL le v el which includes w orks such as Guarded e v aluation [10 ], Precomputation [11 ], and retiming [12 ]. 5

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high-level language Architecture definition System specification in Memory optimization Datapath optimization RTL design and synthesis Design and power analysis Ok? gain : 15% time : Days time : weeks gain : 30% time : months gain : 75% Figure 1.1 De vice-le v el Lo w Po wer Design Flo w [13 ] 6

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The po wer optimization techniques at the R TL or logic le v el optimizes a particular module. But system is a collection of v arious heterogenous units w orking together to achie v e the desired functionality A po wer a w are design decision at one functional unit may af fect the po wer consumption in another unit which is not considered at the de vice le v el. Design decisions such as algorithm selection and mapping of the selected algorithm to an architecture are done at higher le v el of abstraction. Performing po wer analysis and implementing po wer optimization features at lo wer le v els of abstraction might not al w ays yield an optimal po wer gain. And it can be easily seen from the o w diagram for traditional approach in Figure 1.1 that design time is considerably increased to months in some cases if the po wer constraint is not met. If architecture or algorithm is modied then the entire sequence of steps from architecture denition in Figure 1.1 ha v e to be e x ecuted increasing the design time to months [13 ]. 1.3.2 System-Le v el A ppr oach to P o wer Optimization The System-le v el approach requires mapping of system specication usually written in a high le v el language such as C or VHDL onto an architecture. Figure 1.2 sho ws the system-le v el design o w [13 ]. At this le v el v arious algorithms and architectures satisfying the functionality are analysed before the actual netlist synthesis therby sa ving considerable design time as well as achie ving desired po wer and performance metrics. There are actually three stages in a system design o w: 1. System Modeling 2. Design & implementation 3. System Management System Modeling is the process of de v eloping an abstract vie w of the system specied as an e x ecutable or non-e x ecutable model depending on the system comple xity In this stage where k e y algorithmic decisions are made before mapping the algorithm onto the architecture. The algorithmic decision may include deciding on the bandwidth requirements for dif ferent units in the system and le v el of accurac y to be supported to achie v e desired functionality It also gi v es a hardw are/softw are partition and macro-architectural-te mplat e [14 ]. 7

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Conceptualization and System and constraint specification modeling time : hours gain : 75% no yes design Hardware and software RTL design and synthesis Final Analysis System Management Ok? time : Days gain : 15% Ok ? Power analysis and optimization no Traditional Flow Architecture and algorithm selection Figure 1.2 System-le v el Lo w Po wer Design Flo w [13 ] 8

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System Design phase deals with actual implementation and rening of hardw are architecture from system model into computational, memory and communication units. The decisions such as implementing hardw are architectural template as an ASIC or as programmable cores are tak en in this phase and v arious po wer optimization technologies such as dynamic frequenc y scaling, multiple v oltage supply on a single chip are analyzed in this stage. System Mana g ement phase deals with design of ener gy ef cient system le v el softw are such as operating system to pro vide ef cient runtime support system. 1.4 Pr oposed Ener gy Conscious Location-awar e Computing System In this thesis, we propose a portable location-a w are computing system, N A VIFIND that provides rele v ant information about the user current location. N A VIFIND aids the tourists to learn the landmarks of interest of a gi v en site by pro viding audio output to the user The system is initialized with a map of the current site (in the form of a graph) and audio data pertaining to landmarks of interest in the site. N A VIFIND system consists of the follo wing sub-systems: GPS recei v er module, serial port, compact ash module, stereo codec, and po wer manager with three sub-modules namely GPS-to-real-w orld position con v ersion module (implements algorithm to con v ert GPS co-ordinates to graph nodes), nearest-location-se arc h module (implements modied Dijkstra' s algorithm), and user speed estimation module. The po wer manager implements an algorithm that w orks as follo ws: at an y gi v en location, the GPS co-ordinates of the location is con v erted to graph nodes, based on which the algorithm predicts the user speed using e xponential a v erage approach. The attenuation f actor of this approach can be v aried to account for the user speed history The estimated speed is used to predict the time (say T) reqired to reach the ne xt nearest location The subsystems are shutdo wn or switched to lo w-po wer mode for time T After time T the system will w ak e up and re-e x ecute the algorithm. 9

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CHAPTER 2 RELA TED W ORK The de v elopment in the eld of mobile computing, wireless communication, location sensing, and augmented display has spa wned e xplosi v e gro wth in the eld of ubiquitous/perv asi v e computing. The gro wth of these mobile de vices has emphasised the need for reducing ener gy consumption at all le v els of system design. A number of location-a w are computing systems ha v e been proposed in the literature. Section 2.1 briey discusses some interesting location-a w are computing systems. W e also present a section on system le v el po wer optimization techniques proposed in the literature. Some of the system le v el po wer optimization techniques proposed are simple and can be implemented as a hardw are component. 2.1 Location-awar e Mobile Computing Machines This section describes about dif ferent location-a w are computing systems de v eloped in v arious research laboratories around the w orld. The section also pro vides insight on v arious location sensing techniques used to track user position and dif ferent conte xts based on which mobile units model their applications. 2.1.1 Cyber guide: A Mobile Context A war e T our Guide Cyber guide [15 ] is a mobile tourist guide, pro viding directions and information about nearest places of interest to the user based on the user location. The prototypes of c yber guide has four major components: map component, information component, positioning component, and communication component. 10

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6Map component, contains maps of the location as bitmaps or v ector -based maps. This component is used to track the user location relati v e to user physical surroudings.6Information component, contains information about the sites of interest in the maps as Ne wton books (Ne wton platform documentation vie wer).6Positioning component, tracks the postion and orientation of user using GPS as the location sensing component for outdoors and IR technology for indoor use.6Communication component, implements both wired and wireless communication to communicate between the mobile units; between mobile units and netw ork; and to broadcast the location update information. Indoor Cyber guide, one of the member of the Cyber guide f amily pro vides directions to user to v arious demonstrations e xhibited; displaying details about the e xhibits, and displays the map of the surrounding area where user resides. The postioning component used to obtain user position is a set of TV remote control units acting as acti v e beacons and a special IR recei v er tuned to the carrier frequenc y of the acti v e beacons. Outdoor c yber guide guides the user based on the latitude and longitude information obtained from the GPS unit. 2.1.2 Context-awar e Electr onic City T our Guide City tour guide [16 ] is designed to eliminate the tourists need to stick to the x ed start and x ed durations of a group-based tours and allo ws the user to interact with the electronic guide to prepare a suitable schedule of v arious places to visit according to his/her personal interests. The guide uses a Fujitsu teampad with pentium 166 MMX processor; and user interf ace is through a modied bro wser template. The user interf ace allo ws the user to enter or retrie v e follo wing information:6User personal preferences lik e historical or architectral and prefered language to display information.6Na vigation of the city using a map.6Creation and modication of a tour 11

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6Communication with other mobile units or tourist information center by sending te xt messages.6Booking accomodations remotely The city guide is also capable of pro viding dynamic information through cell-based wireless infrastructure. The position information is obtained through base stations estabilished for cellbased wireless communication. This approach of nding position using strate gically located base stations has the adv antage of ha ving no e xtra hardw are requirement. But, may result in lo w resolution of positional information. The city guide caches lar ge parts of information model locally to tackle situations where city guide does not ha v e netw ork connecti vity due to cell-based wireless communication infrastructure. Other netw ork related acti vities lik e location information, booking accomodation, and communication through te xt messaging are af fected due to the loss of netw ork connecti vity The city guide has a battery lifetime of approximately tw o hours. 2.1.3 Metr onaut: A W earable Computer Metronaut [17 ] is a wearable computer supporting applications lik e na vigation, messaging, and scheduling. The positional information of a visitor is obtained using a bar code reader The user can use the bar code reader to scan the bar code stick ers (stick ernet) containing the location information around the campus. On nding the location information the metronaut pro vides directions on a LCD screen to the user The four primary components of metronaut are: Metronaut, ground-based netw ork system, Sk yT el paging netw ork, and Sk yT el netw ork interf ace. Metronaut allo ws scheduling and messaging through a tw o-w ay pager The communication proceeds from the mobile unit (Metronaut) via the pager to the Sk yT el paging netw ork, to the Sk yT el netw ork interf ace. The Sk yT el netw ork interf ace will then the forw ard the information to the serv er The serv er processes the information on behalf of Metronaut and replies back to the mobile unit. Metronaut consumes less than one w att of po wer due to the absence of po wer hungry location sensing sytems lik e GPS (about 400mW). But, the do wnside of ha ving bar codes and bar 12

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code readers as the location sensing technique is, the scalability of Metronaut is limited compared to mobile units with GPS or GLON ASS as position tracking element. 2.1.4 Acti v e Badge Location System Acti v e Badge Location System [18 ] is designed primarily to help telephone receptionist to locate a person w orking in a lar ge or ganisation precisely and to forw ard a call to his nearest telephone destination. The system consists of an acti v e badge that emits a unique code, which is nothing b ut a pulse-width modulated infrared signals for approximately a tenth of a second e v ery 15 seconds and this signal is pick ed up by a netw ork of sensors placed throughout the b uilding relaying the data to the central serv er The serv er is designed as a four layer system consisting of:6Netw ork Control, responsible for polling all the sensors in the netw ok.6Representation, responsible for e xtracting v alid data from netw ork, time-stamp the data, and store the data containing badge ID, location, and time-stamp in the data structure.6Data Processing, to process the data collected across acti v e badge netw ork and to compress the data to a v oid netw ork congestion problem.6Display interf ace, displays user location information, change of locations and other rele v ant details pertaining to the acti v e badge as te xt or graphical display 2.1.5 W earable Remembrance Agent W earable Remembrance Agent (RA) [19 ] is designed to pro vide the user with rele v ant information gathered in the past depending on the user location. F or e xample if a person enters a specic class the notes he has tak en in the past attending the same class at the same time of the day will be displayed using heads-up display The wearable remembrance agent uses v e conte xt cues to pro vide rele v ent information:6W earer' s physical location, pro vided by GPS when used outdoors or an indoor location tracking element lik e acti v e badge or IR technology or location entered e xplicitly by the user 13

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6People who are currently around, pro vided by another person' s wearable computer or acti v e badge system or entered by the wearer .6Subject eld, pro vided by the user as an e xtra tag or information e xtracted from the header elds lik e subject line in email.6Date and time-stamp, pro vided by the system clock.6The original notes, the body of the note con v erted to w ord-v ector for later k e yw ord analysis. The RA is implemented using lisp and C running under linux on a wearable 100MHz 486 based processor with a k e yboard and monochrome heads-up display 2.1.6 Location-awar e Inf ormation Deli v ery with comMotion comMotion [20 ] is a location learning agent capable of associating future e v ents to the learned location. The Position component used is a GPS recei v er comMotiom also pro vides mobile access to location-based information from the W eb The architecture for comMotion includes a portable PC, a GPS recei v er and a CDPD modem. comMotion supports both speech and graphical user interf aces. The speech interf ace includes speech recognition and te xt-to-speech synthesis supporting speak er -independe nc e and continous speech recognition. comMotion also acts as a remembrance agent by alerting the user on reaching a particular destination. F or e xample comMotion alerts the user to b uy milk when user passes through the grocery store. As said earlier comMotion is a location learning agent it accomplishes this by querying the user on reaching a ne w location, the user may ignore or enter details about the ne w location. The comMotion has a map module to display the current user location together with neighbourhood locales, such as banks, grocery stores, or schools. comMotion supports communication with other user mobile de vices and allo ws the user to subscribe to information services lik e headline ne ws, weather reports, and mo vie listings from information sources on the W eb 14

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2.1.7 Drishti: Na vigation System f or V isually Impair ed and Disabled Drishti is a wireless pedestrian na vigation system designed to impro v e the pedestrian e xperience of a visually impaired person. The applications pro vided by Drishti includes optimized route planning based on user preference, temporal constriants such as traf c congestion, and dynamic obstacles lik e ongoing road w ork and road blockade for special e v ents, pro viding en vironmental conditions and landmark information queried from a spatial database along the user route through v oice cues. The major components (hardw are/softw are) used in Drishti includes wearable computer v oice recognition and synthesis, wireless netw orks, Geographic Information System (GIS), and GPS. The hardw are component includes a Xybernaut MA IV wearable computer with pentium 200MHz processor full duple x sound card, V GA Head mounted display DGPS recei v ers, and 802.11b wireless LAN technology The sofw are portion of Drishti includes a spatial database engine, C API for route store, Mapserv er to serv e GIS datasets o v er the internet, and v oice recognition and synthesis softw are. Drishti guides the visually impaired user based on static and dynamic data. The dynamic data is pro vided through wireless communication between the mobile unit (Drishti) and a central serv er Drishti also allo ws visually impaired user to enter comments about dif culties f aced along the route planned by Drishti, which could be used as a pointer for future optimized route plan. 2.2 System Le v el P o wer Management P olicies Location-a w are computing system are portable units w orking under limited ener gy source provided by the battery The principle behind an y system le v el po wer management polic y is to switch the po wer manageable components to lo w po wer modes under performance constraints as soon as the y become idle. The k e y to this decision making process is to kno w when to switch the system to lo w po wer modes and to which mode in case of multiple po wer modes a v ailable in a po wer manageable system component. T o mak e things w orse in most real-time systems the w orkload is non-uniform, depending on the user beha vior and is e v ent dri v en. It could be ar gued that today' s electronic components ha v e more ef cient lo w po wer features at de vice le v el, b ut the f act is, these components are going to interact with one another as a part of a system. A po wer polic y at com15

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ponent le v el may force the component to a lo w po wer state when the required constraints are met, without kno wing it may be reacti v ated soon without an y ener gy gain and thus incurring penalty for misprediction. A system le v el po wer polic y implemented in hardw are or softw are will ha v e complete w orking kno wledge of the system and has ner control o v er the operations of the system thereby pro viding signicant sa vings and less performance/po wer penalty Based on the ability to predict the idle time the system le v el po wer management policies are classied into three broad cate gories: 1. T imeout (Static and Dynamic) 2. Predicti v e (Static and Dynamic) 3. Stochastic A k e y criterion to be satised by all po wer management policies is, a system component should be switched to lo w-po wer state only if the sa v ed po wer e xceeds the o v erhead in v olv ed to switch states. The o v erhead here implies number of housek eeping procedures lik e backing-data and storing system status. An e xcellant e xample to illustrate this f act is sho wn in the Figure 2.1. Figure 2.1 sho ws the ef fect of applying a simple shutdo wn polic y to tw o dif ferent scenarios. The assumption here is a system component has only tw o states to switch to, running or sleep state. Let I be the system idle time, E delay o v erhead of entering the sleep state from running state, S sleeping time, and W delay o v erhead for resuming from sleep state to running state.!7and *are the po wer consumption v alues in running and sleep states.8 ,is the a v erage po wer -dissipation o v erhead of entering the sleep state from running state and vice v ersa. EG represents ener gy gain and97 8 *. In Figure 2.1(a) the idle timeso ener gy gain is:7 & <;>=?A@BDC & 8 ; &0Ewith a delay o v erhead of W Consider Figure 2.1(b)FGthe ener gy gain is%7 & <;>=?A@>BDC & 8 ,which is ne gati v e and a lar ge delay o v erheadHJI)K?L-M BN@O=?D;PJCjustifying the f act that po wer management policies has to determine a threshold v alue abo v e which the po wer manager can switch the system component to sleep state. And this v alue is de vice dependent. 16

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R R I E S W R R R I R E R W R (b) (a) Figure 2.1 T w o Contrasting Scenarios in Shutdo wn Prediction (a)(b)2.2.1 T ime-out A time-out polic y sets a time-out v alueQafter which the de vice is shutdo wn or switched to lo w po wer state. The time-out polic y may be further classied as static or dynamic, depending on their ability to adapt at run time. 2.2.1.1 Static T ime-out P olicy The static time out polic y is the most simple polic y based on x ed time-out interv al. The system component or de vice w aits for the pre-dened time-out v alueQto e xpire. If the component idle time is less than the time-out v alueQ, the sytem component is k ept acti v e and vice v ersa. In windo ws operating sytem user can set the timeout v alue for display or hard disk through adv anced conguration and po wer interf ace (A CPI). On e xpiration the components are switched to lo w po wer states. The success of this polic y depends on the proper choice of time-out v alue and it may be de vice dependent. Short time-out v alue is good b ut repeated shutting do wn and re vi ving of system components incurs performance as well as ener gy costs. A lar ge time-out interv al means the system is acti v e for a longer time during idle periods therby w asting po wer A best time-out polic y is one where the time-out interv al is zero for long idle time periods and a long time-out v alue for short idle periods [21 ]. But realistically a best time-out interv al is not possible due to the need for future information which cannot be predicted accurately or a v ailable before hand. So best time-out is only useful for analyzing the performance and po wer costs incurred in other algorithms. A subtle v ariation of x ed time-out polic y is De vice dependent time-out polic y De vice dependent time-out (DDT) polic y considers the hardw are parameters of the de vices to set the time-out 17

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v alues. The time-out v alues are selected based on minimum required threshold v alue the de vice under consideration needs to remain idle to achie v e po wer sa vings. An ob vious dra wback in static time-out polic y is it doesnot consider w orkload statistics which are non-uniform and are mostly e v ent dri v en. Consider a situation when there is a close call, such that once the time-out v alue e xpires the component goes to sleep state b ut almost immediately an e v ent triggers the component to w ak e up from sleep state then there is a po wer penalty in v olv ed in w aking up the component and as well as no signicant po wer is sa v ed in sleep state, there is no w ay the x ed time-out polic y is going to adjust to this situation the more frequent close calls occur the more po wer penalty this polic y is going to suf fer 2.2.1.2 Adapti v e T ime-out P olicy T o eradicate the abo v e mentioned close call scenario the time-out policies needs to be adapti v e. In A T O [22 ] the time-out v alue is adjusted dynamically V arious situations demanding updation of time-out v alues are 1. When system re vi v al time is too long and unacceptable while time-out is too short and must be increased. 2. When system re vi v al time is acceptable and time-out is long enough and can be shortened without increasing repeated system re vi v als. 3. In close call situations, Where the time-out v alue may be just lo wer than the idle time where the system is shutdo wn and re vi v ed immediately prompting increase of time-out v alue. Another important criterion that has to be decided in A T O is the rate of adjustment of time-out v alue. The human psychology gi v es the clue to decide about the rate of adjustment, humans tend to ha v e short term memories a delay is acceptable e v ery couple of hours if the system goes idle for suf ciently long time rather than delay encountered e v ery v e minutes. Considering the f act the time-out may be decreased by a small f actor if multiple acceptable system re vi v al delays occurs. In case of unacceptable delays the time-out might be increased by a considerable amount to e xploit the human tendenc y 18

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The rate of adjustment is gi v en by the ratioQand the pre vious idle period. If the ratio is too small the polic y increasesQ. If small decreasesQ. One good e xample of this polic y is in hard-disk where spin-up after spin-do wn tak es a considerable time and user may not be quite satised with this delay In such cases a trade-of f between performance and po wer sa vings is required. F or the abo v e described scenario the time-out v alueQis adjusted by adding tw o dif ferent v aluesRandStoQwhen undesirable or accepatable spin-ups occur Normally theRandSv alues are set asRGTVU,SXWUandRYTSor another method can be to multiplyQbyRandSin this case the v alues forRandSareRZTV[and[\TSPV[^]R. In other w ords, when a unacceptable spin-up occurs the spin-do wn time-out should be increased by enough to a v oid unacceptable spin-up called as b umps in future. When an acceptable spin-up occurs, the spin-do wn time-out can be decreased, b ut more gradually The rate of adjustment ofQis done only within certain range to a v oid abnormal beha viour lik e increasing time-out indenitely or decreasing the time-out to lo wer v alues thereby incresing b umps. An e xample illustrating the ef fects of the abo v e described spin-do wn polic y on a windo ws trace is sho wn in Figure 2.2. The Figure 2.2 also depicts the ener gy consumption and b umps encountered in x ed time-out v ersus adapti v e time-out polic y As it can be seen small x ed time-out results in least ener gy consumption b ut increase in b umps and increase in x ed time-out or using adapti v e polic y results in decrease in number of b umps b ut increase in ener gy consumption. The Figure 2.2 also sho ws the minimum and maximum v alue within which the adapti v e polic y updates the time-out v alueQ. 2.2.2 Pr edicti v e P olicy The main dra wback in the time-out polic y is the need to w ait for the time-out to e xpire resulting in w aste of ener gy during the time-out period and there is al w ays a performance penalty on w ak eup. In predicti v e polic y this shortcoming is rectied by predicting the idle period before hand and the components are switched to lo w po wer states depending on the predicted v alue and the second problem is addressed by a pre-w ak eup procedure.The Predicti v e polic y may be static or dynamic. 19

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Figure 2.2 Simulation Results Comparing Ener gy Consumption and Bumps, for Adapti v e T ime-out and Fix ed T ime-out [22 ] 20

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2.2.2.1 Pr ediction by Regr ession Analysis and L-shaped P olicy Sri v asta v a et al. [23 ] ha v e proposed tw o predicti v e shutdo wn schemes based on of ine analyses of sample traces, rst one is based on re gression analysis and the ne xt one is based on on-of f acti vity of the sample trace. The idea behind their approach is a simple heuristic rule that uses computation history to mak e the prediction. The w orkload trace the y used is the on-of f acti vity of X-serv er running on a dedicated processor In the rst method Sri v asta v a et al. obtained a nonlinear re gression equation from the past history .`_ba cd #e =f ngr^h -ikj r h &l&l& h -inm nrr h oinm)ikj C(2.1) The predicted v aluen_pa qdepends on the past sequence of idle and acti v e periods. If the predicted v aluer_pa q ktsut, decision to shutdo wn or switch to lo w po wer state is made.vtsutis the break-e v en time, the time that mak es the ener gy consumption equal in a de vice that is k ept in w orking state and the de vice that is shutdo wn and re vi v ed [24 ]. T o achei v e po wer sa vings the break-e v en time should include both the transition delays and the minimum time the de vice has to spend in sleep state. The disadv antage of this approach is there is no general w ay to decide the type of re gression equation and e xtensi v e data collection and analysis needs to be carried out to t the re gression model [25 ]. The second approach is based on intuition observ ed from the L-shaped plot in Figure 2.3, nrrv ersus This suggests that a lar ge v alue of nrris follo wed by a small v alue of wand vice v ersa, suggesting to shutdo wn or switch to lo w po wer states if the acti v e period is short since it will be follo wed by a long idle period. But this approach runs into trouble when short b usy period is follo wed by a short idle period, the plot in which the horizontal and v ertical ax es meet. This approach also f ails to optimally predict if the scatter plot is not L-shaped. 21

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Figure 2.3 L-shaped Scatter Plot fornrtxgv ersus [23 ] The major disadv antage of both these approaches is it is based on a sample traces of particular X-serv er application and there is no guarantee the same polic y will hold good other w orkload traces and it in v olv es e xtensi v e data collection and analysis. 2.2.2.2 Pr ediction by Exponential-a v erage A ppr oach Hw ang et al. [26 ] proposed a e xponential-a v erage approach generally used in CPU scheduling problem for predicting the idle period. The EA approach predicts the upcoming idle period as accumulati v e a v erage of pre vious idle periods. The recursi v e prediction formula is gi v en aspzyj L &b{ |@A=}[d;~LC & p(2.2) In the formulab, the last predicted v alue is the force that opposes an y change so it is called as inertia,{ the latest idle period is the force that pushes the predicted idle period to w ards the actual idle period,bzyjis the ne w predicted v alue and a is the constant attenuation f actor ,U€WLW#[. The Eqn. 2.2 predicts the upcoming idle period as a function of the latest idle period{ and pre vious predicted v alue)controlled by the relati v e weight of the recent and past history which is gi v en by 22

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the parameter a. IfL Uthen)zyj p, recent history has no signicance in prediction. On the other hand, ifL [then)zyj { signies past history has no ef fect. Hw ang et al. [26 ] ha v e set the v alue to be 0.5 gi ving equal weightage to the past and present history The Eqn. 2.2 when e xpanded sho ws ho w the earlier idle periods loses weightage while predicting ne w v alue.pyj L & p‚@Lƒ=}[„;XLC { oikj9@ &z&l& @Lƒ=}[„;XLC {†… @A=}[„;~L`C zyj …(2.3) T w o major features Hw ang et al. [26 ] ha v e added to this polic y are Prediction miss correction and Pre-W ak eup. As it has been stated earlier the quality of the prediction depends on tw o k e y parameters: safety and ef cienc y These tw o features are aimed to enchance the quality of prediction when dif ferent scenarios occur 2.2.2.3 Pr ediction Miss Corr ection R2 I2 R1 I1 I3 R3 I4 R4 Busy Waiting I1 3 Sth 2 Sth I3 S R3 I3''' I3'' Sth I3' I4' I3' R2 I2 R1 Figure 2.4 Prediction Miss Correction Using W atch Dog Scheme Figure 2.4 sho ws the scenario in which a long idle period occur after continous, uniform idle periods in such as cases the normal EA method will under predict the idle time by correlating past history of idle times resulting in less po wer sa vings. Consider another scenario sho wn in Figure 2.4 23

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a idle timeb‡follo ws the long idle time^ˆin such cases the EA polic y will o v erpredict the idle time making the system to suf fer performance penalty Hw ang et al. [26 ] ha v e proposed a w atchdog scheme sho wn in Figure 2.4 to solv e the under prediction problem. Acccording to this scheme if the predicted v alue is less than the threshold v alue, where threshold v alue is the minimum idle time required to obtain po wer sa vings then the system component remains in the b usy w aiting state and starts a timer to trace the actual idle period and the system performs another prediction once the threshold v alue e xpires. If the ne w predicted v alue is greater than the threshold then system goes to sleep state or else stays as b usy w aiting. The second problem of o v erprediction is solv ed by adding a saturation condition to the equation 2.2 as belo w{q5 =?L { |@A=}[„;~L`CcpT>‰Šp`Ccpyj ‰Šp(2.4) where c is a constant, limiting the gro wth rate of I to c times per update. 2.2.2.4 Pr e-wak eup The system suf fers from a delay penalty on transition from sleep state to running state as it has to perform reco v ery procedure.T o a v oid such an undesirable delay the arri v al of the ne xt e v ent needs to be predicted so that the system can be re vi v ed before the arri v al of the e v ent. Figure 2.5 sho ws tw o possible scenarios when applying pre-w ak eup scheme. Let I be the actual idle period,Š_pa cthe predicted idle period, W the system re vi v al time, and‹ Œ _pa q ;Z Œthe error of prediction. The rst scenario in Figure 2.5 sho ws the o v erprediction of idle time,r_pa c TŽand‹ B. In such a case the system resumes its operationb_pa c ;>Btime ahead thereby reducing the undesirable w ak eup delay byB; ‹. If‹ ‘Bthen the system will w akup once the original idle time e xpires and the pre-w ak eup scheme has no ef fect in such a scenario with a delay penaltyB. The second scenario depicts the under estimation of predicted idle time,r_pa q WŽ. In this case there will be no delay penalty b ut ener gy gain decreases due to pre-w ak eup. 24

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I R R R E S W R I' Delay R I R R E S W I R I' Figure 2.5 Pre-w ak eup Scheme 2.2.2.5 Pr ediction by Adapti v e Lear ning T r ee Chung et al. [27 ] ha v e proposed the idea of idle period clustering and adapti v e learning for predicting the idle time similar to the branch-prediction schemes in microprocessors. The idle period clustering technique in v olv es computation of as man y threshold v alues as po wer states in the system so each po wer state can be bounded by thresholds. Thus a sequence of idle periods can be transformed into a sequence of inte gers, each inte ger representing the best po wer state for the predicted idle time.J’'=”“ w C • – – – – – – — – – – – – – U hif“ W …;{ @‘[ hifpvW“ Wp™yjforU€ { Wš;š hif W“ r. (2.5) where“ is the predicted idle period and …œ››› pis the threshold v alues for n po wer states. Chung et al. deals with the ne xt problem which in v olv es prediction of idle period by constructing a tree structure in which the past idle periods are encoded as tree nodes along with the predicted idle periods with the prediction condence le v el. A decision to pick out a predicted v alue from the tree is based on path matching procedure which in turn depends on history encoded on the nodes and also on the condence le v el of the predicted node. In case of correct prediction the condence le v el of the predicted node is increased and vice v ersa. The dra wback in this approach is memory 25

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resource is not constrained, there is no measure to restrict the gro wth of the tree requiring more memory in case tree gro ws arbitrarily long. 2.2.3 Stochastic Contr ol P olicy Polic y optimization is an optimization problem under uncertainity The k e y features of stochastic polic y are generality high le v el of abstraction, and non-determinism. Benini et al. [28 ] ha v e proposed a stochastic polic y in which the y ha v e modeled the arri v al of requests, po wer -state changes of the service pro vider under performance constraints as stationary discrete-time Mark o v process. The proposed polic y has the follo wing k e y characteristics: (i) models uncertainity in the system po wer consumption and transition times (ii) model comple x systems with multiple po wer states (iii) computes globally optimum po wer management policies (i v) e xplores po wer and performace trade-of f in a controlled f ashion. The components of the proposed Mark o v model are Service Requestor, is modeled as a Mark o v chain with state set R, where the observ ed v ariable is the nunber of requests asent to the service pro vider (SP) during time interv al“ Service Pro vider, pro viding service to the incoming requests is modeled as a controlled Mark o v chain with S states. During each interv al it can be in only one state characterized by performance and po wer constarints. The transistions between dif ferent states are controlled by the command issued by the po wer manager (PM). The transitions between dif ferent po wer states are probabilistic and probabilities are controlled by the command issued by the po wer manager (PM). Queue, b uf fer to hold the requests arri ving during a period. The requests are serviced in the same period with a probability depending on the po wer state of the system thus modeling the nondeterministic service time of a request. Po wer Manager, sets the state of the service pro vider at the be gining of each period, by issuing commands from a nite list. PM implemets a function5PnE Ÿ¡‘Ÿ£¢ ;¤TNfrom the state set of SP SR, and Q to the set of possible commands A. The function is an abstarct representation of a decision process. 26

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Cost Metrics, It is a function of both the state S and¦ *, the decision tak en during state S. It is generally association of po wer and performance v alues when SP is in state S and a command is issued. Polic y optimization is performed by composing global controlled Mark o v chain from the Mark o v chains of SP and SR and the problem of nding optimal po wer polic y under performance constraints are cast as linear program problem, producing a stationary randomized polic y The adv antages of this approach are e xibility generality and global optimality But the dra wbacks are polic y optimization requires SP and SR to be Mark o v models, for non-Mark o v process the optimality is just approximate solutions and implemeting a randomized polic y is usually more comple x compared to predicti v e or time-out policies making it unsuitable to be implemented as hardw are PM. 2.2.4 Shar e Algorithm The share algorithm [21 ] is a member of multiplicati v e-weight algorithmic f amily recei v es as input a set of ”e xperts”, other algorithms which mak es predictions. The goal of this algorithm is to combine the predictions of v arious e xprets to reduce error and to arri v e at common consensus. The algorithm assigns one weight per e xpert, representing the quality of that e xpert predictions and predict with a weighted a v erage of the e xperts prediction. After each prediction the weights of the e xperts are updated, the weights are slashed drastically if a prediction is misleading. The weights of good e xperts are k ept untouched. The share algorithm has been applied to disk spin-do wn problem, which is nothing b ut deciding when to spin do wn the hard disk to sa v e ener gy F or e xample dif ferent e xperts may be dif ferent x ed time-out v alues. The share algorithm uses tw o parameters the learning rate,§, a real number greater than one and controls ho w rapidly weights of misleading e xperts are slashed and the share parameter ,R, is a real number between zero and one, controls ho w rapidly poor performing e xperts reco v ers when that e xpert be gins predicting well. On each trial the algorithm: 27

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1. Uses a time-out equal to the weighted a v erage of the e xperts:“ {t¨ I;~œr“ ™ …Š ?r ™ … (2.6) 2. Slashes the weights of poorly performing e xperts I i $ sucuw)f(2.7) 3. Shares some of the remaining weights K O ™j =}[„;>=}[„;XRvC $ s}ucur)f C(2.8) =}[„;XRvC $ s}ucur)f @ [ š K(2.9) The ne w weights are used in ne xt trial. 28

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CHAPTER 3 LOCA TION-A W ARE COMPUTING SYSTEM N A VIFIND Location-a w are computing systems are a class of wearable computers pro viding tailored functionality with respect to user location. Location-a w are computing tak es mobile computing to ne xt paradigm by embedding computing into the conte xt of our li ving acti vities, with minimal ef fort on the part of the user Location-a w are computing system is designed to be an intelle gient system similar to human brain, which tak es appropriate action based on the situation. Section 3.1 gi v es an o v ervie w of a location-a w are computing system (N A VIFIND) proposed as a part of the thesis and describes the components used to b uild the location-a w are computing system, N A VIFIND. Section 3.2 describes the system le v el modelling of proposed location-a w are computing system. 3.1 Ov er view of Pr oposed Location A war e Computing System N A VIFIND is the initial prototype modelled to aid the user to learn landmarks of interest of a gi v en site. Figure 3.1 sho ws the block diagram of the proposed location-a w are computing system and also sho ws the control and data o w between dif ferent components in the system. The proposed na vigation system consists of follo wing components: (1) GPS recei v er (RF 8000); (2) Compact ash memory card; (3) Stereo codec; and (4) ASIC-N A VIFIND. The RFMD GPS recei v er [29 ] tracks the user position and pro vides absolute co-ordinates of the user position. The compact ash memory card is used to store the map (in the form of a graph) and audio les associated with se v eral locations in the map. The map contains the latitude and longitude co-ordinates of all the b uildings and intersections and also contains the adjacenc y lists for each b uilding and intersection. The memory card is formatted to F A T16 le system and les are stored in ash card through e xternal card reader Stereo codec pro vides audio ouput to an earphone. 29

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RF 8000 Serial port Stereo Codec Serial port Local Memory Codec Interface CF interface Power manager FAT16 file system driver Compact Flash control & gps data update interval gps data map data wav file data file name data serial audio data file loc address & data ASIC data signals Figure 3.1 Control and Data Flo w in the Proposed Location-a w are Computing System 30

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The ASIC-N A VIFIND designed has v e components: (1) Serial port U AR T ; (2) local RAM 2KB; (3) F A T16 le system dri v er; (4) Compact ash interf ace module; and (5) Po wer manager A serial port is designed to communicate with the primary serial port of GPS recei v er The communication protocol includes sending and recei ving binary messages at a B A UD rate of 19200 bps. The ASIC has a small local memory for caching the map originally stored in the compact ash card. The map is locally cached to pro vide higher performance and the local cache allo ws byte addressability which is not possible with compact ash card formatted to F A T16 le system. The F A T16 le system dri v er determines the sector addresses for les to be read from compact ash card by reading the boot record, F A T and the root directory structure. The compact ash interf ace module handles read and write operation between the host (ASIC) and compact ash card [30 ]. Po wer manager module and the algorithm implementation is e xplained in section 3.3 The o v erall w orking of N A VIFIND in v olv es guiding the tourist to learn the landmarks in a gi v en site by gi ving rele v ant audio details about the landmarks in the site. The GPS recei v er tracks the user position, which is communicated through a serial port in the form of binary messages. The ASIC checks to see whether the current user position matches with an y of the landmarks stored in the map. In case of a match the ASIC acti v ates the F A T16 le system dri v er module which determines the location of the corresponding audio le in a compact ash card. The compact ash interf ace module communicates with the compact ash card controller (internal to ash card) by generating appropriate timing signals to access the internal compact ash card re gisters to retrie v e the audio data stored in W A V format. The stereo codec does the digital to analog transformation and plays out the audio messages through an earphone. 3.1.1 GPS Recei v er The RFMD GPS recei v er (RF8000) [29 ] is used as a location sensing component in the proposed location-a w are computing system. The GPS recei v er has 12 parallel channels to track satellites and is designed for OEM use in automoti v e na vigation, marine na vigation, telematics, and asset tracking. The recei v er supports 3D and 2D na vigation modes. The recei v er enters 3D na vigation mode when four or more satellites are a v ailable with good geometry On the other hand if fe wer than four GPS 31

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satellites are a v ailable or when a x ed altitude can be used to produce acceptable result, the GPS enters 2D na vigation mode. The RFMD GPS recei v er is designed to operate under harsh conditions and performs rob ustly in situations where high signal blocak e are concerns. The recei v er pro vides a na vigational accurac y of 5.8 meters in horizontal direction and 9.7 meters in v ertical direction. The recei v er also supports DGPS mode with accurac y of less than 1 meter The GPS recei v er supports three po wer modes: Of f mode, Operate mode, and Battery back-up mode. In of f mode the recei v er is completely inacti v e without an y po wer supply The recei v er enters operate mode when an e xternal DC supply (3.3V) is connected to the recei v er primary input terminal. The battery back-up mode is used to store critical satellite data to achie v e rapid TTFF (time to f ast x) when e xternal po wer supply is disconnected. Figure 3.2 sho ws the block diagram of RFMD GPS recei v er module. GPS recei v er supports four signal aquistion modes and TTFF v ariation is based on time to collect full ephimeris data:6Cold start, the recei v er enters the mode on start-up. The time to rst x (TTTF) in this mode is 44 seconds6W arm start, the recei v er enters the mode when there is a long po wer -of f and battery back-up po wer is maintained. The recei v er has v alid data lik e position, time, almanac, and frequenc y parameters in memory and TTTF is 40 seconds.6Hot start, the recei v er enters the mode on softw are reset or short po we-of f c ycles when battery back-up is maintained. The recei v er will ha v e position, v elocity time, ephemeris, almanac, and frequenc y parameters in memory TTTF is 10 seconds.6Reacquistion, the recei v er enters the mode on signal blockage preceded by a period of continous na vigation. TTTF is 1 second. T able 3.1 sho ws the pin conguration for the RFMD GPS recei v er The recei v er supports communication protocols which includes sending and recei ving binary messages (Proprietary communication protocol) or NMEA (National marine electronics association) messages, a standard communication protocol. The B A UD rate setting for binary messages is 19200 bps and NMEA standard 32

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Figure 3.2 RFMD GPS Recei v er Block Diagram [29 ] T able 3.1 GPS Recei v er Pin Conguration Signal Description V3 3P Main po wer input to the recei v er GND DC ground to the recei v er TX1 Primary serial port transmit line. RX1 Primary serial port recei v e line. TMARK UTC time-mark pulse, one pulse per second. V ANT Pro vides po wer connection to the GPS antenna. V2 5B U Pro vides back-up po wer for recei v er' s real-time clock. RX2 Auxillary serial port recei v e port for DGPS communications. 33

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communication setting is 4800 bps. GPS recei v er manual [29 ] pro vides a detailed description of v arous input/ouput messages supported in binary and NMEA communication protocol. The binary communication protocol supports an input command to set the message frequenc y rate. The proposed system le v el po wer management polic y utilizes this input message to set the frequenc y update rate to minimize the ener gy consumption in the proposed location-a w are computing system. T able 3.2 sho ws the po wer consumption v alues for dif ferent frequenc y updates. T able 3.2 Po wer Consumption Information of RFMD GPS Recei v er Update frequenc y Po wer Consumption 1 sec 400 mW 1 min 135 mW 5 mins 30 mW 3.1.2 Compact Flash Card The Compact ash memory card uses sandisk ash technology to pro vide mass storage. The compact ash card has an intelligent oncard controller for data storage and retrie v al, to manage interf ace protocols, supports Error correction code (ECC) for data protection, defect handling and management, po wer management and clock control. The communication between the host system and compact ash card is through the oncard controller The compact ash card supports PCMCIA A T A (Personal computer memory card international association A T A) and true IDE standards. The compact ash card is a dual v olatage product supporting 3.3V or 5V The proposed location-a w are computing system accesses compact ash card in true IDE mode. The compact ash card supports standard A T A re gister and command set. T able 3.3 gi v es a brief description of re gisters a v ailable in compact ash card. The compact ash card supports v arious A T A commands, our proposed system uses only the read sector command to access les stored in compact ash card. T able 3.4 sho ws the pin description of a compact ash card used in true IDE mode. Compact ash card product description manual has a detailed pin description for other modes [30 ]. T able 3.5 sho ws the I/O decoding to access the A T A re gister set, which includes task le re gister alternate status re gister and de vice control re gister 34

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T able 3.3 A T A Re gister Set Re gister name Description Data re gister 16-bit read/write re gister for transferring data blocks between compact ash card data b uf fer and the host. Error re gister 8-bit read only re gister with each bit sho wing the source of error Feature re gister 8-bit re gister write only re gister It pro vides information about the features of the compact ash card utilized by the host. Sector count re gister 8-bit re gister specifying number of sectors to be transferred to or from compact ash card during write or read operation. Sector number re gister 8-bit re gister contains the starting sector number or bits 7-0 of logic block address (LB A). Cylinder lo w re gister 8-bit re gister contains lo w order 8 bits of c ylinder address or bits 15-8 of LB A. Cylinder high re gister 8-bit re gister contains high order 8 bits of c ylinder address or bits 23-16 of LB A. Head/Dri v e re gister 8-bit re gister to select dri v e and head or bits 27-24 of LB A. The re gister is also used to select CHS or LB A addressing mode. Status & Alternate status re gister 8-bit re gister to return the status of compact ash card. De vice control re gister 8-bit re gister to control interrupt request and to issue soft A T A reset. 35

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T able 3.4 Compact Flash Card Pin Description Signal name Description of signal interf ace in true IDE mode A0-A2 In true IDE mode address lines A0-A2 are used to select the task le re gisters. A10-A3 Grounded in true IDE mode. -PDIA G P ass Diagnostic signal in the master/sla v e handshak e protocol. -D ASP Disk Acti v e/Sla v e Present signal in the master/sla v e handshak e protocol. -CD1, -CD2 Card Detect pins used to determine if the card is fully inserted into the sock et -CS0, -CS1 -CS0 is chip select for task le re gisters (data to head/dri v e) and -CS1 is chip select for alternate status & de vice control re gister -CSEL T o congure the de vice as master or sla v e. when the pin is grounded then master If open then the de vice is congured as sla v e. D15-D00 Data signals. All task le operations occur in byte mode (D00-D7) and data transfers are 16 bits using D00-D15. -INP A CK Not connected to host. -IORD Input/ouput read signal generated by thehost. -IO WR Input/output write signal. -A T A SEL The pin should be grounded to enable true IDE mode. INTRQ Acti v e high interrupt request signal to the host. -REG Should be connected to VCC by the host. -RESET Acti v e lo w hardw are reset from the host. VCC 5 V 3.3 V po wer -VS1, -VS2 V oltage sense signals. -VS1 grounded to read compact ash card card information structure (CIS) at 3.3 V -VS2 is left open. -WE Not used and should be connected to VCC by the host. -IOCS16 the signal is asserted lo w to indicate w ord transfer c ycle. T able 3.5 Signal Conguration for Re gister Access in T rue IDE Mode -CE2 -CE1 A2 A1 A0 -IORD=0 -IO WR=0 1 0 0 0 0 Data re gister Data re gister 1 0 0 0 1 Error re gister Feature re gister 1 0 0 1 0 Sector count re gister Sector count re gister 1 0 0 1 1 Sector number re gister Sector number re gister 1 0 1 0 0 Cylinder lo w re gister Cylinder lo w re gister 1 0 1 0 1 Cylinder high re gister Cylinder high re gister 1 0 1 1 0 Head/Dri v e re gister Head/Dri v e re gister 1 0 1 1 1 Status re gister Command re gister 0 1 1 1 0 Alternate status re gister De vice control re gister 1 0 1 1 1 Dri v e address Reserv ed re gister 36

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3.2 System Le v el Modeling of ASIC N A VIFIND The ASIC N A VIFIND has been modeled as a procedural e x ecutable model using a hardw are desription language (VHDL). The ASIC-N A VIFIND has v e components: 1. Serial port 2. local memory 3. F A T16 le system dri v er 4. Compact ash interf ace module 5. Po wer manager 3.2.1 Serial P ort U AR T The GPS recei v er outputs spatial data through the primary serial port transmit line (TX1) at 19200 bps and can recei v e commands as binary messages from the host through the primary serial port recei v e line (RX1). An Uni v ersal asynchronous recei v er -transmitter (U AR T) in ASICN A VIFIND handles the communication between the RFMD GPS recei v er and the host (proposed location-a w are computing system). The three main components of U AR T are: 1. B A UD rate generator di vides the master clock to pro vide the bit clock (Bclk) with a period equal to one bit time to achie v e 19200 bps for binary messages or 4800 bps for NMEA messages. It also pro vides a clock eight times the frequenc y of bit clock (BclkX8) to recei v e the serial data from GPS recei v er transmit line (TX1). 2. U AR T recei v er implements recei v er control. 3. U AR T tranmitter implements transmitter control. The serial data format for the GPS recie v er input and output binary messages are:6B A UD 19200 bps 37

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6Data bits 8 bits6P arity None6Stop bits 1 The data format for NMEA messages remains the same e xcept for B A UD rate settings which is set at 4800 bps. U AR T transmitter is designed to communicate with the primary serial port recei v e line (RX1) of RFMD GPS recei v er The U AR T transmitter transmits the data stored in the transmit data re gister (TDR) in a standard serial data format. The host on loading the TDR re gister sets the transmit ag (Tag = '1'). The U AR T transmitter w aits for the rising edge of the bit clock (+‰pK ) and then transmits a logic '0' as the start bit. F or the ne xt eight clock c ycles of Bclk the transmitter control sends the data bits on detection of rising edge of bit clock ( "| ). The data bits are follo wed by a logic '1' stop bit and tranmitter control clears the transmit ag allo wing the host to write ne xt data into the TDR re gister The tranmitter control goes to an idle mode if Tag is not set (Tag = '0') indicating absence of data for tranmission or resumes data transmission if Tag is set (Tag = '1'). U AR T recei v er interf aces with the primary serial port transmit line (TX1) of RFMD gps recei v er The operation of the U AR T recei v er is as follo ws: 1. On detection of start bit the U AR T recei v er reads eight data bits transmitted at Bclk frequenc y and shifts it into the shift re gister 2. Recei v er control checks the logic v alue of the stop bit. If it is found to be '1' then the transmission is successful. 3. On successful transmission the contents of shift re gister are loaded onto host re gister for the host to read and shift re gister could be used for shifting ne xt transmitted data. The recei v er controller has a clock (BclkX8) input eight times the frequenc y of transmitter control clock (Bclk) to a v oid setup and hold times problems. The recei v ed data bits are sampled eight 38

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times during each bit time. The serial data transmitted is asynchronous and transmitting de vice clock (in our case the transmitting de vice is RFMD GPS recie v er) may not be in complete synchronization with the recei v er clock. So reading the transmitted data at the rising edge of Bclk could lead to problems lik e reading wrong data or reading spurious data etc., to a v oid this problem the recei v er control samples the recei v ed bit at eight times the frequenc y of transmitted bit and reading it in the middle of each bit time thereby pro viding maximum reliability Figure 3.3 sho ws ho w the sampling is done on the recei v ed bit. Received Data BclkX8 Data read and shifted Start Bit First Data bit Second Data bit Figure 3.3 Sampling in U AR T Recei v er Control U AR T B A UD rate generator is used to generate the clock inputs for the U AR T transmitter and recei v er control. Figure 3.4 sho ws the block diagram of a B A UD rate generator The B A UD rate generator di vides the system clock to pro vide Bclk and BclkX8 to the transmitter and recei v er control. The B A UD rate generator can be congured to select dif ferent B A UD rate settings. F or e xample the system clock will be di vided in such a w ay to pro vide 19200 bps for binary message protocol or 4800 bps for NMEA protocol. F or e xample if the system clock is 8 MHz and we w ant B A UD rates 300, 600, 1200, 2400, 4800, 9600, 19200, and 38400. The maximum clock frequenc y required is 38400 x 8 = 307200 for BclkX8. T o achie v e this the system clock (8 MHz) should be di vided by 26 for 38400 bps and di vision by 52 for 19200 bps and so on. 3.2.1.1 Clock Generation Pr oblems in B A UD Rate Generator Due to the asynchronous nature of data tranmission the primary goal of an U AR T design is to pro vide synchronization mechanism between the transmitting and recei ving de vice. As e xplained in order to achie v e a maximum frequenc y of 307200 (38400 x 8) for 38400 bps setting the B A UD rate generator needs to di vide the system clock (for e xample 8 MHz) by 26. But in reality to get the required maximum frequenc y the system clock (8 MHz) has to be di vided by 26.04. Since inte ger 39

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Divide By 256 MUX Divide By 8 Divide By 13 BclkX8 Bclk Clkdiv13 8 MHz System Clock Mux select Figure 3.4 B A UD Rate Generator di vision is the only possible w ay we ha v e to either accept a small error or adjust the system clock frequenc y to 7.9877 MHz. T able 3.6 sho ws the scenario if U AR T operates with a small mar gin of error arising out of inte ger di vision. The arithmetic error arising out of clock di vision is one of the important source of error in U AR T communication [31 ]. T able 3.6 Clock Generation Problems Af fecting the B A UD Rate Settings Mux Select input B A UD rate 000 38462 001 19231 010 9615 011 4808 100 2404 101 1202 110 601 111 300.5 T able 3.6 clearly sho ws that the transmitting de vice will be sending more data bits per second than the required B A UD rate setting. The recei v er on another host will be operating on a clock according the B A UD rate setting. In this case recei v er clock in another host will ha v e a clock fre40

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quenc y lesser compared to transmitting de vice clock frequenc y It can be ar gued that the recei v er will al w ays read the data in the middle of the bit clock compensating for the error due to slight frequenc y v ariations. As we can see from the table 3.6 as we mo v e from one setting to another setting the number of e xtra bits transmitted gets doubled. The ef fect is more pronounced for lar ger B A UD rate settings. F or e xample for 38400 bps 62 e xtra bits are transmitted af fecting the synchronization between the transmitting and recei ving de vice. Ov er the long run the recei ving de vice will read the data not in the middle of the bit clock b ut at a later period, which will e v entually lead to decoding wrong messsages or skipping start or stop bit causing transmission f ailure. The same error occurs in the opposite direction if the host recei v er operates at a higher frequenc y than the B A UD rate setting of a communication protocol. 3.2.1.2 Resynchr onization of T ransmitter and Recei v er Clocks to Achie v e Ideal Baud Rate Setting T o compensate for the error due to inte ger di vision of system clock in B A UD rate generator the transmitter (Bclk) and recei v er (BclkX8) is resynchronized at re gular interv als. In our proposed location a w are system serial port transmission line is interf aced with Recei v e (RX1) port of GPS recei v er The serial port transmission line in ASIC-N A VIFIND will be transmitting 19231 bits per second compared to a ideal setting of 19200 bps. F or 19200 bps each bit will ha v e a clock c ycle period of 52083.33ns b ut in our case for 19231 bps each bit transmitted will ha v e a clock c ycle period of 52000ns. Each bit is transmitted 83.33ns earlier than required. If this error is allo wed to accumulate then 19200 bits will be transmitted in 0.9984 seconds rather than in 1 second leading to synchronization problem with the recei v er in another de vice. In order to a v oid accumulation of error o v er one second period we introduce delay in the clock at re gular interv als which compensates for error accumulated till that clock period. A delay of 2500ns (or 20 system clock c ycles) is introduced after the transmission of e v ery 30 bits of data on rising edge of bit clock ( " ). As it can be seen on e v ery 30 bits of transmission the error accumulated compared to ideal bps setting (19200 bps) is 2500ns i.e., the transmitter in ASIC-N A VIFIND w ould ha v e transmitted data 2500ns earlier compared to ideal setting. As e xplained abo v e Bclk and BclkX8 are generated by di viding the 41

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system clock. So 2500ns corresponds to 20 system clock c ycles and by resetting the counter for 20 clock period c ycles introduces a delay of 2500ns on the bit clock and synchronizes the transmitter clock with the recei v er clock in another host. It could be v eried by di viding 19200 bits into groups of 30 bits will gi v e 640 groups and introducing a delay for each group will result in introduction of delay of 0.0016 seconds (640 x 2500 ns) for 640 groups. By adding the introduced delay of 0.0016 second with the transmission time of 0.9984 second (19200 52000) will pro vide us an ideal setting of 19200 bits per second. The delay insertion method also does the job of synchronization along with mid bit synchronization in recei v er control in U AR T 3.2.2 F A T16 File System Dri v er ASIC-N A VIFIND implements the F A T16 le system dri v er to access the les stored in the compact ash card. Addition, deletion or modication of les are carried out e xternally through ash card reader The F A T16 le system pro vides a simpler w ay to access and store the les and frees the location-a w are system from handling le management related issues. Na vigation related les lik e spatial database (for e xample graph of a location) and audio les coresponding to landmarks of interest can be stored in the compact ash card inserted into the ash card reader which can be connected to PC or laptops supporting ports to interf ace with the ash card reader The le storage requires just a drag and drop once the ash card is recognised by the PC. The F A T16 le system dri v er in the PC will write the rele v ant details about the le in the F A T16 le data structures which includes boot record, le allocation tables, and directory structure. The ASIC-N A VIFIND has a F A T16 le system dri v er to access the les while the user is on the mo v e and to pro vide details about the current location to the user There are four logical parts in a F A T16 le system the y are: 1. Boot Sector 2. File Allocation T able 3. Directory Structure 4. Data Space 42

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3.2.2.1 The Boot Sector The boot sector contains the boot parameters. The boot parameters contains information about the w ay compact ash is or ganised lik e number of sectors per cluster number of reserv ed sectors etc., T able 3.7 sho ws the contents found in a boot sector T able 3.7 Structure of Boot Record Of fset Description Length in bytes 00h Jump instruction 3 03h OEM name 8 0Bh Bytes per sector 2 0Dh Sectors per cluster 1 0Eh Reserv ed sectors 2 10h Number of F A T copies 1 11h Maximum Root directory entries 2 13h T otal sectors 2 15h Media Descriptor 1 16h Sectors per F A T 2 18h Sectors per track 2 1Ah Number of heads 2 1Ch Number of hidden sectors 4 20h Huge sectors 4 24h BIOS dri v e number 2 26h Boot signature 1 27h V olume ID 4 2Bh V olume name 11 36h File system name 8 The boot sector is the rst sector in F A T16 le system and the parameters found in the boot sector are used for calculating the address of other three areas in the F A T le structure. The formula for calculating the addresses of other three areas of F A T16 le structure based on the boot parameters are:+œ“0I^‰g“}œLJH-H-zI00 ‘|{ z^“œI)‰Š“cœ dLoHoHllI^œ +œœ“œI)‰Š“}0LoHoHllI^œ!@Pšk ¨ Ibd 5 lI^œIbJI^H0I^‰g“}œl43

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¡ œ“H { zI^‰Š“cœMLoHoHllI^œ ‘ dLJH-H-lI^œX@šk ¨ Ib 5 0I^‰g“}œl Ib „O=}[)znC ( ¨ I) 5' „‰p { I^\=}[bUlnC ‹ L-“}L„ Lo‰bI9LJH-HllI00 A¡ œœ“H { lI)‰Š“cœM„LJH-HllI00:@G=OL {†¨ ¨D¡ œœ“H { lI)‰Š“cœMdIbšk“c { I^=}[z[)ƒC z C]œ